Commit Graph

111 Commits

Author SHA1 Message Date
Stefan Kalkowski
9258004cc7 hw: move stack into cpu local mem area
Ref genodelabs/genode#5310
2024-08-27 15:29:36 +02:00
Stefan Kalkowski
d9d2a7584e base-hw: remove cortex spec directories
For consistency reasons, remove the cortex_a8, cortex_a9, and cortex_a15
spec directories. Such SPEC variables do not exist since a while.
Also rename remaining translation_table.h header to page_table.h to
stay consistent with the class names inside.

Fix genodelabs/genode#5253
2024-07-02 11:59:16 +02:00
Stefan Kalkowski
e93f5fe8e0 base-hw: move imx53-specifics to imx repository
Ref genodelabs/genode#5252
2024-06-20 13:25:06 +02:00
Stefan Kalkowski
5a8d149fe3 hw: move all imx7d specifics to imx repository
Ref genodelabs/genode#5252
2024-06-20 13:24:41 +02:00
Benjamin Lamowski
aad80e81da hw: add support for VMX
Add support for Intel's Virtual Machine Extensions with nested paging.

Fixes #5128
2024-05-29 08:37:08 +02:00
Stefan Kalkowski
5e7e6514be Remove i.MX6 platforms from base repositories
Fix genodelabs/genode#4941
2023-07-14 12:06:31 +02:00
Benjamin Lamowski
e882ca748d base-hw: virt: implement support for SVM
Ref #4826
2023-05-30 12:13:34 +02:00
Benjamin Lamowski
cb69c59fa3 base-hw: implement VMCB data structure for AMD SVM
Ref #4826
2023-05-30 12:13:33 +02:00
Benjamin Lamowski
6ca7119267 base-hw: copy virtualization structure for x86_64
Ref #4826
2023-05-30 12:13:33 +02:00
Stefan Kalkowski
5e0a9052d2 hw: prevent alignment faults in bootstrap
Either enable strict-alignment or disable FPU code generation by gcc
regarding bootstrap code, which cannot handle alignment faults during
initialization properly.

Ref genodelabs/genode#4827
2023-05-30 12:03:28 +02:00
Alexander Boettcher
df27cc87b5 hw/x86: add suspend kernel syscall
using the ACPI mechanism. The syscall can be triggered solely via core's
RPC managing_system call.

Issue #4669
2023-02-27 08:22:50 +01:00
Stefan Kalkowski
13453e3c68 hw: activate strict conversion checking in kernel
Fix genodelabs/genode#4753
2023-02-27 08:22:48 +01:00
Stefan Kalkowski
0212f94809 hw: eliminate -DNR_OF_CPUS, use constant instead
Fix genodelabs/genode#4752
2023-02-27 08:22:48 +01:00
Johannes Schlatow
4d0cb175da base-hw: use global timer on Cortex A9
genodelabs/genode#4360
2023-02-27 08:20:45 +01:00
Stefan Kalkowski
08c56e61e1 hw: avoid overhead for cache maintainance
When running on x86, and riscv never enter the kernel for cache maintainance,
but use the dummy implementation of the generic base library instead.

On ARMv8 it is not necessary to enter privileged mode for cache cleaning, and
unification of instruction/data cache, but only for invalidating cache lines
at all levels, which is necessary for the use cases, where this function it
needed (coherency of DMA memory).

Fix genodelabs/genode#4339
2023-01-24 12:07:29 +01:00
Sebastian Sumpf
b5c780993c board: Rename virt_qemu to virt_qemu_<arch>
Instead of having a generic "virt_qemu" board use "virt_qemu_<arch>" in
order to have a clean distinction between boards. Current supported
boards are "virt_qemu_arm_v7a", "virt_qemu_arm_v8a", and
"virt_qemu_riscv".

issue #4034
2022-08-17 12:03:26 +02:00
Piotr Tworek
5e93a5806b base-hw: Use softfp ABI on virt_qemu ARMv7.
The soft ABI implies purely software floating point implementation.
This is not the case for Genode however. For example core's
exception_vector.S uses vmsr instruction. This builds fine with with
GCC based toolchain, but clang with integrated-as complains:

src/core/spec/arm/exception_vector.S:122:2: error: instruction requires: VFP2
 vmsr fpexc, r1
 ^

Fix this by passing softfp to mfloat-abi command on ARMv7. This allows
usage of FP HW, but implies soft-floating point ABI.

Issue #4421
2022-02-15 10:23:58 +01:00
Stefan Kalkowski
6bd7f167a4 hw: remove rpi1/3 board support
The code moved to https://github.com/skalk/genode-rpi

Ref #4363
2022-01-19 12:38:12 +01:00
Tomasz Gajewski
f79d5d640f hw: irq controller and timer improvements for Rpi
* renamed rpi pic to Bcm2835_pic
* renamed rpi3 pic to Bcm2837_pic
* added bcm2837 control for setting prescaler value (to fix timer_accuracy)
* changed handling of all interrupts for rpi3 by cascading to bcm2835 pic
* rpi3 irq controller base address made consistent with rpi
* added usb controller memory region for pic on rpi3 (for SOF interrupts)

Ref #3415
2022-01-19 12:38:12 +01:00
Sebastian Sumpf
75509d77b5 base-hw: Remove 'riscv_qemu' and move to 'genode-riscv'
issue #4312
2021-12-17 15:04:48 +01:00
Norman Feske
890842dce2 base-hw/lib/mk/spec/cortex_a8/core-hw.inc (usb_armory) 2021-12-17 15:04:47 +01:00
Norman Feske
03047009b1 base: avoid implicit conversions
This patch is a prerequisite for compiling the code with
the warnings -Wconversion enabled.

Issue #23
2021-12-17 15:04:44 +01:00
Stefan Kalkowski
b12b0ed93d imx8q_evk: remove board support from repository
Moved to separate repo at https://github.com/skalk/genode-imx/

Fix #4301
2021-11-29 15:10:51 +01:00
Johannes Schlatow
7917c5d9ec Remove zynq_qemu platform and zynq nic driver
Moved to separate repo at https://github.com/jschlatow/genode-zynq

Fixes genodelabs/genode#4280
2021-11-29 15:10:51 +01:00
Martin Stein
ad059362d2 base-hw: reduce hardware-specific include paths
For base-hw Core, we used to add quite some hardware-specific include paths
to 'INC_DIR'. Generic code used to include, for instance, '<cpu.h>' and
'<translation_table.h>' using these implicit path resolutions. This commit
removes hardware-specific include paths except for

1) the '<board.h>' include paths (e.g., 'src/core/board/pbxa9'),
2) most architecture-specific include paths (e.g., 'src/core/spec/arm_v7'),
3) include paths that reflect usage of virtualization or ARM Trustzone
   (e.g., 'src/core/spec/arm/virtualization').

The first category is kept because, in contrast to the former "spec"-mechanism,
the board variable used for this type of resolution is not deprecated and the
board headers are meant to be the front end of hardware-specific headers
towards generic code which is why they must be available generically via
'<board.h>'.

The second category is kept because it was suggested by other maintainers that
simple arch-dependent headers (like for the declaration of a CPU state) should
not imply the inclusion of the whole '<board.h>' and because the architecture
is given also without the former "spec"-mechanism through the type of the build
directory. I think this is questionable but am fine with it.

The third category is kept because the whole way of saying whether
virtualization resp. ARM Trustzone is used is done in an out-dated manner and
changing it now would blow up this commit a lot and exceed the time that I'm
willing to spend. This category should be subject to a future issue.

Ref #4217
2021-10-13 14:46:53 +02:00
Martin Stein
49b09702b8 base-hw: don't include board.h from hardw. headers
The 'src/core/board/<board>/board.h' header is thought as front end of
hardware-specific headers of a given board towards the generic base-hw Core
code. Therefore it leads to problems (circular includes) if the board.h header
is included from within another hardware-specific header.

If hardware-specific headers access declarations from namespace Board in a
definition, the definition should be moved to a compilation unit that may
include board.h. If hardware-specific headers access declarations from board.h
in a declaration, they should either use the primary declaration from the
original header or, if the declaration must be selected according to the board,
another board-specific header should be introduced to reflect this abstraction.

This is applied by this commit for the current state of base-hw.

Ref #4217
2021-10-13 14:46:53 +02:00
Martin Stein
9de43a48b6 base-hw: conform pc board header
Normally, the board header can be found for each supported board under
'src/core/board/<BOARD>/board.h'. This was not the case for the board 'pc'
that was located under 'src/core/spec/x86_64/board.h'. The commit fixes this.

Ref #4217
2021-10-13 14:46:52 +02:00
Stefan Kalkowski
e7067050be base: extend cache maintainance functionality
Introduce two new cache maintainance functions:
* cache_clean_invalidate_data
* cache_invalidate_data
used to flush or invalidate data-cache lines.

Both functions are typically empty, accept for the ARM architecture.
The commit provides implementations for the base-hw kernel, and Fiasco.OC.

Fixes #4207
2021-06-25 11:43:41 +02:00
Sebastian Sumpf
6223ae4413 riscv: Interrupt controller support
- Enable the "platform-level interrupt controller" PLIC on base-hw
- The RISC-V specification offers only a register description, but no
  layout for the register set. This implies the layout is platform
  dependent, and therefore, implemented separately for Qemu

issue #4042
2021-03-12 12:01:38 +01:00
Sebastian Sumpf
f5cd12dcf9 base/base-hw: unify startup library builds
- Use 'select_from_repositories' for crt0.s of startup library
- Move RISC-V crt0.s to base (where the other archs are located)

issue #4019
2021-02-23 12:07:15 +01:00
Sebastian Sumpf
fd0e6685fc riscv: Use Qemu and update to ISA v1.10
- remove Spike/BBL support in favour of Qemu (>=4.2.1)
- add 'riscv_qemu' board, remove 'spike' board'
- update to privileged ISA v1.10 (from v1.9.1)
- use direct system calls for privileged core threads (they call into
  the kernel and don't use mode changing system calls, i.e. 'ecall',
  semantics)
- use 'OpenSBI' semtantics for SBI calls (to machine mode) instead of
  BBL

issue #4012
2021-02-23 12:02:44 +01:00
Norman Feske
8cc2662aac Remove support for the Muen separation kernel
Fixes #3995
Fixes #3994
2021-02-23 11:55:44 +01:00
Norman Feske
1ccf8a280c base-hw: simplify board support in external repo
Avoid use of REP_DIR in *.mk files to simplify the use of these files as
templates for a board hosted in a separate repository.

Use REP_INC_DIR for searching headers, thereby considering headers
hosted in an external repository.

Issue #3168
2021-01-25 13:58:10 +01:00
Stefan Kalkowski
bdd923406f base: remove SPEC variables of boards (fix #3971)
* Remove SPEC declarations from mk/spec
* Remove all board-specific REQUIRE declaratiions left
* Replace [have_spec <board>] run-script declarations with have_board where necessary
* Remove addition of BOARD variable to SPECS in toplevel Makefile
* Move board-specific directories in base-hw out of specs
2021-01-25 13:58:09 +01:00
Pirmin Duss
a4d5687510 base-hw: allow out of tree imx8 platforms
Issue #3911
2021-01-25 13:58:09 +01:00
Tomasz Gajewski
98798f18b5 Fix minor inconsistencies in mk files
Fixes #3972
2021-01-25 12:50:54 +01:00
Stefan Kalkowski
70f98fcc44 hw: implement Pd_session::managing_system for ATF
To access the ARM Trusted Firmware from the platform driver
fill the new `managing_system` call of the PD session with life resp.
do a SMC call on behalf of the client.

Fix #3816
2020-08-25 11:50:11 +02:00
Stefan Kalkowski
9f28f4f803 hw: avoid BASE_DIR relative path definitions
Fix #3728
2020-04-17 12:55:13 +02:00
Stefan Kalkowski
0e49336b96 Retire Exynos 5 support (fix #3725) 2020-04-17 12:53:57 +02:00
Stefan Kalkowski
941e918b46 vmm: unify armv7/v8 virtualization
Fix #3638
2020-04-17 12:52:02 +02:00
Stefan Kalkowski
74e75d7fbc hw: enable virtualization support for virt_qemu
Ref #3638
2020-04-17 12:51:53 +02:00
Stefan Kalkowski
f051065582 Retire OMAP4 support
Fix #2850
2020-04-17 12:39:32 +02:00
Piotr Tworek
585c4b8c69 hw: Add support for Qemu virt arm platforms.
This patch adds support for booting base-hw kernel on qemu-arm virt
machines. The arm_virt machine has 2GB of RAM, 2 Cortex A15 cores and
uses GICv2 interrupt controller. The arm_64_virt machine also has 2GB of
RAM, but has 4 Cortex A53 cores and uses GICv3. Both machines use PSCI
to boot additional CPU cores.

Fixes #3673
2020-04-17 12:39:32 +02:00
Stefan Kalkowski
6d48b5484d hw: correct the ARM cache maintainance operations
This commit fixes the following issues regarding cache maintainance
under ARM:

* read out I-, and D-cache line size at runtime and use the correct one
* remove 'update_data_region' call from unprivileged syscalls
* rename 'update_instr_region' syscall to 'cache_coherent_region' to
  reflect what it doing, namely make I-, and D-cache coherent
* restrict 'cache_coherent_region' syscall to one page at a time
* lookup the region given in a 'cache_coherent_region' syscall in the
  page-table of the PD to prevent machine exceptions in the kernel
* only clean D-cache lines, do not invalidate them when pages where
  added on Cortex-A8 and ARMv6 (MMU sees phys. memory here)
* remove unused code relicts of cache maintainance

In addition it introduces per architecture memory clearance functions
used by core, when preparing new dataspaces. Thereby, it optimizes:

* on ARMv7 using per-word assignments
* on ARMv8 using cacheline zeroing
* on x86_64 using 'rept stosq' assembler instruction

Fix #3685
2020-03-26 11:38:55 +01:00
Stefan Kalkowski
8cc48d5688 hw: be more accurate in synchronizing ASID/Pages
Fix #3651
2020-02-20 12:11:23 +01:00
Stefan Kalkowski
af29dcf557 hw: introduce virtualization support for ARMv8
Ref #3553
2019-11-21 14:29:36 +01:00
Stefan Kalkowski
02d68fdb97 hw: move arm virtualization to generic place
Ref #3553
2019-11-21 14:29:36 +01:00
Stefan Kalkowski
87a6368ba1 hw: implement multi-processor support for rpi3
Fix #3522
2019-11-19 14:42:22 +01:00
Stefan Kalkowski
1cbd77c806 hw: implement multi-processor support for i.MX8
Fix #3520
2019-11-19 14:42:22 +01:00
Stefan Kalkowski
7ced122ddc hw: support for i.MX8M Quad EVK
Fix #3426
2019-08-13 12:02:27 +02:00