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fd0e6685fc
genode/repos/base-hw/lib/mk/spec
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Sebastian Sumpf fd0e6685fc riscv: Use Qemu and update to ISA v1.10 
- remove Spike/BBL support in favour of Qemu (>=4.2.1)
- add 'riscv_qemu' board, remove 'spike' board'
- update to privileged ISA v1.10 (from v1.9.1)
- use direct system calls for privileged core threads (they call into
  the kernel and don't use mode changing system calls, i.e. 'ecall',
  semantics)
- use 'OpenSBI' semtantics for SBI calls (to machine mode) instead of
  BBL

issue #4012
2021-02-23 12:02:44 +01:00
..
arm riscv: Use Qemu and update to ISA v1.10 2021-02-23 12:02:44 +01:00
arm_64 base-hw: simplify board support in external repo 2021-01-25 13:58:10 +01:00
arm_v6 base-hw: simplify board support in external repo 2021-01-25 13:58:10 +01:00
arm_v7 base-hw: simplify board support in external repo 2021-01-25 13:58:10 +01:00
arm_v8 riscv: Use Qemu and update to ISA v1.10 2021-02-23 12:02:44 +01:00
cortex_a8 base-hw: simplify board support in external repo 2021-01-25 13:58:10 +01:00
cortex_a9 base-hw: simplify board support in external repo 2021-01-25 13:58:10 +01:00
cortex_a15 base-hw: simplify board support in external repo 2021-01-25 13:58:10 +01:00
riscv riscv: Use Qemu and update to ISA v1.10 2021-02-23 12:02:44 +01:00
x86_64 riscv: Use Qemu and update to ISA v1.10 2021-02-23 12:02:44 +01:00