mirror of
https://github.com/genodelabs/genode.git
synced 2025-02-20 09:46:20 +00:00
hw: eliminate -DNR_OF_CPUS, use constant instead
Fix genodelabs/genode#4752
This commit is contained in:
Stefan Kalkowski
Christian Helmuth
parent
1d5fc3ef60
commit
0212f94809
@ -25,10 +25,6 @@ REP_INC_DIR += src/bootstrap
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REP_INC_DIR += src/include
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REP_INC_DIR += src/core/include # for boot_modules.h only
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# configure multiprocessor mode
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NR_OF_CPUS ?= 1
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CC_OPT += -Wa,--defsym -Wa,NR_OF_CPUS=$(NR_OF_CPUS) -DNR_OF_CPUS=$(NR_OF_CPUS)
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TMP := $(call select_from_repositories,lib/mk/bootstrap-hw.inc)
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BASE_HW_DIR := $(TMP:%/lib/mk/bootstrap-hw.inc=%)
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@ -66,10 +66,6 @@ SRC_CC += heartbeat.cc
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# provide Genode version information
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include $(BASE_DIR)/src/core/version.inc
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# configure multiprocessor mode
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NR_OF_CPUS ?= 1
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CC_OPT += -Wa,--defsym -Wa,NR_OF_CPUS=$(NR_OF_CPUS) -DNR_OF_CPUS=$(NR_OF_CPUS)
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TMP := $(call select_from_repositories,lib/mk/core-hw.inc)
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BASE_HW_DIR := $(TMP:%/lib/mk/core-hw.inc=%)
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@ -9,6 +9,4 @@ SRC_CC += bootstrap/spec/arm/imx6_platform.cc
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SRC_CC += bootstrap/spec/arm/arm_v7_cpu.cc
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SRC_CC += hw/spec/32bit/memory_map.cc
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NR_OF_CPUS = 4
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include $(call select_from_repositories,lib/mk/bootstrap-hw.inc)
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@ -7,8 +7,6 @@ SRC_CC += bootstrap/spec/arm/arm_v7_cpu.cc
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SRC_CC += hw/spec/32bit/memory_map.cc
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SRC_S += bootstrap/spec/arm/crt0.s
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NR_OF_CPUS = 2
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#
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# we need more specific compiler hints for some 'special' assembly code
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# override -march=armv7-a because it conflicts with -mcpu=cortex-a7
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@ -9,6 +9,4 @@ SRC_CC += bootstrap/spec/arm/imx6_platform.cc
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SRC_CC += bootstrap/spec/arm/arm_v7_cpu.cc
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SRC_CC += hw/spec/32bit/memory_map.cc
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NR_OF_CPUS = 1
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include $(call select_from_repositories,lib/mk/bootstrap-hw.inc)
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@ -7,8 +7,6 @@ SRC_CC += bootstrap/spec/arm/gicv2.cc
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SRC_CC += hw/spec/32bit/memory_map.cc
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SRC_S += bootstrap/spec/arm/crt0.s
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NR_OF_CPUS = 2
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CC_MARCH = -march=armv7ve -mtune=cortex-a15 -mfpu=vfpv3 -mfloat-abi=softfp
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include $(call select_from_repositories,lib/mk/bootstrap-hw.inc)
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@ -9,6 +9,4 @@ SRC_CC += bootstrap/spec/arm/imx6_platform.cc
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SRC_CC += bootstrap/spec/arm/arm_v7_cpu.cc
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SRC_CC += hw/spec/32bit/memory_map.cc
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NR_OF_CPUS = 4
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include $(call select_from_repositories,lib/mk/bootstrap-hw.inc)
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@ -12,7 +12,5 @@ REP_INC_DIR += src/core/board/imx6q_sabrelite
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# add C++ sources
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SRC_CC += platform_services.cc
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NR_OF_CPUS = 4
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# include less specific configuration
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include $(call select_from_repositories,lib/mk/spec/cortex_a9/core-hw.inc)
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@ -22,8 +22,6 @@ SRC_CC += vm_session_component.cc
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# add assembly sources
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SRC_S += spec/arm_v7/virtualization/exception_vector.s
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NR_OF_CPUS = 2
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#
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# we need more specific compiler hints for some 'special' assembly code
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# override -march=armv7-a because it conflicts with -mcpu=cortex-a7
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@ -12,7 +12,5 @@ REP_INC_DIR += src/core/board/nit6_solox
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# add C++ sources
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SRC_CC += platform_services.cc
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NR_OF_CPUS = 1
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# include less specific configuration
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include $(call select_from_repositories,lib/mk/spec/cortex_a9/core-hw.inc)
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@ -11,7 +11,5 @@ REP_INC_DIR += src/core/board/pbxa9
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# add C++ sources
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SRC_CC += platform_services.cc
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NR_OF_CPUS = 1
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# include less specific configuration
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include $(call select_from_repositories,lib/mk/spec/cortex_a9/core-hw.inc)
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@ -14,8 +14,6 @@ SRC_CC += vm_session_component.cc
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SRC_S += spec/arm_v7/virtualization/exception_vector.s
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NR_OF_CPUS = 2
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CC_MARCH = -march=armv7ve -mtune=cortex-a15 -mfpu=vfpv3 -mfloat-abi=softfp
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include $(call select_from_repositories,lib/mk/spec/cortex_a15/core-hw.inc)
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@ -12,7 +12,5 @@ REP_INC_DIR += src/core/board/wand_quad
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# add C++ sources
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SRC_CC += platform_services.cc
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NR_OF_CPUS = 4
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# include less specific configuration
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include $(call select_from_repositories,lib/mk/spec/cortex_a9/core-hw.inc)
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@ -7,8 +7,6 @@ SRC_CC += lib/base/arm_64/kernel/interface.cc
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SRC_CC += spec/64bit/memory_map.cc
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SRC_S += bootstrap/spec/arm_64/crt0.s
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NR_OF_CPUS = 4
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vpath spec/64bit/memory_map.cc $(call select_from_repositories,src/lib/hw)
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include $(call select_from_repositories,lib/mk/bootstrap-hw.inc)
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@ -13,7 +13,5 @@ SRC_CC += vm_session_component.cc
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#add assembly sources
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SRC_S += spec/arm_v8/virtualization/exception_vector.s
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NR_OF_CPUS = 4
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# include less specific configuration
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include $(call select_from_repositories,lib/mk/spec/arm_v8/core-hw.inc)
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@ -8,8 +8,6 @@
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SRC_CC += kernel/cpu_up.cc
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SRC_CC += kernel/lock.cc
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NR_OF_CPUS = 1
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# include less specific configuration
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include $(call select_from_repositories,lib/mk/spec/arm_v7/core-hw.inc)
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@ -6,6 +6,4 @@ SRC_S += bootstrap/spec/x86_64/crt0_translation_table.s
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SRC_CC += hw/spec/64bit/memory_map.cc
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NR_OF_CPUS = 32
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include $(call select_from_repositories,lib/mk/bootstrap-hw.inc)
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@ -39,7 +39,5 @@ SRC_CC += spec/64bit/memory_map.cc
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vpath spec/64bit/memory_map.cc $(call select_from_repositories,src/lib/hw)
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NR_OF_CPUS = 32
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# include less specific configuration
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include $(call select_from_repositories,lib/mk/core-hw.inc)
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@ -27,6 +27,8 @@ namespace Board {
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using Psci = Hw::Psci<Hw::Psci_smc_functor>;
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using Pic = Hw::Gicv2;
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static constexpr bool NON_SECURE = true;
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enum { NR_OF_CPUS = 2 };
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};
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#endif /* _SRC__BOOTSTRAP__SPEC__VIRT__QEMU_H_ */
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@ -66,7 +66,7 @@ unsigned Bootstrap::Platform::enable_mmu()
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::Board::Pic pic { };
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/* primary cpu wakes up all others */
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if (primary_cpu && NR_OF_CPUS > 1) {
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if (primary_cpu && ::Board::NR_OF_CPUS > 1) {
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Cpu::invalidate_data_cache();
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primary_cpu = false;
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Cpu::wake_up_all_cpus(&_start_setup_stack);
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@ -31,6 +31,8 @@ namespace Board {
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static void wake_up_all_cpus(void*);
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};
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enum { NR_OF_CPUS = 4 };
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using Hw::Pic;
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};
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@ -18,6 +18,13 @@
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#include <base/internal/globals.h>
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#include <base/internal/unmanaged_singleton.h>
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using namespace Genode;
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static constexpr size_t STACK_SIZE = 0x2000;
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size_t bootstrap_stack_size = STACK_SIZE;
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uint8_t bootstrap_stack[Board::NR_OF_CPUS][STACK_SIZE]
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__attribute__((aligned(get_page_size())));
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Bootstrap::Platform & Bootstrap::platform() {
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return *unmanaged_singleton<Bootstrap::Platform>(); }
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@ -46,7 +46,7 @@ class Bootstrap::Platform
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Memory_region_array early_ram_regions { };
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Memory_region_array late_ram_regions { };
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Mmio_space const core_mmio;
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unsigned cpus { NR_OF_CPUS };
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unsigned cpus { ::Board::NR_OF_CPUS };
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::Board::Boot_info info { };
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Board();
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@ -63,8 +63,10 @@
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mrcne p15, 0, sp, c0, c0, 5 /* read multiprocessor affinity register */
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andne sp, sp, #0xff /* set cpu id for non-boot cpu */
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adr r0, _start_stack /* load stack address into r0 */
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adr r1, _start_stack_size /* load stack size per cpu into r1 */
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adr r0, _bootstrap_stack_local /* load stack address into r0 */
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adr r1, _bootstrap_stack_size_local /* load stack size per cpu into r1 */
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ldr r0, [r0]
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ldr r1, [r1]
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ldr r1, [r1]
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add sp, #1 /* calculate stack start for CPU */
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@ -101,11 +103,8 @@
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_bss_local_end:
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.long _bss_end
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_start_stack_size:
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.long STACK_SIZE
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_bootstrap_stack_local:
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.long bootstrap_stack
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.align 3
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_start_stack:
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.rept NR_OF_CPUS
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.space STACK_SIZE
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.endr
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_bootstrap_stack_size_local:
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.long bootstrap_stack_size
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@ -145,7 +145,8 @@ unsigned Bootstrap::Platform::enable_mmu()
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Cpu::Ttbr::Baddr::masked((Genode::addr_t)core_pd->table_base);
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/* primary cpu wakes up all others */
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if (primary && NR_OF_CPUS > 1) Cpu::wake_up_all_cpus(&_crt0_start_secondary);
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if (primary && ::Board::NR_OF_CPUS > 1)
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Cpu::wake_up_all_cpus(&_crt0_start_secondary);
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while (Cpu::current_privilege_level() > Cpu::Current_el::EL1) {
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if (Cpu::current_privilege_level() == Cpu::Current_el::EL3) {
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@ -114,19 +114,12 @@
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** Initialize stack **
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**********************/
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.set STACK_SIZE, 0x2000
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_cpu_number
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ldr x1, =_crt0_start_stack
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ldr x2, [x1]
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ldr x1, =bootstrap_stack
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ldr x2, =bootstrap_stack_size
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ldr x2, [x2]
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add x0, x0, #1
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mul x0, x0, x2
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add x1, x1, x0
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mov sp, x1
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bl init
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.p2align 4
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.rept NR_OF_CPUS
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.space STACK_SIZE
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.endr
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_crt0_start_stack:
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.quad STACK_SIZE
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@ -143,16 +143,14 @@ __gdt:
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movq $1, %rcx
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lock xaddq %rcx, (%rax)
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/* if more CPUs started than supported, then stop them */
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cmp $NR_OF_CPUS, %rcx
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jge 1f
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/* calculate stack depending on CPU counter */
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movq $STACK_SIZE, %rax
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leaq bootstrap_stack_size@GOTPCREL(%rip),%rax
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movq (%rax), %rax
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movq (%rax), %rax
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inc %rcx
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mulq %rcx
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movq %rax, %rcx
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leaq __bootstrap_stack@GOTPCREL(%rip),%rax
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leaq bootstrap_stack@GOTPCREL(%rip),%rax
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movq (%rax), %rsp
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addq %rcx, %rsp
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@ -182,10 +180,6 @@ __gdt:
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jmp 1b
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.global bootstrap_stack_size
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bootstrap_stack_size:
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.quad STACK_SIZE
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/******************************************
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** Global Descriptor Table (GDT) **
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** See Intel SDM Vol. 3A, section 3.5.1 **
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@ -236,14 +230,7 @@ __gdt:
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*********************************/
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.bss
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/* stack of the temporary initial environment */
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.p2align 12
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.globl __bootstrap_stack
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__bootstrap_stack:
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.rept NR_OF_CPUS
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.space STACK_SIZE
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.endr
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.globl __initial_ax
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__initial_ax:
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@ -31,7 +31,7 @@ extern "C" Genode::addr_t __initial_ax;
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extern "C" Genode::addr_t __initial_bx;
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/* pointer to stack base */
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extern "C" Genode::addr_t __bootstrap_stack;
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extern "C" Genode::addr_t bootstrap_stack;
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/* number of booted CPUs */
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extern "C" Genode::addr_t __cpus_booted;
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@ -296,7 +296,7 @@ unsigned Bootstrap::Platform::enable_mmu()
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Cpu::Cr3::write(Cpu::Cr3::Pdb::masked((addr_t)core_pd->table_base));
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addr_t const stack_base = reinterpret_cast<addr_t>(&__bootstrap_stack);
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addr_t const stack_base = reinterpret_cast<addr_t>(&bootstrap_stack);
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addr_t const this_stack = reinterpret_cast<addr_t>(&stack_base);
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addr_t const cpu_id = (this_stack - stack_base) / bootstrap_stack_size;
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@ -17,15 +17,20 @@
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/* base-hw internal includes */
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#include <hw/spec/x86_64/pc_board.h>
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/*
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* As long as Board::NR_OF_CPUS is used as constant within pic.h
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* we sadly have to include Hw::Pc_board into the namespace
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* before including pic.h. This will change as soon as the number
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* O CPUs is only define per function
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*/
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namespace Board { using namespace Hw::Pc_board; };
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/* base-hw Core includes */
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#include <spec/x86_64/pic.h>
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#include <spec/x86_64/pit.h>
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#include <spec/x86_64/cpu.h>
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namespace Board {
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using namespace Hw::Pc_board;
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class Pic : public Local_interrupt_controller { };
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enum {
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@ -40,7 +40,8 @@ namespace Board {
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TIMER_IRQ = 30 /* PPI IRQ 14 */,
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VT_TIMER_IRQ = 27,
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VT_MAINTAINANCE_IRQ = 25,
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VCPU_MAX = 16
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VCPU_MAX = 16,
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NR_OF_CPUS = 2,
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};
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};
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@ -34,6 +34,7 @@ namespace Board {
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using namespace Hw::Virt_qemu_board;
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enum {
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NR_OF_CPUS = 4,
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TIMER_IRQ = 30, /* PPI IRQ 14 */
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VT_TIMER_IRQ = 11 + 16,
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VT_MAINTAINANCE_IRQ = 9 + 16,
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@ -47,7 +47,7 @@ static inline bool running_in_kernel()
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{
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addr_t const stack_base = reinterpret_cast<addr_t>(&kernel_stack);
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static constexpr size_t stack_size =
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NR_OF_CPUS * Kernel::Cpu::KERNEL_STACK_SIZE;
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Board::NR_OF_CPUS * Kernel::Cpu::KERNEL_STACK_SIZE;
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/* check stack variable against kernel stack area */
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return ((addr_t)&stack_base) >= stack_base &&
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@ -160,7 +160,7 @@ Cpu_job & Cpu::schedule()
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Genode::size_t kernel_stack_size = Cpu::KERNEL_STACK_SIZE;
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Genode::uint8_t kernel_stack[NR_OF_CPUS][Cpu::KERNEL_STACK_SIZE]
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Genode::uint8_t kernel_stack[Board::NR_OF_CPUS][Cpu::KERNEL_STACK_SIZE]
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__attribute__((aligned(Genode::get_page_size())));
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@ -201,7 +201,7 @@ class Kernel::Cpu_pool
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Inter_processor_work_list _global_work_list {};
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unsigned _nr_of_cpus;
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Genode::Constructible<Cpu> _cpus[NR_OF_CPUS];
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Genode::Constructible<Cpu> _cpus[Board::NR_OF_CPUS];
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public:
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@ -65,7 +65,7 @@ struct Hypervisor::Host_context
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static Hypervisor::Host_context & host_context(Cpu & cpu)
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{
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static Genode::Constructible<Hypervisor::Host_context>
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host_context[NR_OF_CPUS];
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host_context[Board::NR_OF_CPUS];
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if (!host_context[cpu.id()].constructed()) {
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host_context[cpu.id()].construct();
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Hypervisor::Host_context & c = *host_context[cpu.id()];
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@ -32,7 +32,8 @@ using Kernel::Vm;
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static Genode::Vm_state & host_context(Cpu & cpu)
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{
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static Genode::Constructible<Genode::Vm_state> host_context[NR_OF_CPUS];
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static Genode::Constructible<Genode::Vm_state>
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host_context[Board::NR_OF_CPUS];
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if (!host_context[cpu.id()].constructed()) {
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host_context[cpu.id()].construct();
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@ -85,7 +85,7 @@ class Board::Global_interrupt_controller : public Genode::Mmio
|
||||
};
|
||||
|
||||
unsigned _irte_count = 0; /* number of redirection table entries */
|
||||
uint8_t _lapic_id[NR_OF_CPUS]; /* unique name of the LAPIC of each CPU */
|
||||
uint8_t _lapic_id[Board::NR_OF_CPUS]; /* unique name of the LAPIC of each CPU */
|
||||
Irq_mode _irq_mode[IRQ_COUNT];
|
||||
|
||||
/**
|
||||
@ -221,7 +221,7 @@ class Board::Local_interrupt_controller : public Genode::Mmio
|
||||
|
||||
void store_apic_id(unsigned const cpu_id)
|
||||
{
|
||||
if (cpu_id < NR_OF_CPUS) {
|
||||
if (cpu_id < Board::NR_OF_CPUS) {
|
||||
Id::access_t const lapic_id = read<Id>();
|
||||
_global_irq_ctrl.lapic_id(cpu_id, (unsigned char)((lapic_id >> 24) & 0xff));
|
||||
}
|
||||
|
||||
@ -22,8 +22,8 @@ namespace Hw { template <typename> struct Boot_info; }
|
||||
template <typename PLAT_INFO>
|
||||
struct Hw::Boot_info
|
||||
{
|
||||
using Mapping_pool = Genode::Array<Mapping, 32>;
|
||||
using Kernel_irqs = Genode::Array<unsigned, NR_OF_CPUS + 1>;
|
||||
using Mapping_pool = Genode::Array<Mapping, 32>;
|
||||
using Kernel_irqs = Genode::Array<unsigned, 32>;
|
||||
|
||||
addr_t const table;
|
||||
addr_t const table_allocator;
|
||||
|
||||
@ -26,6 +26,7 @@ namespace Hw::Imx53_qsb_board {
|
||||
enum {
|
||||
UART_BASE = UART_1_MMIO_BASE,
|
||||
UART_CLOCK = 0, /* ignored value */
|
||||
NR_OF_CPUS = 1,
|
||||
};
|
||||
}
|
||||
|
||||
|
||||
@ -31,6 +31,7 @@ namespace Hw::Imx6q_sabrelite_board {
|
||||
UART_BASE = UART_2_MMIO_BASE,
|
||||
UART_SIZE = UART_2_MMIO_SIZE,
|
||||
UART_CLOCK = 0, /* dummy value, not used */
|
||||
NR_OF_CPUS = 4
|
||||
};
|
||||
}
|
||||
|
||||
|
||||
@ -29,6 +29,7 @@ namespace Hw::Imx7d_sabre_board {
|
||||
enum {
|
||||
UART_BASE = UART_1_MMIO_BASE,
|
||||
UART_CLOCK = 0, /* unsued value */
|
||||
NR_OF_CPUS = 2
|
||||
};
|
||||
}
|
||||
|
||||
|
||||
@ -31,6 +31,7 @@ namespace Hw::Nit6_solox_board {
|
||||
UART_BASE = UART_1_MMIO_BASE,
|
||||
UART_SIZE = UART_1_MMIO_SIZE,
|
||||
UART_CLOCK = 0, /* dummy value, not used */
|
||||
NR_OF_CPUS = 1
|
||||
};
|
||||
}
|
||||
|
||||
|
||||
@ -31,6 +31,7 @@ namespace Hw::Pbxa9_board {
|
||||
enum {
|
||||
UART_BASE = PL011_0_MMIO_BASE,
|
||||
UART_CLOCK = PL011_0_CLOCK,
|
||||
NR_OF_CPUS = 1,
|
||||
};
|
||||
}
|
||||
|
||||
|
||||
@ -31,6 +31,7 @@ namespace Hw::Wand_quad_board {
|
||||
UART_BASE = UART_1_MMIO_BASE,
|
||||
UART_SIZE = UART_1_MMIO_SIZE,
|
||||
UART_CLOCK = 0, /* dummy value, not used */
|
||||
NR_OF_CPUS = 4
|
||||
};
|
||||
}
|
||||
|
||||
|
||||
@ -23,6 +23,8 @@ namespace Hw::Pc_board {
|
||||
struct Boot_info;
|
||||
struct Serial;
|
||||
enum Dummies { UART_BASE, UART_CLOCK };
|
||||
|
||||
enum { NR_OF_CPUS = 32 };
|
||||
}
|
||||
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user