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https://github.com/genodelabs/genode.git
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hw: move all imx7d specifics to imx repository
Ref genodelabs/genode#5252
This commit is contained in:
Stefan Kalkowski
Norman Feske
parent
ed522d51c8
commit
5a8d149fe3
@ -1 +0,0 @@
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arm_v7a
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0x88000000
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REP_INC_DIR += src/bootstrap/board/imx7d_sabre
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SRC_CC += bootstrap/spec/arm/cortex_a15_cpu.cc
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SRC_CC += bootstrap/spec/arm/gicv2.cc
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SRC_CC += bootstrap/board/imx7d_sabre/platform.cc
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include $(call select_from_repositories,lib/mk/spec/arm_v7/bootstrap-hw.inc)
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#
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# we need more specific compiler hints for some 'special' assembly code
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# override -march=armv7-a because it conflicts with -mcpu=cortex-a7
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#
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CC_MARCH = -mcpu=cortex-a7+nofp -mfpu=vfpv3
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@ -1,32 +0,0 @@
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#
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# \brief Build config for Genodes core process
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# \author Stefan Kalkowski
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# \date 2015-02-09
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#
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# add include paths
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REP_INC_DIR += src/core/board/imx7d_sabre
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REP_INC_DIR += src/core/spec/arm/virtualization
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# add C++ sources
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SRC_CC += kernel/vm_thread_on.cc
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SRC_CC += spec/arm/generic_timer.cc
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SRC_CC += spec/arm/gicv2.cc
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SRC_CC += spec/arm_v7/virtualization/kernel/vm.cc
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SRC_CC += spec/arm/virtualization/gicv2.cc
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SRC_CC += spec/arm/virtualization/platform_services.cc
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SRC_CC += spec/arm/virtualization/vm_session_component.cc
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SRC_CC += vm_session_common.cc
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SRC_CC += vm_session_component.cc
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# add assembly sources
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SRC_S += spec/arm_v7/virtualization/exception_vector.s
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#
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# we need more specific compiler hints for some 'special' assembly code
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# override -march=armv7-a because it conflicts with -mcpu=cortex-a7
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#
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CC_MARCH = -mcpu=cortex-a7 -mfpu=vfpv3 -mfloat-abi=softfp
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# include less specific configuration
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include $(call select_from_repositories,lib/mk/spec/cortex_a15/core-hw.inc)
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@ -1 +0,0 @@
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include $(GENODE_DIR)/repos/base-hw/recipes/src/base-hw_content.inc
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@ -1 +0,0 @@
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2024-06-19 3dca0840b93ba063d6368b5713b652706c3bc07e
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@ -1,2 +0,0 @@
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base-hw
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base
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@ -1,29 +0,0 @@
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/*
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* \brief Imx7 Sabrelite specific board definitions
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* \author Stefan Kalkowski
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* \date 2018-11-07
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*/
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/*
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* Copyright (C) 2018 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU Affero General Public License version 3.
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*/
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#ifndef _SRC__BOOTSTRAP__SPEC__IMX7_SABRELITE__BOARD_H_
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#define _SRC__BOOTSTRAP__SPEC__IMX7_SABRELITE__BOARD_H_
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#include <hw/spec/arm/imx7d_sabre_board.h>
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#include <hw/spec/arm/lpae.h>
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#include <spec/arm/cpu.h>
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#include <hw/spec/arm/gicv2.h>
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namespace Board {
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using namespace Hw::Imx7d_sabre_board;
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using Pic = Hw::Gicv2;
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static constexpr bool NON_SECURE = true;
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}
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#endif /* _SRC__BOOTSTRAP__SPEC__IMX&_SABRELITE__BOARD_H_ */
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@ -1,249 +0,0 @@
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/*
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* \brief Parts of platform that are specific to Imx7 sabrelite
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* \author Stefan Kalkowski
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* \date 2018-11-07
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*/
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/*
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* Copyright (C) 2018 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU Affero General Public License version 3.
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*/
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#include <platform.h>
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#include <hw/memory_map.h>
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#include <spec/arm/imx_aipstz.h>
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#include <spec/arm/cortex_a7_a15_virtualization.h>
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extern "C" void * _start_setup_stack; /* entrypoint for non-boot CPUs */
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using namespace Board;
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Bootstrap::Platform::Board::Board()
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:
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early_ram_regions(Memory_region { RAM_0_BASE, RAM_0_SIZE }),
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core_mmio(Memory_region { IRQ_CONTROLLER_BASE, IRQ_CONTROLLER_SIZE },
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Memory_region { UART_1_MMIO_BASE, UART_1_MMIO_SIZE })
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{
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Aipstz aipstz_1(AIPS_1_MMIO_BASE);
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Aipstz aipstz_2(AIPS_2_MMIO_BASE);
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Aipstz aipstz_3(AIPS_3_MMIO_BASE);
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/* configure CSU */
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for (addr_t start = 0x303e0000; start <= 0x303e00fc; start += 4)
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*(volatile addr_t *)start = 0x00ff00ff;
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static volatile unsigned long initial_values[][2] {
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// CCM (Clock Control Module)
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{ 0x30384000, 0x3 },
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{ 0x30384040, 0x3 },
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{ 0x30384060, 0x3 },
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{ 0x30384130, 0x3 },
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{ 0x30384160, 0x0 },
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{ 0x303844f0, 0x3 },
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{ 0x30384510, 0x0 },
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{ 0x30384520, 0x3 },
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{ 0x303846d0, 0x0 },
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{ 0x303846e0, 0x0 },
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{ 0x30384780, 0x0 },
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{ 0x30384790, 0x0 },
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{ 0x303847a0, 0x0 },
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{ 0x303847b0, 0x0 },
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{ 0x303847c0, 0x3 },
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{ 0x30384880, 0x0 },
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{ 0x303848a0, 0x0 },
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{ 0x30384950, 0x0 },
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{ 0x30384960, 0x0 },
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{ 0x30384970, 0x0 },
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{ 0x30384980, 0x0 },
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{ 0x30384990, 0x0 },
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{ 0x303849a0, 0x0 },
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{ 0x303849d0, 0x0 },
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{ 0x303849e0, 0x0 },
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{ 0x303849f0, 0x0 },
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{ 0x303600c0, 0xd2605a56 },
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{ 0x303600d0, 0xd2d2d256 },
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{ 0x303600d4, 0xd2d2d256 },
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{ 0x303600d8, 0xd2d2d256 },
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{ 0x303600dc, 0xd2d2d256 },
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{ 0x303600e0, 0x80000600 },
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{ 0x303600f0, 0x101b },
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// IOMUXC (IOMUX Controller)
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{ 0x30330030, 0x14 },
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{ 0x30330034, 0x10 },
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{ 0x30330074, 0x2 },
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{ 0x30330078, 0x2 },
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{ 0x3033007c, 0x2 },
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{ 0x30330080, 0x2 },
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{ 0x30330084, 0x2 },
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{ 0x30330088, 0x2 },
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{ 0x3033008c, 0x2 },
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{ 0x30330090, 0x2 },
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{ 0x30330094, 0x2 },
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{ 0x30330098, 0x2 },
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{ 0x3033009c, 0x2 },
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{ 0x303300a0, 0x2 },
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{ 0x303300c4, 0x0 },
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{ 0x30330150, 0x10 },
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{ 0x30330154, 0x10 },
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{ 0x30330210, 0x13 },
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{ 0x30330214, 0x13 },
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{ 0x3033021c, 0x1 },
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{ 0x30330220, 0x1 },
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{ 0x30330224, 0x1 },
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{ 0x303302e4, 0x1 },
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{ 0x303302e8, 0x1 },
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{ 0x303302ec, 0x1 },
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{ 0x303302f0, 0x1 },
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{ 0x303302f4, 0x1 },
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{ 0x303302f8, 0x1 },
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{ 0x303302fc, 0x1 },
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{ 0x30330300, 0x1 },
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{ 0x30330304, 0x1 },
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{ 0x30330308, 0x1 },
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{ 0x3033030c, 0x1 },
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{ 0x30330310, 0x1 },
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{ 0x30330318, 0x59 },
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{ 0x303303c0, 0x7f },
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{ 0x303303c4, 0x7f },
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{ 0x303303f4, 0x34 },
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{ 0x303303f8, 0x59 },
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{ 0x303303fc, 0x59 },
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{ 0x30330400, 0x59 },
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{ 0x30330404, 0x19 },
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{ 0x30330408, 0x59 },
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{ 0x3033040c, 0x59 },
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{ 0x30330410, 0x59 },
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{ 0x30330414, 0x59 },
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{ 0x30330418, 0x59 },
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{ 0x3033041c, 0x59 },
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{ 0x30330440, 0x19 },
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{ 0x30330444, 0x59 },
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{ 0x30330448, 0x59 },
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{ 0x3033044c, 0x59 },
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{ 0x30330450, 0x59 },
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{ 0x30330454, 0x59 },
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{ 0x30330458, 0x59 },
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{ 0x3033045c, 0x59 },
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{ 0x30330460, 0x59 },
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{ 0x30330464, 0x59 },
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{ 0x30330468, 0x19 },
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{ 0x30330480, 0x7f },
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{ 0x30330484, 0x7f },
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{ 0x3033048c, 0x2 },
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{ 0x30330490, 0x2 },
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{ 0x30330494, 0x2 },
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{ 0x3033049c, 0x1 },
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{ 0x303304a0, 0x1 },
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{ 0x303304a4, 0x1 },
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{ 0x303304a8, 0x1 },
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{ 0x303304ac, 0x1 },
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{ 0x303304b0, 0x1 },
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{ 0x303304b4, 0x1 },
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{ 0x303304b8, 0x1 },
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{ 0x303304bc, 0x1 },
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{ 0x303304c0, 0x1 },
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{ 0x303304c4, 0x1 },
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{ 0x303304c8, 0x1 },
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{ 0x30330544, 0x1 },
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{ 0x30330548, 0x1 },
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{ 0x3033054c, 0x1 },
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{ 0x303305dc, 0x1 },
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{ 0x303305e0, 0x1 },
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{ 0x303305ec, 0x3 },
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{ 0x303305f0, 0x3 }
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};
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unsigned num_values = sizeof(initial_values) / (2*sizeof(unsigned long));
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for (unsigned i = 0; i < num_values; i++)
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*((volatile unsigned long*)initial_values[i][0]) = initial_values[i][1];
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}
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static inline void switch_to_supervisor_mode(unsigned cpu_id)
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{
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using Cpsr = Hw::Arm_cpu::Psr;
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Cpsr::access_t cpsr = 0;
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Cpsr::M::set(cpsr, Cpsr::M::SVC);
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Cpsr::F::set(cpsr, 1);
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Cpsr::I::set(cpsr, 1);
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Genode::addr_t const stack = Hw::Mm::hypervisor_stack().base +
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(cpu_id+1) * 0x1000;
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asm volatile (
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"msr sp_svc, sp \n" /* copy current mode's sp */
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"msr lr_svc, lr \n" /* copy current mode's lr */
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"msr elr_hyp, lr \n" /* copy current mode's lr to hyp lr */
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"msr sp_hyp, %[stack] \n" /* copy to hyp stack pointer */
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"msr spsr_cxfs, %[cpsr] \n" /* set psr for supervisor mode */
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"adr lr, 1f \n" /* load exception return address */
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"eret \n" /* exception return */
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"1:":: [cpsr] "r" (cpsr), [stack] "r" (stack));
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}
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unsigned Bootstrap::Platform::enable_mmu()
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{
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static volatile bool primary_cpu = true;
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static unsigned long timer_freq = Cpu::Cntfrq::read();
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unsigned cpu = Cpu::Mpidr::Aff_0::get(Cpu::Mpidr::read());
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/* locally initialize interrupt controller */
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::Board::Pic pic { };
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prepare_nonsecure_world(timer_freq);
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prepare_hypervisor((addr_t)core_pd->table_base);
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switch_to_supervisor_mode(cpu);
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Cpu::Sctlr::init();
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Cpu::Cpsr::init();
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/* primary cpu wakes up all others */
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if (primary_cpu && NR_OF_CPUS > 1) {
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Cpu::invalidate_data_cache();
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primary_cpu = false;
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Cpu::wake_up_all_cpus(&_start_setup_stack);
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}
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Cpu::enable_mmu_and_caches((Genode::addr_t)core_pd->table_base);
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return cpu;
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}
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void Board::Cpu::wake_up_all_cpus(void * const ip)
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{
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struct Src : Genode::Mmio<0x84>
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{
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struct A7_cr0 : Register<0x4, 32>
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{
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struct Core1_por_reset : Bitfield<1,1> {};
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struct Core1_soft_reset : Bitfield<5,1> {};
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};
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struct A7_cr1 : Register<0x8, 32>
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{
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struct Core1_enable : Bitfield<1,1> {};
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};
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struct Gpr3 : Register<0x7c, 32> {}; /* ep core 1 */
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struct Gpr4 : Register<0x80, 32> {}; /* ep core 1 */
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Src(void * const entry) : Mmio({(char *)SRC_MMIO_BASE, Mmio::SIZE})
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{
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write<Gpr3>((Gpr3::access_t)entry);
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write<Gpr4>((Gpr4::access_t)entry);
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A7_cr0::access_t v0 = read<A7_cr0>();
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A7_cr0::Core1_soft_reset::set(v0,1);
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write<A7_cr0>(v0);
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A7_cr1::access_t v1 = read<A7_cr1>();
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A7_cr1::Core1_enable::set(v1,1);
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write<A7_cr1>(v1);
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}
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};
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Src src(ip);
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}
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@ -1,36 +0,0 @@
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/*
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* \brief Board driver for core
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* \author Stefan Kalkowski
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* \date 2018-11-07
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*/
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/*
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* Copyright (C) 2018 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
|
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* under the terms of the GNU Affero General Public License version 3.
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*/
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#ifndef _CORE__SPEC__IMX7D_SABRE__BOARD_H_
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#define _CORE__SPEC__IMX7D_SABRE__BOARD_H_
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/* base-hw internal includes */
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#include <hw/spec/arm/imx7d_sabre_board.h>
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/* base-hw core includes */
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#include <spec/arm/virtualization/gicv2.h>
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#include <spec/arm/generic_timer.h>
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#include <spec/arm/cpu/vcpu_state_virtualization.h>
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#include <spec/arm/virtualization/board.h>
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#include <spec/cortex_a15/cpu.h>
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namespace Board {
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using namespace Hw::Imx7d_sabre_board;
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struct Virtual_local_pic {};
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enum { TIMER_IRQ = 30, VCPU_MAX = 16 };
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}
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#endif /* _CORE__SPEC__IMX7_SABRELITE__BOARD_H_ */
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@ -1,37 +0,0 @@
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/*
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* \brief Imx7 Sabrelite specific board definitions
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* \author Stefan Kalkowski
|
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* \date 2018-11-07
|
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*/
|
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|
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/*
|
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* Copyright (C) 2018 Genode Labs GmbH
|
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*
|
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* This file is part of the Genode OS framework, which is distributed
|
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* under the terms of the GNU Affero General Public License version 3.
|
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*/
|
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#ifndef _SRC__INCLUDE__HW__SPEC__ARM__IMX7_SABRELITE_BOARD_H_
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#define _SRC__INCLUDE__HW__SPEC__ARM__IMX7_SABRELITE_BOARD_H_
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#include <drivers/defs/imx7d_sabre.h>
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#include <drivers/uart/imx.h>
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#include <hw/spec/arm/boot_info.h>
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#include <hw/spec/arm/cortex_a15.h>
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namespace Hw::Imx7d_sabre_board {
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using namespace Imx7d_sabre;
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using Cpu_mmio = Hw::Cortex_a15_mmio<IRQ_CONTROLLER_BASE>;
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using Serial = Genode::Imx_uart;
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enum {
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UART_BASE = UART_1_MMIO_BASE,
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UART_CLOCK = 0, /* unsued value */
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};
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static constexpr Genode::size_t NR_OF_CPUS = 2;
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}
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#endif /* _SRC__INCLUDE__HW__SPEC__ARM__IMX7_SABRELITE_BOARD_H_ */
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@ -1,30 +0,0 @@
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/*
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* \brief Definitions for Armv7
|
||||
* \author Stefan Kalkowski
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* \date 2019-04-10
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*/
|
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|
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/*
|
||||
* Copyright (C) 2019 Genode Labs GmbH
|
||||
*
|
||||
* This file is part of the Genode OS framework, which is distributed
|
||||
* under the terms of the GNU Affero General Public License version 3.
|
||||
*/
|
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#ifndef _INCLUDE__DRIVERS__DEFS__ARM_V7_H_
|
||||
#define _INCLUDE__DRIVERS__DEFS__ARM_V7_H_
|
||||
|
||||
namespace Arm_v7 {
|
||||
|
||||
enum Interrupts {
|
||||
|
||||
/******************************
|
||||
** Virtualization extension **
|
||||
******************************/
|
||||
|
||||
VT_MAINTAINANCE_IRQ = 25,
|
||||
VT_TIMER_IRQ = 27,
|
||||
};
|
||||
};
|
||||
|
||||
#endif /* _INCLUDE__DRIVERS__DEFS__ARM_V7_H_ */
|
||||
@ -1,43 +0,0 @@
|
||||
/*
|
||||
* \brief Definitions for the Imx7 dual sabre board
|
||||
* \author Stefan Kalkowski
|
||||
* \date 2018-10-07
|
||||
*/
|
||||
|
||||
/*
|
||||
* Copyright (C) 2018 Genode Labs GmbH
|
||||
*
|
||||
* This file is part of the Genode OS framework, which is distributed
|
||||
* under the terms of the GNU Affero General Public License version 3.
|
||||
*/
|
||||
|
||||
#ifndef _INCLUDE__DRIVERS__DEFS__IMX7D_SABRE_H_
|
||||
#define _INCLUDE__DRIVERS__DEFS__IMX7D_SABRE_H_
|
||||
|
||||
#include <drivers/defs/arm_v7.h>
|
||||
|
||||
namespace Imx7d_sabre {
|
||||
|
||||
using namespace Arm_v7;
|
||||
|
||||
enum {
|
||||
RAM_0_BASE = 0x80000000UL,
|
||||
RAM_0_SIZE = 0x40000000UL,
|
||||
|
||||
IRQ_CONTROLLER_BASE = 0x31000000UL,
|
||||
IRQ_CONTROLLER_SIZE = 0x8000,
|
||||
|
||||
SRC_MMIO_BASE = 0x30390000UL,
|
||||
|
||||
AIPS_1_MMIO_BASE = 0x301f0000UL,
|
||||
AIPS_2_MMIO_BASE = 0x305f0000UL,
|
||||
AIPS_3_MMIO_BASE = 0x309f0000UL,
|
||||
|
||||
UART_1_MMIO_BASE = 0x30860000UL,
|
||||
UART_1_MMIO_SIZE = 0x10000UL,
|
||||
|
||||
TIMER_CLOCK = 1000000000UL,
|
||||
};
|
||||
}
|
||||
|
||||
#endif /* _INCLUDE__DRIVERS__DEFS__IMX7D_SABRE_H_ */
|
||||
@ -19,7 +19,6 @@
|
||||
#include <state.h>
|
||||
|
||||
#include <base/env.h>
|
||||
#include <drivers/defs/arm_v7.h>
|
||||
#include <vm_session/connection.h>
|
||||
#include <util/list.h>
|
||||
#include <util/register.h>
|
||||
|
||||
Loading…
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Reference in New Issue
Block a user