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imx8q_evk: remove board support from repository

Browse Source 
Moved to separate repo at https://github.com/skalk/genode-imx/

Fix #4301
This commit is contained in:
Stefan Kalkowski 2021-10-18 11:41:24 +02:00 committed by Christian Helmuth
parent 7917c5d9ec
commit b12b0ed93d
94 changed files with 9 additions and 9885 deletions
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1
repos/base-hw/board/imx8q_evk/arch
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arm_v8a

1
repos/base-hw/board/imx8q_evk/image_link_address
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0x40010000

14
repos/base-hw/lib/mk/spec/arm_v8/bootstrap-hw-imx8q_evk.mk
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REP_INC_DIR += src/bootstrap/board/imx8q_evk
SRC_CC += bootstrap/board/imx8q_evk/platform.cc
SRC_CC += bootstrap/spec/arm/gicv3.cc
SRC_CC += bootstrap/spec/arm_64/cortex_a53_mmu.cc
SRC_CC += lib/base/arm_64/kernel/interface.cc
SRC_CC += spec/64bit/memory_map.cc
SRC_S += bootstrap/spec/arm_64/crt0.s
NR_OF_CPUS = 4
vpath spec/64bit/memory_map.cc $(call select_from_repositories,src/lib/hw)
include $(call select_from_repositories,lib/mk/bootstrap-hw.inc)

19
repos/base-hw/lib/mk/spec/arm_v8/core-hw-imx8q_evk.mk
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@ -1,19 +0,0 @@
REP_INC_DIR += src/core/board/imx8q_evk
REP_INC_DIR += src/core/spec/arm/virtualization
# add C++ sources
SRC_CC += kernel/vm_thread_on.cc
SRC_CC += spec/arm/gicv3.cc
SRC_CC += spec/arm_v8/virtualization/kernel/vm.cc
SRC_CC += spec/arm/virtualization/platform_services.cc
SRC_CC += spec/arm/virtualization/vm_session_component.cc
SRC_CC += vm_session_common.cc
SRC_CC += vm_session_component.cc
#add assembly sources
SRC_S += spec/arm_v8/virtualization/exception_vector.s
NR_OF_CPUS = 4
# include less specific configuration
include $(call select_from_repositories,lib/mk/spec/arm_v8/core-hw.inc)

1
repos/base-hw/recipes/src/base-hw-imx8q_evk/content.mk
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include $(GENODE_DIR)/repos/base-hw/recipes/src/base-hw_content.inc

1
repos/base-hw/recipes/src/base-hw-imx8q_evk/hash
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2021-10-13 e23737af156d1967b1d59c690b62f5538856a85c

2
repos/base-hw/recipes/src/base-hw-imx8q_evk/used_apis
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base-hw
base

34
repos/base-hw/src/bootstrap/board/imx8q_evk/board.h
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/*
* \brief Board driver for bootstrap
* \author Stefan Kalkowski
* \date 2019-06-12
*/
/*
* Copyright (C) 2019 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU Affero General Public License version 3.
*/
#ifndef _BOOTSTRAP__SPEC__IMX8Q_EVK__BOARD_H_
#define _BOOTSTRAP__SPEC__IMX8Q_EVK__BOARD_H_
#include <hw/spec/arm_64/imx8q_evk_board.h>
#include <hw/spec/arm_64/cpu.h>
#include <hw/spec/arm/gicv3.h>
#include <hw/spec/arm/lpae.h>
namespace Board {
using namespace Hw::Imx8q_evk_board;
struct Cpu : Hw::Arm_64_cpu
{
static void wake_up_all_cpus(void*);
};
using Hw::Pic;
};
#endif /* _BOOTSTRAP__SPEC__IMX8Q_EVK__BOARD_H_ */

231
repos/base-hw/src/bootstrap/board/imx8q_evk/platform.cc
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@ -1,231 +0,0 @@
/*
* \brief Platform implementations specific for base-hw and i.MX8Q EVK
* \author Stefan Kalkowski
* \date 2019-06-12
*/
/*
* Copyright (C) 2019 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU Affero General Public License version 3.
*/
#include <platform.h>
/**
* Leave out the first page (being 0x0) from bootstraps RAM allocator,
* some code does not feel happy with addresses being zero
*/
Bootstrap::Platform::Board::Board()
:
early_ram_regions(Memory_region { ::Board::RAM_BASE, ::Board::RAM_SIZE }),
late_ram_regions(Memory_region { }),
core_mmio(Memory_region { ::Board::UART_BASE, ::Board::UART_SIZE },
Memory_region { ::Board::Cpu_mmio::IRQ_CONTROLLER_DISTR_BASE,
::Board::Cpu_mmio::IRQ_CONTROLLER_DISTR_SIZE },
Memory_region { ::Board::Cpu_mmio::IRQ_CONTROLLER_REDIST_BASE,
::Board::Cpu_mmio::IRQ_CONTROLLER_REDIST_SIZE })
{
::Board::Pic pic {};
static volatile unsigned long iomux_values[][2] {
// IOMUXC
{ 0x30330064, 0x6 },
{ 0x30330140, 0x0 },
{ 0x30330144, 0x0 },
{ 0x30330148, 0x0 },
{ 0x3033014C, 0x0 },
{ 0x30330150, 0x0 },
{ 0x30330154, 0x0 },
{ 0x30330158, 0x0 },
{ 0x30330180, 0x2 },
{ 0x30330184, 0x0 },
{ 0x30330188, 0x0 },
{ 0x3033018C, 0x0 },
{ 0x30330190, 0x0 },
{ 0x30330194, 0x0 },
{ 0x30330198, 0x0 },
{ 0x3033019C, 0x0 },
{ 0x303301A0, 0x0 },
{ 0x303301A4, 0x0 },
{ 0x303301A8, 0x0 },
{ 0x303301AC, 0x0 },
{ 0x303301BC, 0x0 },
{ 0x303301C0, 0x0 },
{ 0x303301C4, 0x0 },
{ 0x303301C8, 0x0 },
{ 0x303301E8, 0x0 },
{ 0x303301EC, 0x0 },
{ 0x303301FC, 0x1 },
{ 0x30330200, 0x1 },
{ 0x3033021C, 0x10 }, /* Enable SION I2c2_scl */
{ 0x30330220, 0x10 }, /* Enable SION I2c2_sda */
{ 0x30330224, 0x10 },
{ 0x30330228, 0x10 },
{ 0x3033022C, 0x12 },
{ 0x30330230, 0x12 },
{ 0x30330244, 0x0 },
{ 0x30330248, 0x0 },
{ 0x3033029C, 0x19 },
{ 0x303302A4, 0x19 },
{ 0x303302A8, 0x19 },
{ 0x303302B0, 0xD6 },
{ 0x303302C0, 0x4F },
{ 0x303302C4, 0x16 },
{ 0x303302CC, 0x59 },
{ 0x30330308, 0x9F },
{ 0x3033030C, 0xDF },
{ 0x30330310, 0xDF },
{ 0x30330314, 0xDF },
{ 0x30330318, 0xDF },
{ 0x3033031C, 0xDF },
{ 0x30330320, 0xDF },
{ 0x30330324, 0xDF },
{ 0x30330328, 0xDF },
{ 0x3033032C, 0xDF },
{ 0x30330334, 0x9f },
{ 0x3033033C, 0x83 },
{ 0x30330340, 0xC3 },
{ 0x30330344, 0xC3 },
{ 0x30330348, 0xC3 },
{ 0x3033034C, 0xC3 },
{ 0x30330350, 0xC3 },
{ 0x30330368, 0x59 },
{ 0x30330370, 0x19 },
{ 0x3033039C, 0x19 },
{ 0x303303A0, 0x19 },
{ 0x303303A4, 0x19 },
{ 0x303303A8, 0xD6 },
{ 0x303303AC, 0xD6 },
{ 0x303303B0, 0xD6 },
{ 0x303303B4, 0xD6 },
{ 0x303303B8, 0xD6 },
{ 0x303303BC, 0xD6 },
{ 0x303303C0, 0xD6 },
{ 0x303303E8, 0xD6 },
{ 0x303303EC, 0xD6 },
{ 0x303303F0, 0xD6 },
{ 0x303303F4, 0xD6 },
{ 0x303303F8, 0xD6 },
{ 0x303303FC, 0xD6 },
{ 0x30330400, 0xD6 },
{ 0x30330404, 0xD6 },
{ 0x30330408, 0xD6 },
{ 0x3033040C, 0xD6 },
{ 0x30330410, 0xD6 },
{ 0x30330414, 0xD6 },
{ 0x30330424, 0xD6 },
{ 0x30330428, 0xD6 },
{ 0x3033042C, 0xD6 },
{ 0x30330430, 0xD6 },
{ 0x30330450, 0xD6 },
{ 0x30330454, 0xD6 },
{ 0x30330460, 0x19 },
{ 0x30330464, 0x49 },
{ 0x30330468, 0x49 },
{ 0x3033046C, 0x16 },
{ 0x30330484, 0x67 }, /* I2c2_scl pullup resistor 40 ohm */
{ 0x30330488, 0x67 }, /* I2c2_sda pullup resistor 40 ohm */
{ 0x3033048C, 0x67 },
{ 0x30330490, 0x67 },
{ 0x30330494, 0x76 },
{ 0x30330498, 0x76 },
{ 0x3033049C, 0x49 },
{ 0x303304A0, 0x49 },
{ 0x303304AC, 0x49 },
{ 0x303304B0, 0x49 },
{ 0x303304C8, 0x1 },
{ 0x303304CC, 0x4 },
{ 0x30330500, 0x1 },
{ 0x30330504, 0x2 },
{ 0x30340038, 0x49409600 },
{ 0x30340040, 0x49409200 },
{ 0x30340034, 0x4 }, /* MIPI mux selector */
/*
{ 0x30340060, 0x180800 },
{ 0x30340064, 0x6400520 },
{ 0x30340068, 0x0A }, */
};
struct Gpio_reg : Genode::Mmio
{
Gpio_reg(Genode::addr_t const mmio_base)
: Genode::Mmio(mmio_base) { }
struct Data : Register<0x0, 32> {};
struct Dir : Register<0x4, 32> {};
struct Int_conf_0 : Register<0xc, 32> {};
struct Int_conf_1 : Register<0x10, 32> {};
struct Int_mask : Register<0x14, 32> {};
struct Int_stat : Register<0x18, 32> {};
};
struct Ccm_reg : Genode::Mmio
{
Ccm_reg(Genode::addr_t const mmio_base)
: Genode::Mmio(mmio_base) { }
struct Target_root_0 : Register<0x8000, 32> {};
};
struct Pll_reg : Genode::Mmio
{
Pll_reg(Genode::addr_t const mmio_base)
: Genode::Mmio(mmio_base) { }
struct Pll_arm_0 : Register<0x28, 32> {};
struct Pll_arm_1 : Register<0x2c, 32> {};
};
unsigned num_values = sizeof(iomux_values) / (2*sizeof(unsigned long));
for (unsigned i = 0; i < num_values; i++)
*((volatile Genode::uint32_t*)iomux_values[i][0]) = (Genode::uint32_t)iomux_values[i][1];
Ccm_reg ccm(0x30380000);
Ccm_reg pll(0x30360000);
/* configure GPIO PIN 13 of GPIO 1 for high voltage */
Gpio_reg regulator(0x30200000);
regulator.write<Gpio_reg::Int_conf_0>(0);
regulator.write<Gpio_reg::Int_conf_1>(0);
regulator.write<Gpio_reg::Int_mask>(0x1000);
regulator.write<Gpio_reg::Int_stat>(0xffffffff);
regulator.write<Gpio_reg::Dir>(0x2328);
regulator.write<Gpio_reg::Data>(0x9f40);
ccm.write<Ccm_reg::Target_root_0>(0x14000000);
pll.write<Pll_reg::Pll_arm_1>(0x4a);
unsigned long v = pll.read<Pll_reg::Pll_arm_0>();
pll.write<Pll_reg::Pll_arm_0>(v & 0xffffffe0);
v = pll.read<Pll_reg::Pll_arm_0>();
pll.write<Pll_reg::Pll_arm_0>(v | (1<<12));
while (!(pll.read<Pll_reg::Pll_arm_0>() & (1<<11))) { ; }
v = pll.read<Pll_reg::Pll_arm_0>();
pll.write<Pll_reg::Pll_arm_0>(v ^ (1<<12));
ccm.write<Ccm_reg::Target_root_0>(0x11000000);
}
void Board::Cpu::wake_up_all_cpus(void * ip)
{
enum Function_id { CPU_ON = 0xC4000003 };
unsigned long result = 0;
for (unsigned i = 1; i < NR_OF_CPUS; i++) {
asm volatile("mov x0, %1 \n"
"mov x1, %2 \n"
"mov x2, %3 \n"
"mov x3, %2 \n"
"smc #0 \n"
"mov %0, x0 \n"
: "=r" (result) : "r" (CPU_ON), "r" (i), "r" (ip)
: "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",
"x8", "x9", "x10", "x11", "x12", "x13", "x14");
}
}

43
repos/base-hw/src/core/board/imx8q_evk/board.h
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@ -1,43 +0,0 @@
/*
* \brief Board driver for core
* \author Stefan Kalkowski
* \date 2019-06-12
*/
/*
* Copyright (C) 2019 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU Affero General Public License version 3.
*/
#ifndef _CORE__SPEC__IMX8Q_EVK__BOARD_H_
#define _CORE__SPEC__IMX8Q_EVK__BOARD_H_
/* base-hw internal includes */
#include <hw/spec/arm_64/imx8q_evk_board.h>
/* base-hw Core includes */
#include <spec/arm/generic_timer.h>
#include <spec/arm/virtualization/gicv3.h>
#include <spec/arm_v8/cpu.h>
/* base-hw includes */
#include <spec/arm_64/cpu/vm_state_virtualization.h>
/* base-hw Core includes */
#include <spec/arm/virtualization/board.h>
namespace Board {
using namespace Hw::Imx8q_evk_board;
enum {
TIMER_IRQ = 14 + 16,
VT_TIMER_IRQ = 11 + 16,
VT_MAINTAINANCE_IRQ = 9 + 16,
VCPU_MAX = 16
};
};
#endif /* _CORE__SPEC__IMX8Q_EVK__BOARD_H_ */

45
repos/base-hw/src/include/hw/spec/arm_64/imx8q_evk_board.h
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@ -1,45 +0,0 @@
/*
* \brief Board definitions for i.MX8 Quad EVK
* \author Stefan Kalkowski
* \date 2019-06-12
*/
/*
* Copyright (C) 2019 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU Affero General Public License version 3.
*/
#ifndef _SRC__INCLUDE__HW__SPEC__ARM_64__IMX8Q_EVK__BOARD_H_
#define _SRC__INCLUDE__HW__SPEC__ARM_64__IMX8Q_EVK__BOARD_H_
#include <drivers/uart/imx.h>
#include <hw/spec/arm/boot_info.h>
namespace Hw::Imx8q_evk_board {
using Serial = Genode::Imx_uart;
enum {
RAM_BASE = 0x40000000,
RAM_SIZE = 0xc0000000,
UART_BASE = 0x30860000,
UART_SIZE = 0x1000,
UART_CLOCK = 250000000,
};
namespace Cpu_mmio {
enum {
IRQ_CONTROLLER_DISTR_BASE = 0x38800000,
IRQ_CONTROLLER_DISTR_SIZE = 0x10000,
IRQ_CONTROLLER_VT_CPU_BASE = 0x31020000,
IRQ_CONTROLLER_VT_CPU_SIZE = 0x2000,
IRQ_CONTROLLER_REDIST_BASE = 0x38880000,
IRQ_CONTROLLER_REDIST_SIZE = 0xc0000,
};
};
};
#endif /* _SRC__INCLUDE__HW__SPEC__ARM_64__IMX8Q_EVK__BOARD_H_ */

26
repos/base/include/drivers/defs/imx8q_evk.h
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/*
* \brief MMIO and IRQ definitions for the i.MX8Q EVK board
* \author Christian Prochaska
* \date 2019-09-26
*/
/*
* Copyright (C) 2019 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU Affero General Public License version 3.
*/
#ifndef _INCLUDE__DRIVERS__DEFS__IMX8Q_EVK_H_
#define _INCLUDE__DRIVERS__DEFS__IMX8Q_EVK_H_
namespace Imx8 {
enum {
/* SD host controller */
SDHC_2_IRQ = 55,
SDHC_2_MMIO_BASE = 0x30b50000,
SDHC_2_MMIO_SIZE = 0x00010000,
};
};
#endif /* _INCLUDE__DRIVERS__DEFS__IMX8Q_EVK_H_ */

1
repos/base/ports/uboot.hash
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f3fd6bdf4956fb3d4e9ae351030d8cc587f0ebcf

12
repos/base/ports/uboot.port
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@ -1,12 +0,0 @@
LICENSE := GPLv2
VERSION := git
DOWNLOADS := ubfg.git
URL(ubfg) := https://github.com/alex-ab/ubfg.git
REV(ubfg) := 89bb867cb58fa9d8fb2e38b6d52256a68920354d
DIR(ubfg) := scripts
default: $(DOWNLOADS)
$(VERBOSE)echo "building imx8q_evk uboot"
$(VERBOSE)mkdir -p imx8q_evk
$(VERBOSE)cd imx8q_evk && ../scripts/create_uboot_imx8q_evk && cd ..

1
repos/base/run/platform_drv.inc
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@ -12,7 +12,6 @@ proc have_platform_drv {} {
proc usb_host_drv_binary { } {
if {[have_board rpi]} { return rpi_usb_host_drv }
if {[have_board imx6q_sabrelite]} { return imx6q_sabrelite_usb_host_drv }
if {[have_board imx8q_evk]} { return imx8q_evk_usb_host_drv }
if {[have_board pc]} { return x86_pc_usb_host_drv }
return no_usb_drv_available
}

226
repos/dde_linux/imx8_fb.list
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linux-x.x.x/drivers/base/component.c
linux-x.x.x/drivers/base/devres.c
linux-x.x.x/drivers/dma-buf/dma-fence.c
linux-x.x.x/drivers/gpu/drm/drm_atomic.c
linux-x.x.x/drivers/gpu/drm/drm_atomic_helper.c
linux-x.x.x/drivers/gpu/drm/drm_blend.c
linux-x.x.x/drivers/gpu/drm/drm_bridge.c
linux-x.x.x/drivers/gpu/drm/drm_connector.c
linux-x.x.x/drivers/gpu/drm/drm_crtc.c
linux-x.x.x/drivers/gpu/drm/drm_crtc_helper_internal.h
linux-x.x.x/drivers/gpu/drm/drm_crtc_internal.h
linux-x.x.x/drivers/gpu/drm/drm_dp_helper.c
linux-x.x.x/drivers/gpu/drm/drm_edid.c
linux-x.x.x/drivers/gpu/drm/drm_encoder.c
linux-x.x.x/drivers/gpu/drm/drm_fourcc.c
linux-x.x.x/drivers/gpu/drm/drm_framebuffer.c
linux-x.x.x/drivers/gpu/drm/drm_gem.c
linux-x.x.x/drivers/gpu/drm/drm_gem_cma_helper.c
linux-x.x.x/drivers/gpu/drm/drm_gem_framebuffer_helper.c
linux-x.x.x/drivers/gpu/drm/drm_internal.h
linux-x.x.x/drivers/gpu/drm/drm_mipi_dsi.c
linux-x.x.x/drivers/gpu/drm/drm_mm.c
linux-x.x.x/drivers/gpu/drm/drm_mode_config.c
linux-x.x.x/drivers/gpu/drm/drm_mode_object.c
linux-x.x.x/drivers/gpu/drm/drm_modes.c
linux-x.x.x/drivers/gpu/drm/drm_modeset_helper.c
linux-x.x.x/drivers/gpu/drm/drm_modeset_lock.c
linux-x.x.x/drivers/gpu/drm/drm_of.c
linux-x.x.x/drivers/gpu/drm/drm_plane.c
linux-x.x.x/drivers/gpu/drm/drm_probe_helper.c
linux-x.x.x/drivers/gpu/drm/drm_property.c
linux-x.x.x/drivers/gpu/drm/drm_rect.c
linux-x.x.x/drivers/gpu/drm/drm_vblank.c
linux-x.x.x/drivers/gpu/drm/drm_vma_manager.c
linux-x.x.x/drivers/gpu/drm/bridge/nwl-dsi.c
linux-x.x.x/drivers/gpu/drm/imx/imx-drm.h
linux-x.x.x/drivers/gpu/drm/imx/imx-drm-core.c
linux-x.x.x/drivers/gpu/drm/imx/nwl_dsi-imx.c
linux-x.x.x/drivers/gpu/drm/imx/dcss/dcss-crtc.c
linux-x.x.x/drivers/gpu/drm/imx/dcss/dcss-crtc.h
linux-x.x.x/drivers/gpu/drm/imx/dcss/dcss-kms.c
linux-x.x.x/drivers/gpu/drm/imx/dcss/dcss-kms.h
linux-x.x.x/drivers/gpu/drm/imx/dcss/dcss-plane.c
linux-x.x.x/drivers/gpu/drm/imx/dcss/dcss-plane.h
linux-x.x.x/drivers/gpu/drm/imx/hdp/API_AFE_mcu1_dp.c
linux-x.x.x/drivers/gpu/drm/imx/hdp/API_AFE_mcu1_dp.h
linux-x.x.x/drivers/gpu/drm/imx/hdp/API_AFE_mcu2_dp.c
linux-x.x.x/drivers/gpu/drm/imx/hdp/API_AFE_mcu2_dp.h
linux-x.x.x/drivers/gpu/drm/imx/hdp/API_AFE_ss28fdsoi_kiran_hdmitx.c
linux-x.x.x/drivers/gpu/drm/imx/hdp/API_AFE_ss28fdsoi_kiran_hdmitx.h
linux-x.x.x/drivers/gpu/drm/imx/hdp/API_AFE_t28hpc_hdmitx.c
linux-x.x.x/drivers/gpu/drm/imx/hdp/API_AFE_t28hpc_hdmitx.h
linux-x.x.x/drivers/gpu/drm/imx/hdp/imx-arc.c
linux-x.x.x/drivers/gpu/drm/imx/hdp/imx-dp.c
linux-x.x.x/drivers/gpu/drm/imx/hdp/imx-dp.h
linux-x.x.x/drivers/gpu/drm/imx/hdp/imx-hdcp-private.h
linux-x.x.x/drivers/gpu/drm/imx/hdp/imx-hdcp.c
linux-x.x.x/drivers/gpu/drm/imx/hdp/imx-hdcp.h
linux-x.x.x/drivers/gpu/drm/imx/hdp/imx-hdmi.c
linux-x.x.x/drivers/gpu/drm/imx/hdp/imx-hdmi.h
linux-x.x.x/drivers/gpu/drm/imx/hdp/imx-hdp.c
linux-x.x.x/drivers/gpu/drm/imx/hdp/imx-hdp.h
linux-x.x.x/drivers/gpu/drm/imx/hdp/ss28fdsoi_hdmitx_table.c
linux-x.x.x/drivers/gpu/drm/imx/hdp/ss28fdsoi_hdmitx_table.h
linux-x.x.x/drivers/gpu/drm/imx/hdp/t28hpc_hdmitx_table.c
linux-x.x.x/drivers/gpu/drm/imx/hdp/t28hpc_hdmitx_table.h
linux-x.x.x/drivers/gpu/drm/panel/panel-raydium-rm67191.c
linux-x.x.x/drivers/gpu/imx/dcss/dcss-common.c
linux-x.x.x/drivers/gpu/imx/dcss/dcss-blkctl.c
linux-x.x.x/drivers/gpu/imx/dcss/dcss-ctxld.c
linux-x.x.x/drivers/gpu/imx/dcss/dcss-dec400d.c
linux-x.x.x/drivers/gpu/imx/dcss/dcss-dpr.c
linux-x.x.x/drivers/gpu/imx/dcss/dcss-dtg.c
linux-x.x.x/drivers/gpu/imx/dcss/dcss-dtrc.c
linux-x.x.x/drivers/gpu/imx/dcss/dcss-hdr10.c
linux-x.x.x/drivers/gpu/imx/dcss/dcss-hdr10-tables.h
linux-x.x.x/drivers/gpu/imx/dcss/dcss-prv.h
linux-x.x.x/drivers/gpu/imx/dcss/dcss-rdsrc.c
linux-x.x.x/drivers/gpu/imx/dcss/dcss-scaler.c
linux-x.x.x/drivers/gpu/imx/dcss/dcss-ss.c
linux-x.x.x/drivers/gpu/imx/dcss/dcss-wrscl.c
linux-x.x.x/drivers/i2c/i2c-boardinfo.c
linux-x.x.x/drivers/i2c/i2c-core-base.c
linux-x.x.x/drivers/i2c/i2c-core.h
linux-x.x.x/drivers/irqchip/irq-imx-irqsteer.c
linux-x.x.x/drivers/mxc/hdp/API_AFE.c
linux-x.x.x/drivers/mxc/hdp/API_AFE.h
linux-x.x.x/drivers/mxc/hdp/API_DPTX.c
linux-x.x.x/drivers/mxc/hdp/API_DPTX.h
linux-x.x.x/drivers/mxc/hdp/API_General.c
linux-x.x.x/drivers/mxc/hdp/API_General.h
linux-x.x.x/drivers/mxc/hdp/API_HDCP.c
linux-x.x.x/drivers/mxc/hdp/API_HDCP.h
linux-x.x.x/drivers/mxc/hdp/API_HDMITX.c
linux-x.x.x/drivers/mxc/hdp/API_HDMITX.h
linux-x.x.x/drivers/mxc/hdp/API_Infoframe.c
linux-x.x.x/drivers/mxc/hdp/API_Infoframe.h
linux-x.x.x/drivers/mxc/hdp/address.h
linux-x.x.x/drivers/mxc/hdp/all.h
linux-x.x.x/drivers/mxc/hdp/apb_cfg.h
linux-x.x.x/drivers/mxc/hdp/dptx_framer.h
linux-x.x.x/drivers/mxc/hdp/dptx_stream.h
linux-x.x.x/drivers/mxc/hdp/general_handler.h
linux-x.x.x/drivers/mxc/hdp/hdcp.h
linux-x.x.x/drivers/mxc/hdp/hdcp2.h
linux-x.x.x/drivers/mxc/hdp/hdcp_tran.h
linux-x.x.x/drivers/mxc/hdp/hdmi.h
linux-x.x.x/drivers/mxc/hdp/mailBox.h
linux-x.x.x/drivers/mxc/hdp/mhl_hdtx_top.h
linux-x.x.x/drivers/mxc/hdp/opcodes.h
linux-x.x.x/drivers/mxc/hdp/source_car.h
linux-x.x.x/drivers/mxc/hdp/source_phy.h
linux-x.x.x/drivers/mxc/hdp/source_pif.h
linux-x.x.x/drivers/mxc/hdp/source_vif.h
linux-x.x.x/drivers/mxc/hdp/util.c
linux-x.x.x/drivers/mxc/hdp/util.h
linux-x.x.x/drivers/mxc/hdp-cec/imx-hdp-cec.h
linux-x.x.x/drivers/phy/phy-mixel-mipi-dsi.c
linux-x.x.x/drivers/video/hdmi.c
linux-x.x.x/include/asm-generic/atomic64.h
linux-x.x.x/include/asm-generic/bitops/__ffs.h
linux-x.x.x/include/asm-generic/bitops/ffs.h
linux-x.x.x/include/asm-generic/bitops/fls64.h
linux-x.x.x/include/asm-generic/bitops/__fls.h
linux-x.x.x/include/asm-generic/bitops/fls.h
linux-x.x.x/include/asm-generic/bitops/non-atomic.h
linux-x.x.x/include/drm/drm_atomic.h
linux-x.x.x/include/drm/drm_atomic_helper.h
linux-x.x.x/include/drm/drm_auth.h
linux-x.x.x/include/drm/drm_blend.h
linux-x.x.x/include/drm/drm_bridge.h
linux-x.x.x/include/drm/drm_connector.h
linux-x.x.x/include/drm/drm_crtc.h
linux-x.x.x/include/drm/drm_crtc_helper.h
linux-x.x.x/include/drm/drm_debugfs_crc.h
linux-x.x.x/include/drm/drm_device.h
linux-x.x.x/include/drm/drm_displayid.h
linux-x.x.x/include/drm/drm_dp_helper.h
linux-x.x.x/include/drm/drm_drv.h
linux-x.x.x/include/drm/drm_edid.h
linux-x.x.x/include/drm/drm_encoder.h
linux-x.x.x/include/drm/drm_fb_cma_helper.h
linux-x.x.x/include/drm/drm_fb_helper.h
linux-x.x.x/include/drm/drm_file.h
linux-x.x.x/include/drm/drm_fourcc.h
linux-x.x.x/include/drm/drm_framebuffer.h
linux-x.x.x/include/drm/drm_gem.h
linux-x.x.x/include/drm/drm_gem_cma_helper.h
linux-x.x.x/include/drm/drm_gem_framebuffer_helper.h
linux-x.x.x/include/drm/drm_hashtab.h
linux-x.x.x/include/drm/drm_hdcp.h
linux-x.x.x/include/drm/drm_ioctl.h
linux-x.x.x/include/drm/drm_mipi_dsi.h
linux-x.x.x/include/drm/drm_mm.h
linux-x.x.x/include/drm/drm_mode_config.h
linux-x.x.x/include/drm/drm_mode_object.h
linux-x.x.x/include/drm/drm_modeset_helper.h
linux-x.x.x/include/drm/drm_modeset_helper_vtables.h
linux-x.x.x/include/drm/drm_modeset_lock.h
linux-x.x.x/include/drm/drm_modes.h
linux-x.x.x/include/drm/drm_of.h
linux-x.x.x/include/drm/drm_panel.h
linux-x.x.x/include/drm/drmP.h
linux-x.x.x/include/drm/drm_plane.h
linux-x.x.x/include/drm/drm_plane_helper.h
linux-x.x.x/include/drm/drm_prime.h
linux-x.x.x/include/drm/drm_print.h
linux-x.x.x/include/drm/drm_property.h
linux-x.x.x/include/drm/drm_rect.h
linux-x.x.x/include/drm/drm_vblank.h
linux-x.x.x/include/drm/drm_vma_manager.h
linux-x.x.x/include/drm/bridge/nwl_dsi.h
linux-x.x.x/include/linux/irqchip/chained_irq.h
linux-x.x.x/include/linux/busfreq-imx.h
linux-x.x.x/include/linux/component.h
linux-x.x.x/include/linux/dma-fence.h
linux-x.x.x/include/linux/fb.h
linux-x.x.x/include/linux/hdmi.h
linux-x.x.x/include/linux/i2c.h
linux-x.x.x/include/linux/idr.h
linux-x.x.x/include/linux/interval_tree_generic.h
linux-x.x.x/include/linux/interval_tree.h
linux-x.x.x/include/linux/irqdomain.h
linux-x.x.x/include/linux/irqhandler.h
linux-x.x.x/include/linux/list.h
linux-x.x.x/include/linux/list_sort.h
linux-x.x.x/include/linux/log2.h
linux-x.x.x/include/linux/math64.h
linux-x.x.x/include/linux/mod_devicetable.h
linux-x.x.x/include/linux/of_graph.h
linux-x.x.x/include/linux/pm_runtime.h
linux-x.x.x/include/linux/pm_wakeirq.h
linux-x.x.x/include/linux/phy.h
linux-x.x.x/include/linux/radix-tree.h
linux-x.x.x/include/linux/ratelimit.h
linux-x.x.x/include/linux/rbtree_augmented.h
linux-x.x.x/include/linux/rbtree.h
linux-x.x.x/include/linux/sort.h
linux-x.x.x/include/linux/vga_switcheroo.h
linux-x.x.x/include/linux/mfd/syscon/imx8mq-iomuxc-gpr.h
linux-x.x.x/include/linux/phy/phy.h
linux-x.x.x/include/linux/phy/phy-mixel-mipi-dsi.h
linux-x.x.x/include/soc/imx8/sc/ipc.h
linux-x.x.x/include/soc/imx8/sc/scfw.h
linux-x.x.x/include/soc/imx8/sc/sci.h
linux-x.x.x/include/soc/imx8/sc/types.h
linux-x.x.x/include/soc/imx8/soc.h
linux-x.x.x/include/uapi/drm/drm_fourcc.h
linux-x.x.x/include/uapi/drm/drm.h
linux-x.x.x/include/uapi/drm/drm_mode.h
linux-x.x.x/include/uapi/linux/byteorder/little_endian.h
linux-x.x.x/include/uapi/linux/cec.h
linux-x.x.x/include/uapi/linux/fb.h
linux-x.x.x/include/uapi/linux/i2c.h
linux-x.x.x/include/uapi/linux/media-bus-format.h
linux-x.x.x/include/uapi/linux/swab.h
linux-x.x.x/include/video/display_timing.h
linux-x.x.x/include/video/mipi_display.h
linux-x.x.x/include/video/of_videomode.h
linux-x.x.x/include/video/videomode.h
linux-x.x.x/include/video/viv-metadata.h
linux-x.x.x/include/video/imx-dcss.h
linux-x.x.x/lib/idr.c
linux-x.x.x/lib/list_sort.c
linux-x.x.x/lib/radix-tree.c
linux-x.x.x/lib/rbtree.c

22
repos/dde_linux/lib/import/import-imx8_fb_include.mk
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@ -1,22 +0,0 @@
LX_CONTRIB_DIR := $(call select_from_ports,dde_linux)/src/drivers/framebuffer/imx8
SRC_DIR := $(REP_DIR)/src/drivers/framebuffer/imx8
# architecture-dependent includes
ifeq ($(filter-out $(SPECS),arm_64),)
ARCH_SRC_INC_DIR += $(REP_DIR)/src/include/spec/arm_64 \
$(LX_CONTRIB_DIR)/arch/arm64/include \
$(LX_CONTRIB_DIR)/arch/arm64/include/uapi \
$(LX_CONTRIB_DIR)/arch/arm64/include/generated \
$(LX_CONTRIB_DIR)/arch/arm64/include/generated/uapi
endif # arm_64
INC_DIR += $(SRC_DIR)/include \
$(REP_DIR)/src/include \
$(ARCH_SRC_INC_DIR) \
$(LX_CONTRIB_DIR)/drivers/gpu/drm \
$(LX_CONTRIB_DIR)/drivers/gpu/drm/imx \
$(LX_CONTRIB_DIR)/include \
$(LX_CONTRIB_DIR)/include/uapi \
$(LIB_CACHE_DIR)/imx8_fb_include/include/include/include
CC_OPT += -U__linux__ -D__KERNEL__

57
repos/dde_linux/lib/mk/spec/arm_64/imx8_fb_drv.mk
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@ -1,57 +0,0 @@
LX_CONTRIB_DIR := $(call select_from_ports,dde_linux)/src/drivers/framebuffer/imx8
SRC_DIR := $(REP_DIR)/src/drivers/framebuffer/imx8
LIBS += imx8_fb_include
SRC_C :=
SRC_C += $(notdir $(wildcard $(LX_CONTRIB_DIR)/drivers/dma-buf/*.c))
SRC_C += $(notdir $(wildcard $(LX_CONTRIB_DIR)/drivers/i2c/*.c))
SRC_C += $(notdir $(wildcard $(LX_CONTRIB_DIR)/drivers/base/*.c))
SRC_C += $(notdir $(wildcard $(LX_CONTRIB_DIR)/drivers/gpu/drm/*.c))
SRC_C += $(notdir $(wildcard $(LX_CONTRIB_DIR)/drivers/gpu/drm/bridge/*.c))
SRC_C += $(notdir $(wildcard $(LX_CONTRIB_DIR)/drivers/gpu/drm/imx/*.c))
SRC_C += $(notdir $(wildcard $(LX_CONTRIB_DIR)/drivers/gpu/drm/imx/dcss/*.c))
SRC_C += $(notdir $(wildcard $(LX_CONTRIB_DIR)/drivers/gpu/drm/imx/hdp/*.c))
SRC_C += $(notdir $(wildcard $(LX_CONTRIB_DIR)/drivers/gpu/drm/panel/*.c))
SRC_C += $(notdir $(wildcard $(LX_CONTRIB_DIR)/drivers/gpu/imx/dcss/*.c))
SRC_C += $(notdir $(wildcard $(LX_CONTRIB_DIR)/drivers/irqchip/*.c))
SRC_C += $(notdir $(wildcard $(LX_CONTRIB_DIR)/drivers/mxc/hdp/*.c))
SRC_C += $(notdir $(wildcard $(LX_CONTRIB_DIR)/drivers/phy/*.c))
SRC_C += $(notdir $(wildcard $(LX_CONTRIB_DIR)/drivers/video/*.c))
SRC_C += $(notdir $(wildcard $(LX_CONTRIB_DIR)/lib/*.c))
CC_OPT_nwl-dsi += -DMOD_SUFFIX=_bridge
#
# Linux sources are C89 with GNU extensions
#
CC_C_OPT += -std=gnu89
#
# Reduce build noise of compiling contrib code
#
CC_WARN = -Wall -Wno-uninitialized -Wno-unused-but-set-variable \
-Wno-unused-variable -Wno-unused-function \
-Wno-pointer-arith -Wno-pointer-sign \
-Wno-int-to-pointer-cast -Wno-stringop-truncation
vpath %.c $(LX_CONTRIB_DIR)/drivers/base
vpath %.c $(LX_CONTRIB_DIR)/drivers/dma-buf
vpath %.c $(LX_CONTRIB_DIR)/drivers/i2c
vpath %.c $(LX_CONTRIB_DIR)/drivers/gpu/drm
vpath %.c $(LX_CONTRIB_DIR)/drivers/gpu/drm/bridge
vpath %.c $(LX_CONTRIB_DIR)/drivers/gpu/drm/imx
vpath %.c $(LX_CONTRIB_DIR)/drivers/gpu/drm/imx/dcss
vpath %.c $(LX_CONTRIB_DIR)/drivers/gpu/drm/imx/hdp
vpath %.c $(LX_CONTRIB_DIR)/drivers/gpu/drm/panel
vpath %.c $(LX_CONTRIB_DIR)/drivers/gpu/imx/dcss
vpath %.c $(LX_CONTRIB_DIR)/drivers/irqchip
vpath %.c $(LX_CONTRIB_DIR)/drivers/mxc/hdp
vpath %.c $(LX_CONTRIB_DIR)/drivers/phy
vpath %.c $(LX_CONTRIB_DIR)/drivers/video
vpath %.c $(LX_CONTRIB_DIR)/lib
CC_CXX_WARN_STRICT =

37
repos/dde_linux/lib/mk/spec/arm_64/imx8_fb_include.mk
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@ -1,37 +0,0 @@
#
# Pseudo library to generate a symlink for each header file included by the
# contrib code. Each symlink points to the same 'lx_emul.h' file, which
# provides our emulation of the Linux kernel API.
#
ifeq ($(called_from_lib_mk),yes)
LX_CONTRIB_DIR := $(call select_from_ports,dde_linux)/src/drivers/framebuffer/imx8
LX_EMUL_H := $(REP_DIR)/src/drivers/framebuffer/imx8/include/lx_emul.h
#
# Determine the header files included by the contrib code. For each
# of these header files we create a symlink to 'lx_emul.h'.
#
SCAN_DIRS := $(addprefix $(LX_CONTRIB_DIR)/include/, asm-generic drm linux soc uapi video) \
$(addprefix $(LX_CONTRIB_DIR)/, drivers lib)
GEN_INCLUDES := $(shell grep -rIh "^\#include .*" $(SCAN_DIRS) |\
sed "s/^\#include [^<\"]*[<\"]\([^>\"]*\)[>\"].*/\1/" |\
sort | uniq)
#
# Put Linux headers in 'GEN_INC' dir, since some include use "../../" paths use
# three level include hierarchy
#
GEN_INC := $(shell pwd)/include/include/include
GEN_INCLUDES := $(addprefix $(GEN_INC)/,$(GEN_INCLUDES))
all: $(GEN_INCLUDES)
$(GEN_INCLUDES):
$(VERBOSE)mkdir -p $(dir $@)
$(VERBOSE)ln -sf $(LX_EMUL_H) $@
endif
CC_CXX_WARN_STRICT =

13
repos/dde_linux/patches/imx8_fb_dcss_blkctl.patch
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@ -1,13 +0,0 @@
diff --git a/drivers/gpu/imx/dcss/dcss-blkctl.c b/drivers/gpu/imx/dcss/dcss-blkctl.c
index 2f13b33..a4b0620 100644
--- a/drivers/gpu/imx/dcss/dcss-blkctl.c
+++ b/drivers/gpu/imx/dcss/dcss-blkctl.c
@@ -81,7 +81,7 @@ void dcss_blkctl_cfg(struct dcss_soc *dcss)
struct dcss_blkctl_priv *blkctl = dcss->blkctl_priv;
if (blkctl->hdmi_output)
- dcss_writel((blkctl->clk_setting ^ HDMI_MIPI_CLK_SEL),
+ dcss_writel((blkctl->clk_setting),
blkctl->base_reg + DCSS_BLKCTL_CONTROL0);
else
dcss_writel((blkctl->clk_setting ^ HDMI_MIPI_CLK_SEL) |

23
repos/dde_linux/patches/imx8_fb_dcss_common.patch
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@ -1,23 +0,0 @@
dcss_common.patch
diff --git a/drivers/gpu/imx/dcss/dcss-common.c b/drivers/gpu/imx/dcss/dcss-common.c
index cb15533..90b6b4d 100644
--- a/drivers/gpu/imx/dcss/dcss-common.c
+++ b/drivers/gpu/imx/dcss/dcss-common.c
@@ -19,6 +19,7 @@
#include <linux/clk.h>
#include <linux/pm_runtime.h>
#include <linux/busfreq-imx.h>
+#include <linux/mod_devicetable.h>
#include <linux/pm_qos.h>
#include <video/imx-dcss.h>
@@ -43,7 +44,7 @@ struct dcss_devtype {
u32 pll_base;
};
-static struct dcss_devtype dcss_type_imx8m = {
+/*static*/ struct dcss_devtype dcss_type_imx8m = {
.name = "DCSS_imx8m",
.blkctl_ofs = 0x2F000,
.ctxld_ofs = 0x23000,

15
repos/dde_linux/patches/imx8_fb_dcss_ctxld.patch
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@ -1,15 +0,0 @@
dcss_ctxld.patch
diff --git a/drivers/gpu/imx/dcss/dcss-ctxld.c b/drivers/gpu/imx/dcss/dcss-ctxld.c
index 377a102..1e7a7cf 100644
--- a/drivers/gpu/imx/dcss/dcss-ctxld.c
+++ b/drivers/gpu/imx/dcss/dcss-ctxld.c
@@ -275,7 +275,7 @@ int dcss_ctxld_init(struct dcss_soc *dcss, unsigned long ctxld_base)
}
ret = dcss_ctxld_irq_config(priv);
- if (!ret)
+ if (ret)
return ret;
dcss_ctxld_hw_cfg(dcss);

15
repos/dde_linux/patches/imx8_fb_dcss_scaler.patch
View File

@ -1,15 +0,0 @@
dcss_scaler.patch
diff --git a/drivers/gpu/imx/dcss/dcss-scaler.c b/drivers/gpu/imx/dcss/dcss-scaler.c
index 051bc4b..fc7b2e3 100644
--- a/drivers/gpu/imx/dcss/dcss-scaler.c
+++ b/drivers/gpu/imx/dcss/dcss-scaler.c
@@ -332,7 +332,7 @@ static int dcss_scaler_ch_init_all(struct dcss_soc *dcss,
ch->base_ofs = scaler_base + i * 0x400;
- ch->base_reg = devm_ioremap(dcss->dev, ch->base_ofs, SZ_4K);
+ ch->base_reg = devm_ioremap(dcss->dev, ch->base_ofs, 0x400);
if (!ch->base_reg) {
dev_err(dcss->dev, "scaler: unable to remap ch base\n");
return -ENOMEM;

26
repos/dde_linux/patches/imx8_fb_drm_connector.patch
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@ -1,26 +0,0 @@
drm_connector.patch
diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
index 0986447..d54c1cd 100644
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/drm/drm_connector.c
@@ -525,7 +525,9 @@ void drm_connector_list_iter_begin(struct drm_device *dev,
{
iter->dev = dev;
iter->conn = NULL;
+#ifdef CONFIG_LOCKDEP
lock_acquire_shared_recursive(&connector_list_iter_dep_map, 0, 1, NULL, _RET_IP_);
+#endif
}
EXPORT_SYMBOL(drm_connector_list_iter_begin);
@@ -581,7 +583,9 @@ void drm_connector_list_iter_end(struct drm_connector_list_iter *iter)
iter->dev = NULL;
if (iter->conn)
drm_connector_put(iter->conn);
+#ifdef CONFIG_LOCKDEP
lock_release(&connector_list_iter_dep_map, 0, _RET_IP_);
+#endif
}
EXPORT_SYMBOL(drm_connector_list_iter_end);

15
repos/dde_linux/patches/imx8_fb_drm_edid.patch
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@ -1,15 +0,0 @@
drm_edid.patch
diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index 6f1410b..c874409 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -345,7 +345,7 @@ struct edid *drm_load_edid_firmware(struct drm_connector *connector);
static inline struct edid *
drm_load_edid_firmware(struct drm_connector *connector)
{
- return ERR_PTR(-ENOENT);
+ return (struct edid *)ERR_PTR(-ENOENT);
}
#endif

27
repos/dde_linux/patches/imx8_fb_drm_mm.patch
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@ -1,27 +0,0 @@
drm_mm.patch
diff --git a/drivers/gpu/drm/drm_mm.c b/drivers/gpu/drm/drm_mm.c
index 1acf3b1..7fd72a0 100644
--- a/drivers/gpu/drm/drm_mm.c
+++ b/drivers/gpu/drm/drm_mm.c
@@ -48,6 +48,7 @@
#include <linux/seq_file.h>
#include <linux/export.h>
#include <linux/interval_tree_generic.h>
+#include <linux/math64.h>
/**
* DOC: Overview
diff --git a/include/drm/drm_mm.h b/include/drm/drm_mm.h
index 8d10fc9..452977c 100644
--- a/include/drm/drm_mm.h
+++ b/include/drm/drm_mm.h
@@ -423,7 +423,7 @@ static inline int drm_mm_insert_node(struct drm_mm *mm,
struct drm_mm_node *node,
u64 size)
{
- return drm_mm_insert_node_generic(mm, node, size, 0, 0, 0);
+ return drm_mm_insert_node_generic(mm, node, size, 0, 0, DRM_MM_INSERT_BEST);
}
void drm_mm_remove_node(struct drm_mm_node *node);

14
repos/dde_linux/patches/imx8_fb_drm_vblank.patch
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@ -1,14 +0,0 @@
drm_vblank.patch
diff --git a/drivers/gpu/drm/drm_vblank.c b/drivers/gpu/drm/drm_vblank.c
index c2f23a6..f1bc5df 100644
--- a/drivers/gpu/drm/drm_vblank.c
+++ b/drivers/gpu/drm/drm_vblank.c
@@ -27,6 +27,7 @@
#include <drm/drm_vblank.h>
#include <drm/drmP.h>
#include <linux/export.h>
+#include <linux/math64.h>
#include "drm_trace.h"
#include "drm_internal.h"

45
repos/dde_linux/patches/imx8_fb_fb.patch
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@ -1,45 +0,0 @@
fb.patch
diff --git a/include/linux/fb.h b/include/linux/fb.h
index bc24e48..5cc1e2a 100644
--- a/include/linux/fb.h
+++ b/include/linux/fb.h
@@ -461,6 +461,16 @@ struct fb_tile_ops {
output like oopses */
#define FBINFO_CAN_FORCE_OUTPUT 0x200000
+struct aperture {
+ resource_size_t base;
+ resource_size_t size;
+};
+
+struct apertures_struct {
+ unsigned int count;
+ struct aperture ranges[0];
+};
+
struct fb_info {
atomic_t count;
int node;
@@ -514,19 +524,13 @@ struct fb_info {
/* we need the PCI or similar aperture base/size not
smem_start/size as smem_start may just be an object
allocated inside the aperture so may not actually overlap */
- struct apertures_struct {
- unsigned int count;
- struct aperture {
- resource_size_t base;
- resource_size_t size;
- } ranges[0];
- } *apertures;
+ struct apertures_struct *apertures;
bool skip_vt_switch; /* no VT switch on suspend/resume required */
};
static inline struct apertures_struct *alloc_apertures(unsigned int max_num) {
- struct apertures_struct *a = kzalloc(sizeof(struct apertures_struct)
+ struct apertures_struct *a = (struct apertures_struct*)kzalloc(sizeof(struct apertures_struct)
+ max_num * sizeof(struct aperture), GFP_KERNEL);
if (!a)
return NULL;

54
repos/dde_linux/patches/imx8_fb_imx_drm_core.patch
View File

@ -1,54 +0,0 @@
diff --git a/drivers/gpu/drm/imx/imx-drm-core.c b/drivers/gpu/drm/imx/imx-drm-core.c
index 453100d..05ef413 100644
--- a/drivers/gpu/drm/imx/imx-drm-core.c
+++ b/drivers/gpu/drm/imx/imx-drm-core.c
@@ -43,7 +43,9 @@ static void imx_drm_driver_lastclose(struct drm_device *drm)
{
struct imx_drm_device *imxdrm = drm->dev_private;
+#if IS_ENABLED(CONFIG_DRM_FBDEV_EMULATION)
drm_fbdev_cma_restore_mode(imxdrm->fbhelper);
+#endif
}
DEFINE_DRM_GEM_CMA_FOPS(imx_drm_driver_fops);
@@ -120,6 +122,20 @@ static int compare_of(struct device *dev, void *data)
{
struct device_node *np = data;
+ if ((strncmp(dev->driver->name, "imx-dcss-crtc", strlen(dev->driver->name)) == 0) &&
+ (strncmp(np->name, "port", strlen(np->name)) == 0))
+ return 1;
+
+ if ((strncmp(dev->driver->name, "i.mx8-hdp", strlen(dev->driver->name)) == 0) &&
+ (strncmp(np->name, "hdmi", strlen(np->name)) == 0))
+ return 1;
+
+ if (strcmp(dev->driver->name, "nwl_dsi-imx") == 0 && strcmp(np->name, "mipi_dsi") == 0)
+ return 1;
+
+ return 0;
+
+#if 0
/* Special case for DI, dev->of_node may not be set yet */
if (strcmp(dev->driver->name, "imx-ipuv3-crtc") == 0) {
struct ipu_client_platformdata *pdata = dev->platform_data;
@@ -161,6 +177,7 @@ static int compare_of(struct device *dev, void *data)
}
return dev->of_node == np;
+#endif
}
static const char *const imx_drm_dpu_comp_parents[] = {
@@ -416,8 +433,10 @@ static void imx_drm_unbind(struct device *dev)
drm_kms_helper_poll_fini(drm);
+#if IS_ENABLED(CONFIG_DRM_FBDEV_EMULATION)
if (imxdrm->fbhelper)
drm_fbdev_cma_fini(imxdrm->fbhelper);
+#endif
drm_mode_config_cleanup(drm);

28
repos/dde_linux/patches/imx8_fb_imx_hdcp.patch
View File

@ -1,28 +0,0 @@
imx_hdcp.patch
diff --git a/drivers/gpu/drm/imx/hdp/imx-hdcp.c b/drivers/gpu/drm/imx/hdp/imx-hdcp.c
index 4f10737..0f5665a 100644
--- a/drivers/gpu/drm/imx/hdp/imx-hdcp.c
+++ b/drivers/gpu/drm/imx/hdp/imx-hdcp.c
@@ -527,6 +527,12 @@ int imx_hdcp_init(struct imx_hdp *hdp, struct device_node *of_node)
int ret;
const char *compat;
u32 temp;
+
+ /*
+ * 'imx_hdcp_disable()' is called regardless of -EPERM early return
+ * and needs an initialized mutex on Genode
+ */
+ mutex_init(&hdp->hdcp.mutex);
ret = of_property_read_string(of_node, "compatible", &compat);
if (ret) {
@@ -561,7 +567,7 @@ int imx_hdcp_init(struct imx_hdp *hdp, struct device_node *of_node)
return ret;
/*connector->hdcp_shim = hdcp_shim;*/
- mutex_init(&hdp->hdcp.mutex);
+ /*mutex_init(&hdp->hdcp.mutex);*/
INIT_DELAYED_WORK(&hdp->hdcp.check_work, imx_hdcp_check_work);
INIT_WORK(&hdp->hdcp.prop_work, imx_hdcp_prop_work);
return 0;

26
repos/dde_linux/patches/imx8_fb_imx_hdp.patch
View File

@ -1,26 +0,0 @@
imx_hdp.patch
diff --git a/drivers/gpu/drm/imx/hdp/imx-hdp.c b/drivers/gpu/drm/imx/hdp/imx-hdp.c
index bcfad52..0ed949a 100644
--- a/drivers/gpu/drm/imx/hdp/imx-hdp.c
+++ b/drivers/gpu/drm/imx/hdp/imx-hdp.c
@@ -1478,10 +1478,19 @@ static int imx_hdp_imx_bind(struct device *dev, struct device *master,
return -EINVAL;
}
+#if 0
res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
hdp->mem.rst_base = devm_ioremap_resource(dev, res);
if (IS_ERR(hdp->mem.rst_base))
dev_warn(dev, "Failed to get HDP RESET base register\n");
+#else
+ /*
+ * On Genode, the requested address range is already mapped by a different
+ * part of the driver and cannot be mapped again. Fortunately, not mapping
+ * it here didn't show problems so far.
+ */
+ hdp->mem.rst_base = 0;
+#endif
hdp->is_cec = of_property_read_bool(pdev->dev.of_node, "fsl,cec");

14
repos/dde_linux/patches/imx8_fb_irq_imx_irqsteer.patch
View File

@ -1,14 +0,0 @@
irq_imx_irqsteer.patch
diff --git a/drivers/irqchip/irq-imx-irqsteer.c b/drivers/irqchip/irq-imx-irqsteer.c
index e26d242..1b2334b 100644
--- a/drivers/irqchip/irq-imx-irqsteer.c
+++ b/drivers/irqchip/irq-imx-irqsteer.c
@@ -13,6 +13,7 @@
#include <linux/irq.h>
#include <linux/irqchip/chained_irq.h>
#include <linux/irqdomain.h>
+#include <linux/mod_devicetable.h>
#include <linux/of_platform.h>
#include <linux/spinlock.h>
#include <linux/pm_runtime.h>

2
repos/dde_linux/ports/dde_linux.hash
View File

@ -1 +1 @@
1c5d7ab1a7c3fb9cb594123c46ee861f782c5843
72684892e704a964b714d37fbecad427d03f4f8f

29
repos/dde_linux/ports/dde_linux.port
View File

@ -3,7 +3,7 @@ VERSION := 2
DOWNLOADS := intel_fb.archive lxip.archive \
wifi.archive fec.archive libnl.archive wpa_supplicant.git \
fw.archive usb_host.archive dwc_otg_host.git usb_hid.archive \
usb_modem.archive usb_net.archive imx8_fb.archive
usb_modem.archive usb_net.archive
#
# Tools
@ -108,16 +108,6 @@ DIR(fec) := $(SRC_DIR_FEC)
TAR_OPT(fec) := --strip-components=1 --files-from - < <(sed 's/-x.x.x/-$(VERSION_FEC)/g' $(REP_DIR)/fec.list)
HASH_INPUT += $(REP_DIR)/fec.list
#
# i.MX8 Framebuffer driver
#
SRC_DIR_IMX8_FB := src/drivers/framebuffer/imx8
URL(imx8_fb) := https://github.com/Freescale/linux-fslc/tarball/1ddf624
NAME(imx8_fb) := linux-4.14-2.0.x-imx.tgz
SHA(imx8_fb) := 879219874f74b420f2f49f197d418d800ad3b716b9cc3d2d7b85a6fbf2296928
TAR_OPT(imx8_fb) := --strip-components=1 --files-from - < <(sed 's/linux-x.x.x/Freescale-linux-fslc-1ddf624/g' $(REP_DIR)/imx8_fb.list)
DIR(imx8_fb) := $(SRC_DIR_IMX8_FB)
#
# libnl sources
#
@ -154,7 +144,6 @@ PATCHES += $(addprefix patches/,$(notdir $(wildcard $(REP_DIR)/patches/usb_modem
PATCHES += $(addprefix patches/,$(notdir $(wildcard $(REP_DIR)/patches/intel*.patch)))
PATCHES += $(addprefix patches/,$(notdir $(wildcard $(REP_DIR)/patches/fec_*.patch)))
PATCHES += $(addprefix patches/,$(notdir $(wildcard $(REP_DIR)/patches/usb_hid*.patch)))
PATCHES += $(addprefix patches/,$(notdir $(wildcard $(REP_DIR)/patches/imx8_fb*.patch)))
#IP stack
LXIP_OPT = -p1 -d$(SRC_DIR_LXIP)
@ -216,20 +205,4 @@ PATCH_OPT(patches/fec_tx_bounce_dma.patch) := -p1 -d$(SRC_DIR_FEC)
PATCH_OPT(patches/fec_tx_sync_dma_write.patch) := -p1 -d$(SRC_DIR_FEC)
PATCH_OPT(patches/fec_ndev_owner.patch) := -p1 -d$(SRC_DIR_FEC)
# Freescale i.MX8 framebuffer
IMX8_FB_OPT = -p1 -d$(SRC_DIR_IMX8_FB)
PATCH_OPT(patches/imx8_fb_dcss_blkctl.patch) := $(IMX8_FB_OPT)
PATCH_OPT(patches/imx8_fb_dcss_common.patch) := $(IMX8_FB_OPT)
PATCH_OPT(patches/imx8_fb_dcss_ctxld.patch) := $(IMX8_FB_OPT)
PATCH_OPT(patches/imx8_fb_dcss_scaler.patch) := $(IMX8_FB_OPT)
PATCH_OPT(patches/imx8_fb_drm_connector.patch) := $(IMX8_FB_OPT)
PATCH_OPT(patches/imx8_fb_drm_edid.patch) := $(IMX8_FB_OPT)
PATCH_OPT(patches/imx8_fb_drm_mm.patch) := $(IMX8_FB_OPT)
PATCH_OPT(patches/imx8_fb_drm_vblank.patch) := $(IMX8_FB_OPT)
PATCH_OPT(patches/imx8_fb_fb.patch) := $(IMX8_FB_OPT)
PATCH_OPT(patches/imx8_fb_imx_drm_core.patch) := $(IMX8_FB_OPT)
PATCH_OPT(patches/imx8_fb_imx_hdcp.patch) := $(IMX8_FB_OPT)
PATCH_OPT(patches/imx8_fb_imx_hdp.patch) := $(IMX8_FB_OPT)
PATCH_OPT(patches/imx8_fb_irq_imx_irqsteer.patch) := $(IMX8_FB_OPT)
# vi: set ft=make :

3
repos/dde_linux/recipes/pkg/drivers_interactive-imx8q_evk/README
View File

@ -1,3 +0,0 @@
Device drivers needed to run interactive
scenarios on i.MX8 EVK Board

7
repos/dde_linux/recipes/pkg/drivers_interactive-imx8q_evk/archives
View File

@ -1,7 +0,0 @@
_/raw/drivers_interactive-imx8q_evk
_/src/event_filter
_/src/imx8_fb_drv
_/src/imx8q_evk_drivers
_/src/platform_drv
_/src/usb_hid_drv
_/src/usb_host_drv

1
repos/dde_linux/recipes/pkg/drivers_interactive-imx8q_evk/hash
View File

@ -1 +0,0 @@
2021-10-13 36947718c0303e4595a7edee70ab83731494e342

3
repos/dde_linux/recipes/pkg/drivers_nic-imx8q_evk/README
View File

@ -1,3 +0,0 @@
Device drivers needed for scenarios
using one network interface

3
repos/dde_linux/recipes/pkg/drivers_nic-imx8q_evk/archives
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@ -1,3 +0,0 @@
_/src/platform_drv
_/src/fec_nic_drv
_/raw/drivers_nic-imx8q_evk

1
repos/dde_linux/recipes/pkg/drivers_nic-imx8q_evk/hash
View File

@ -1 +0,0 @@
2021-10-13 0cabd7af525d44c72a4a584d2637348dc2d69b7b

7
repos/dde_linux/recipes/raw/drivers_interactive-imx8q_evk/content.mk
View File

@ -1,7 +0,0 @@
content: drivers.config fb_drv.config event_filter.config en_us.chargen special.chargen
drivers.config fb_drv.config event_filter.config:
cp $(REP_DIR)/recipes/raw/drivers_interactive-imx8q_evk/$@ $@
en_us.chargen special.chargen:
cp $(GENODE_DIR)/repos/os/src/server/event_filter/$@ $@

261
repos/dde_linux/recipes/raw/drivers_interactive-imx8q_evk/drivers.config
View File

@ -1,261 +0,0 @@
<config verbose="true">
<parent-provides>
<service name="IRQ"/>
<service name="IO_MEM"/>
<service name="ROM"/>
<service name="PD"/>
<service name="RM"/>
<service name="CPU"/>
<service name="LOG"/>
<service name="Timer"/>
<service name="Capture"/>
<service name="Event"/>
</parent-provides>
<default caps="60"/>
<start name="report_rom">
<resource name="RAM" quantum="1M"/>
<provides> <service name="Report"/> <service name="ROM"/> </provides>
<config verbose="no">
<default-policy report="usb_drv -> devices"/>
</config>
<route>
<any-service> <parent/> </any-service>
</route>
</start>
<start name="platform_drv" caps="150">
<binary name="imx8mq_platform_drv"/>
<resource name="RAM" quantum="1M"/>
<provides> <service name="Platform"/> </provides>
<config>
<!-- GPIO banks -->
<device name="gpio1">
<io_mem address="0x30200000" size="0x10000"/>
<irq number="96"/>
<irq number="97"/>
</device>
<device name="gpio2">
<io_mem address="0x30210000" size="0x10000"/>
<irq number="98"/>
<irq number="99"/>
</device>
<device name="gpio3">
<io_mem address="0x30220000" size="0x10000"/>
<irq number="100"/>
<irq number="101"/>
</device>
<device name="gpio4">
<io_mem address="0x30230000" size="0x10000"/>
<irq number="102"/>
<irq number="103"/>
</device>
<device name="gpio5">
<io_mem address="0x30240000" size="0x10000"/>
<irq number="104"/>
<irq number="105"/>
</device>
<device name="synaptics_dsx">
<io_mem address="0x30a20000" size="0x10000"/>
<irq number="67"/>
</device>
<device name="usb_host_2" type="snps,dwc3">
<io_mem address="0x38200000" size="0x10000"/>
<irq number="73"/>
<power-domain name="usb_otg_2"/>
<clock name="usb_phy_ref_clk_root"
driver_name="usb_phy_root_clk"
parent="system_pll1_div8"
rate="100000000"/>
<clock name="usb_core_ref_clk_root"
parent="system_pll1_div8"
rate="100000000"/>
<clock name="usb_bus_clk_root"
parent="system_pll2_div2"
rate="500000000"/>
<clock name="usb_ctrl2_gate"/>
<clock name="usb_phy2_gate"/>
<property name="dr_mode" value="host"/>
<property name="snps,dis_u2_susphy_quirk"/>
</device>
<device name="dcss" type="nxp,imx8mq-dcss">
<io_mem address="0x32e00000" size="0x30000"/>
<irq number="50"/>
<clock name="display_apb_clk_root"
driver_name="apb"/>
<clock name="display_axi_clk_root"
parent="system_pll1_clk"
rate="800000000"
driver_name="axi"/>
<clock name="display_rtrm_clk_root"
parent="system_pll1_clk"
rate="400000000"
driver_name="rtrm"/>
<clock name="video_pll1_clk"
parent="25m_ref_clk"
rate="1200000000" />
<clock name="display_dtrc_clk_root"
driver_name="dtrc"/>
<clock name="dc_pixel_clk_root"
parent="video_pll1_clk"
rate="120000000"
driver_name="pix"/>
<property name="disp-dev" value="hdmi_disp"/>
</device>
<!-- CAUTION: System reset controller access is currently required by
mipi_dsi -->
<device name="src" type="fsl,imx8mq-src">
<io_mem address="0x30390000" size="0x10000"/>
</device>
<device name="mipi_dsi" type="fsl,imx8mq-mipi-dsi_drm">
<io_mem address="0x30a00000" size="0x1000"/>
<irq number="66"/>
<power-domain name="mipi"/>
<clock name="mipi_dsi_phy_ref_clk_root"
parent="video_pll1_clk"
rate="24000000"
driver_name="phy_ref"/>
<clock name="mipi_dsi_esc_rx_clk_root"
parent="system_pll1_div10"
rate="80000000"
driver_name="rx_esc"/>
<clock name="mipi_dsi_core_clk_root"
parent="system_pll1_div3"
rate="266000000"
driver_name="core"/>
</device>
<device name="hdmi" type="fsl,imx8mq-hdmi">
<io_mem address="0x32c00000" size="0x100000"/>
<io_mem address="0x32e40000" size="0x40000"/>
<io_mem address="0x32e2f000" size="0x10"/>
<irq number="48"/>
<irq number="57"/>
</device>
<policy label="usb_drv -> " info="yes"> <device name="usb_host_2"/> </policy>
<policy label="fb_drv -> " info="yes">
<device name="dcss"/>
<device name="hdmi"/>
<device name="mipi_dsi"/>
<device name="src"/>
</policy>
<policy label="gpio_drv -> " info="yes">
<device name="gpio1"/>
<device name="gpio2"/>
<device name="gpio3"/>
<device name="gpio4"/>
<device name="gpio5"/>
</policy>
<policy label="touch_drv -> "> <device name="synaptics_dsx"/> </policy>
</config>
<route> <any-service> <parent/> </any-service> </route>
</start>
<start name="event_filter" caps="80">
<resource name="RAM" quantum="1M"/>
<provides> <service name="Event"/> </provides>
<route>
<service name="ROM" label="config"> <parent label="event_filter.config"/> </service>
<service name="Event"> <parent/> </service>
<any-service> <parent/> </any-service>
</route>
</start>
<start name="usb_drv" caps="150">
<binary name="imx8q_evk_usb_host_drv"/>
<resource name="RAM" quantum="12M"/>
<provides> <service name="Usb"/> </provides>
<config bios_handoff="yes">
<report devices="yes"/>
<policy label_prefix="usb_hid_drv" class="0x3"/>
</config>
<route>
<service name="Report"> <child name="report_rom"/> </service>
<service name="RM"> <parent/> </service>
<service name="ROM"> <parent/> </service>
<service name="PD"> <parent/> </service>
<service name="CPU"> <parent/> </service>
<service name="LOG"> <parent/> </service>
<service name="Timer"> <parent/> </service>
<service name="Platform"> <child name="platform_drv"/> </service>
</route>
</start>
<start name="usb_hid_drv" caps="140">
<resource name="RAM" quantum="11M"/>
<provides><service name="Input"/></provides>
<config use_report="yes"/>
<route>
<service name="ROM" label="report"> <child name="report_rom"/> </service>
<service name="Event"> <child name="event_filter" label="usb"/> </service>
<service name="RM"> <parent/> </service>
<service name="ROM"> <parent/> </service>
<service name="PD"> <parent/> </service>
<service name="CPU"> <parent/> </service>
<service name="LOG"> <parent/> </service>
<service name="Timer"> <parent/> </service>
<service name="Usb"> <child name="usb_drv"/> </service>
</route>
</start>
<start name="gpio_drv" caps="150">
<binary name="imx_gpio_drv"/>
<resource name="RAM" quantum="2M"/>
<provides><service name="Gpio"/></provides>
<route>
<service name="RM"> <parent/> </service>
<service name="ROM"> <parent/> </service>
<service name="PD"> <parent/> </service>
<service name="CPU"> <parent/> </service>
<service name="LOG"> <parent/> </service>
<service name="Platform"> <child name="platform_drv"/> </service>
</route>
</start>
<start name="touch_drv" caps="150">
<binary name="imx8_synaptics_touch_drv"/>
<resource name="RAM" quantum="5M"/>
<provides><service name="Input"/></provides>
<route>
<service name="RM"> <parent/> </service>
<service name="ROM"> <parent/> </service>
<service name="PD"> <parent/> </service>
<service name="CPU"> <parent/> </service>
<service name="LOG"> <parent/> </service>
<service name="Timer"> <parent/> </service>
<service name="Event"> <child name="event_filter" label="touch"/> </service>
<service name="Platform"> <child name="platform_drv"/> </service>
<service name="Gpio"> <child name="gpio_drv"/> </service>
</route>
</start>
<start name="fb_drv" caps="250">
<binary name="imx8_fb_drv"/>
<resource name="RAM" quantum="40M"/>
<route>
<service name="ROM" label="config"> <parent label="fb_drv.config"/> </service>
<service name="RM"> <parent/> </service>
<service name="ROM"> <parent/> </service>
<service name="PD"> <parent/> </service>
<service name="CPU"> <parent/> </service>
<service name="LOG"> <parent/> </service>
<service name="Timer"> <parent/> </service>
<service name="Capture"> <parent/> </service>
<service name="Platform"> <child name="platform_drv"/> </service>
</route>
</start>
</config>

24
repos/dde_linux/recipes/raw/drivers_interactive-imx8q_evk/event_filter.config
View File

@ -1,24 +0,0 @@
<config>
<output>
<chargen>
<merge>
<input name="usb"/>
<input name="touch"/>
</merge>
<mod1>
<key name="KEY_LEFTSHIFT"/> <key name="KEY_RIGHTSHIFT"/>
</mod1>
<mod2>
<key name="KEY_LEFTCTRL"/> <key name="KEY_RIGHTCTRL"/>
</mod2>
<mod3>
<key name="KEY_RIGHTALT"/> <!-- AltGr -->
</mod3>
<repeat delay_ms="230" rate_ms="90"/>
<include rom="en_us.chargen"/>
<include rom="special.chargen"/>
</chargen>
</output>
<policy label="usb" input="usb"/>
<policy label="touch" input="touch"/>
</config>

4
repos/dde_linux/recipes/raw/drivers_interactive-imx8q_evk/fb_drv.config
View File

@ -1,4 +0,0 @@
<config>
<connector name="HDMI-A-1" width="1920" height="1080" hz="60" enabled="true"/>
<connector name="DSI-1" width="1080" height="1920" hz="60" enabled="false"/>
</config>

1
repos/dde_linux/recipes/raw/drivers_interactive-imx8q_evk/hash
View File

@ -1 +0,0 @@
2021-05-04 de8131f27c7ed479a5106267e7707d6b8d2d94a5

4
repos/dde_linux/recipes/raw/drivers_nic-imx8q_evk/content.mk
View File

@ -1,4 +0,0 @@
content: drivers.config
drivers.config:
cp $(REP_DIR)/recipes/raw/drivers_nic-imx8q_evk/$@ $@

47
repos/dde_linux/recipes/raw/drivers_nic-imx8q_evk/drivers.config
View File

@ -1,47 +0,0 @@
<config>
<parent-provides>
<service name="IRQ"/>
<service name="IO_MEM"/>
<service name="ROM"/>
<service name="PD"/>
<service name="RM"/>
<service name="CPU"/>
<service name="LOG"/>
<service name="Timer"/>
<service name="Uplink"/>
</parent-provides>
<default caps="100"/>
<start name="platform_drv" caps="150">
<binary name="imx8mq_platform_drv"/>
<resource name="RAM" quantum="1M"/>
<provides> <service name="Platform"/> </provides>
<config>
<device name="fec" type="fsl,imx6sx-fec">
<io_mem address="0x30be0000" size="0x4000"/>
<irq number="152"/>
<irq number="151"/>
<irq number="150"/>
<property name="mii" value="rgmii-id"/>
</device>
<policy label="nic_drv -> " info="yes"> <device name="fec"/> </policy>
</config>
<route> <any-service> <parent/> </any-service> </route>
</start>
<start name="nic_drv" caps="130">
<binary name="fec_nic_drv"/>
<resource name="RAM" quantum="20M"/>
<route>
<service name="ROM"> <parent/> </service>
<service name="PD"> <parent/> </service>
<service name="RM"> <parent/> </service>
<service name="CPU"> <parent/> </service>
<service name="LOG"> <parent/> </service>
<service name="Timer"> <parent/> </service>
<service name="Uplink"> <parent/> </service>
<service name="Platform"> <child name="platform_drv"/> </service>
</route>
</start>
</config>

1
repos/dde_linux/recipes/raw/drivers_nic-imx8q_evk/hash
View File

@ -1 +0,0 @@
2021-06-24 46ce10bd4c3ecca608609a6cfd208fd6c70b7844

28
repos/dde_linux/recipes/src/imx8_fb_drv/content.mk
View File

@ -1,28 +0,0 @@
LIB_MK := lib/mk/spec/arm_64/imx8_fb_drv.mk \
lib/mk/spec/arm_64/imx8_fb_include.mk \
lib/mk/spec/arm_64/lx_kit_setjmp.mk
PORT_DIR := $(call port_dir,$(REP_DIR)/ports/dde_linux)
MIRROR_FROM_REP_DIR := $(LIB_MK) \
lib/import/import-imx8_fb_include.mk \
src/include/legacy src/include/spec/arm_64/legacy \
src/lib/legacy/lx_kit \
$(shell cd $(REP_DIR); find src/drivers/framebuffer/imx8 -type f)
MIRROR_FROM_PORT_DIR := $(shell cd $(PORT_DIR); find src/drivers/framebuffer/imx8 -type f | grep -v ".git")
MIRROR_FROM_PORT_DIR := $(filter-out $(MIRROR_FROM_REP_DIR),$(MIRROR_FROM_PORT_DIR))
content: $(MIRROR_FROM_REP_DIR) $(MIRROR_FROM_PORT_DIR)
$(MIRROR_FROM_REP_DIR):
$(mirror_from_rep_dir)
$(MIRROR_FROM_PORT_DIR):
mkdir -p $(dir $@)
cp $(PORT_DIR)/$@ $@
content: LICENSE
LICENSE:
( echo "GNU General Public License version 2, see:"; \
echo "https://www.kernel.org/pub/linux/kernel/COPYING" ) > $@

1
repos/dde_linux/recipes/src/imx8_fb_drv/hash
View File

@ -1 +0,0 @@
2021-10-13 e074133f4b75a766dcc95dd476161a5400f7e536

7
repos/dde_linux/recipes/src/imx8_fb_drv/used_apis
View File

@ -1,7 +0,0 @@
base
os
blit
platform_session
timer_session
report_session
capture_session

28
repos/dde_linux/run/usb_hid_raw.run
View File

@ -51,37 +51,12 @@ if {[get_cmd_switch --autopilot] && [have_include "power_on/qemu"]} {
if { [get_cmd_switch --autopilot] &&
![have_board rpi] &&
![have_spec x86] &&
![have_board imx6q_sabrelite] &&
![have_board imx8q_evk]} {
![have_board imx6q_sabrelite]} {
puts "Run script does not support autopilot mode on this platform"
exit 0
}
proc platform_drv_config_non_x86 {} {
if {[have_board imx8q_evk]} {
return {
<device name="usb_host_2" type="snps,dwc3">
<io_mem address="0x38200000" size="0x10000"/>
<irq number="73"/>
<power-domain name="usb_otg_2"/>
<clock name="usb_phy_ref_clk_root"
driver_name="usb_phy_root_clk"
parent="system_pll1_div8"
rate="100000000"/>
<clock name="usb_core_ref_clk_root"
parent="system_pll1_div8"
rate="100000000"/>
<clock name="usb_bus_clk_root"
parent="system_pll2_div2"
rate="500000000"/>
<clock name="usb_ctrl2_gate"/>
<clock name="usb_phy2_gate"/>
<property name="dr_mode" value="host"/>
<property name="snps,dis_u2_susphy_quirk"/>
</device>
<policy label="usb_drv -> " info="yes"> <device name="usb_host_2"/> </policy>
}
}
if {[have_board imx6q_sabrelite]} {
return {
<device name="mxs_phy" type="fsl,imx6q-usbphy">
@ -119,7 +94,6 @@ proc platform_drv_config_non_x86 {} {
}
proc platform_drv_binary_non_x86 {} {
if {[have_board imx8q_evk]} { return imx8mq_platform_drv }
if {[have_board imx6q_sabrelite]} { return platform_drv }
if {[have_board rpi]} { return rpi_new_platform_drv }
return no_platform_drv_available

36
repos/dde_linux/src/drivers/framebuffer/imx8/README
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@ -1,36 +0,0 @@
This driver is for the i.MX8MQ EVK Board.
Default behaviour
~~~~~~~~~~~~~~~~~
When no configuration is provided to the driver, it will enable the HDMI
connector and use the best resolution as provided by EDID information from
the HDMI display.
Configuration
~~~~~~~~~~~~~
The HDMI connector can be configured explicitly in terms of resolution and
whether it should be enabled or not. This looks like the following:
! <config>
! <connector name="HDMI-A-1" width="1920" height="1080" hz="60" enabled="true"/>
! </config>
When the configuration changes during run-time, the driver will adapt to it.
To present all available connectors and their possible resolutions to the user
the driver is able to export a corresponding report ROM. This has to be
configured too, like in the following:
! <config>
! <report connectors="yes"/>
! </config>
The exported report has the following format:
! <connectors>
! <connector name="HDMI-A-1" connected="1">
! <mode width="1920" height="1080" hz="60"/>
! ...
! </connector>
! </connectors>

872
repos/dde_linux/src/drivers/framebuffer/imx8/dummies.c
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@ -1,872 +0,0 @@
#include <lx_emul.h>
#include <lx_emul_c.h>
#include <drm/drm_device.h>
#include <drm/drm_gem.h>
#include <linux/component.h>
#include <linux/irqdomain.h>
#include <linux/irqhandler.h>
#include <linux/ratelimit.h>
#include <soc/imx8/sc/types.h>
#include <uapi/linux/i2c.h>
/************************
** drivers/base/bus.c **
************************/
int bus_for_each_drv(struct bus_type *bus, struct device_driver *start,
void *data, int (*fn)(struct device_driver *, void *))
{
TRACE_AND_STOP;
return -1;
}
/*************************
** drivers/base/core.c **
*************************/
int device_for_each_child(struct device *dev, void *data,
int (*fn)(struct device *dev, void *data))
{
TRACE_AND_STOP;
return -1;
}
int device_register(struct device *dev)
{
TRACE_AND_STOP;
return -1;
}
/********************************
** drivers/base/dma-mapping.c **
********************************/
void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
dma_addr_t dma_handle)
{
TRACE_AND_STOP;
}
/*****************************
** drivers/base/platform.c **
*****************************/
int platform_device_put(struct platform_device *pdev)
{
TRACE_AND_STOP;
return 0;
}
void platform_device_unregister(struct platform_device *pdev)
{
TRACE_AND_STOP;
}
/*****************************
** drivers/base/property.c **
*****************************/
int device_add_properties(struct device *dev, const struct property_entry *properties)
{
TRACE_AND_STOP;
}
void device_remove_properties(struct device *dev)
{
TRACE_AND_STOP;
}
/***********************
** drivers/clk/clk.c **
***********************/
struct clk *clk_get_parent(struct clk *clk)
{
TRACE_AND_STOP;
return NULL;
}
bool clk_is_match(const struct clk *p, const struct clk *q)
{
TRACE_AND_STOP;
return false;
}
int clk_set_parent(struct clk *clk, struct clk *parent)
{
TRACE;
return 0;
}
/*******************************
** drivers/gpu/drm/drm_drv.c **
*******************************/
void drm_dev_unref(struct drm_device *dev)
{
TRACE_AND_STOP;
}
void drm_dev_unregister(struct drm_device *dev)
{
TRACE_AND_STOP;
}
/***********************
** linux/drm_panel.h **
***********************/
void drm_panel_init(struct drm_panel *panel)
{
TRACE;
}
void drm_panel_remove(struct drm_panel *panel)
{
TRACE_AND_STOP;
}
int drm_panel_detach(struct drm_panel *panel)
{
TRACE;
return -1;
}
/*****************************************
** drivers/gpu/drm/drm_fb_cma_helper.c **
*****************************************/
struct drm_framebuffer *drm_fb_cma_create(struct drm_device *dev,
struct drm_file *file_priv,
const struct drm_mode_fb_cmd2 *mode_cmd)
{
TRACE_AND_STOP;
return NULL;
}
struct drm_fbdev_cma;
void drm_fbdev_cma_hotplug_event(struct drm_fbdev_cma *fbdev_cma)
{
TRACE;
}
/*******************************
** drivers/i2c/i2c-core-of.c **
*******************************/
struct i2c_adapter;
void of_i2c_register_devices(struct i2c_adapter *adap)
{
TRACE_AND_STOP;
}
/**********************************
** drivers/i2c/i2c-core-smbus.c **
**********************************/
struct i2c_adapter;
s32 i2c_smbus_xfer(struct i2c_adapter *adapter, u16 addr, unsigned short flags,
char read_write, u8 command, int protocol,
union i2c_smbus_data *data) {
TRACE_AND_STOP;
}
/***********************
** drivers/of/base.c **
***********************/
bool of_device_is_available(const struct device_node *device)
{
return device;
}
/**************************
** drivers/of/dynamic.c **
**************************/
struct device_node *of_node_get(struct device_node *node)
{
TRACE;
return node;
}
void of_node_put(struct device_node *node)
{
TRACE;
}
/***********************************
** drivers/soc/imx/sc/main/ipc.c **
***********************************/
int sc_ipc_getMuID(uint32_t *mu_id)
{
TRACE_AND_STOP;
return -1;
}
void sc_ipc_close(sc_ipc_t handle)
{
TRACE_AND_STOP;
}
sc_err_t sc_ipc_open(sc_ipc_t *handle, uint32_t id)
{
TRACE_AND_STOP;
return -1;
}
/********************************************
** drivers/soc/imx/sc/svc/misc/rpc_clnt.c **
********************************************/
sc_err_t sc_misc_set_control(sc_ipc_t ipc, sc_rsrc_t resource,
sc_ctrl_t ctrl, uint32_t val)
{
TRACE_AND_STOP;
return -1;
}
/***********************
** kernel/irq/chip.c **
***********************/
void handle_level_irq(struct irq_desc *desc)
{
TRACE_AND_STOP;
}
void handle_simple_irq(struct irq_desc *desc)
{
TRACE_AND_STOP;
}
void irq_chip_eoi_parent(struct irq_data *data)
{
TRACE;
}
struct irq_data *irq_get_irq_data(unsigned int irq)
{
TRACE_AND_STOP;
}
int irq_set_chip_data(unsigned int irq, void *data)
{
TRACE;
return 0;
}
/****************************
** kernel/irq/irqdomain.c **
****************************/
unsigned int irq_create_mapping(struct irq_domain *host, irq_hw_number_t hwirq)
{
TRACE_AND_STOP;
}
int irq_domain_xlate_twocell(struct irq_domain *d, struct device_node *ctrlr,
const u32 *intspec, unsigned int intsize,
irq_hw_number_t *out_hwirq, unsigned int *out_type)
{
TRACE_AND_STOP;
return -1;
}
/******************
** lib/string.c **
******************/
char *strstr(const char * a0, const char * a1)
{
TRACE_AND_STOP;
return NULL;
}
/*****************
** linux/clk.h **
*****************/
void clk_disable_unprepare(struct clk *clk)
{
TRACE;
}
/******************
** linux/gpio.h **
******************/
void gpio_free(unsigned gpio)
{
TRACE_AND_STOP;
}
int gpio_get_value(unsigned int gpio)
{
TRACE_AND_STOP;
}
bool gpio_is_valid(int number)
{
TRACE_AND_STOP;
return false;
}
int gpio_request_one(unsigned gpio, unsigned long flags, const char *label)
{
TRACE_AND_STOP;
}
void gpio_set_value(unsigned int gpio, int value)
{
TRACE_AND_STOP;
}
/*****************
** linux/i2c.h **
*****************/
struct i2c_client;
const struct of_device_id *i2c_of_match_device(const struct of_device_id *matches,
struct i2c_client *client)
{
TRACE_AND_STOP;
return NULL;
}
/*****************
** linux/irq.h **
*****************/
void irq_set_status_flags(unsigned int irq, unsigned long set)
{
TRACE;
}
void irqd_set_trigger_type(struct irq_data *d, u32 type)
{
TRACE_AND_STOP;
}
/****************
** linux/of.h **
****************/
bool is_of_node(const struct fwnode_handle *fwnode)
{
TRACE_AND_STOP;
return false;
}
/************************
** linux/pm_runtime.h **
************************/
int pm_runtime_get_sync(struct device *dev)
{
TRACE;
return 0;
}
int pm_runtime_put_sync(struct device *dev)
{
TRACE_AND_STOP;
return 0;
}
/**********************
** linux/spinlock.h **
**********************/
void assert_spin_locked(spinlock_t *lock)
{
TRACE;
}
/*************************
** linux/timekeeping.h **
*************************/
ktime_t ktime_get_real(void)
{
TRACE_AND_STOP;
return -1;
}
/***********************
** linux/of_device.h **
***********************/
int of_device_uevent_modalias(struct device *dev, struct kobj_uevent_env *env)
{
TRACE_AND_STOP;
return -ENODEV;
}
/********************
** linux/device.h **
********************/
void device_initialize(struct device *dev)
{
TRACE;
}
void device_unregister(struct device *dev)
{
TRACE;
}
/***********************
** video/videomode.h **
***********************/
void videomode_from_timing(const struct display_timing *dt, struct videomode *vm)
{
TRACE_AND_STOP;
}
/***********************
** linux/backlight.h **
***********************/
int backlight_disable(struct backlight_device *bd)
{
TRACE_AND_STOP;
return -1;
}
/*************************
** linux/dma-mapping.h **
*************************/
int
dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt, void *cpu_addr,
dma_addr_t dma_addr, size_t size,
unsigned long attrs)
{
TRACE_AND_STOP;
return -1;
}
int dma_mmap_wc(struct device *dev,
struct vm_area_struct *vma,
void *cpu_addr, dma_addr_t dma_addr,
size_t size)
{
TRACE_AND_STOP;
return -1;
}
/*****************
** linux/phy.h **
*****************/
struct phy;
struct phy_provider *__devm_of_phy_provider_register(struct device *dev,
struct device_node *children,
struct module *owner,
struct phy * (*of_xlate)(struct device *dev,
struct of_phandle_args *args))
{
TRACE;
return NULL;
}
struct phy *of_phy_simple_xlate(struct device *dev, struct of_phandle_args *args)
{
TRACE_AND_STOP;
return NULL;
}
int phy_power_off(struct phy *phy)
{
TRACE;
return -1;
}
int phy_exit(struct phy *phy)
{
TRACE;
return -1;
}
/***********************
** linux/interrupt.h **
***********************/
void devm_free_irq(struct device *dev, unsigned int irq, void *dev_id)
{
TRACE;
}
/********************************
** linux/unaligned/generic.h **
********************************/
u32 get_unaligned_le32(const void *p)
{
TRACE_AND_STOP;
return 0;
}
/********************
** linux/regmap.h **
********************/
struct regmap;
int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
{
TRACE_AND_STOP;
return 0;
}
/************************
** linux/pm-runtime.h **
************************/
void pm_runtime_enable(struct device *dev)
{
TRACE;
}
void pm_runtime_disable(struct device *dev)
{
TRACE_AND_STOP;
}
int acpi_device_uevent_modalias(struct device *dev, struct kobj_uevent_env *ev)
{
TRACE_AND_STOP;
return -1;
}
bool acpi_driver_match_device(struct device *dev, const struct device_driver *drv)
{
TRACE_AND_STOP;
return -1;
}
const char *acpi_dev_name(struct acpi_device *adev)
{
TRACE_AND_STOP;
return NULL;
}
int add_uevent_var(struct kobj_uevent_env *env, const char *format, ...)
{
TRACE_AND_STOP;
return -1;
}
void destroy_workqueue(struct workqueue_struct *wq)
{
TRACE_AND_STOP;
}
int device_init_wakeup(struct device *dev, bool val)
{
TRACE_AND_STOP;
return -1;
}
void down_read(struct rw_semaphore *sem)
{
TRACE_AND_STOP;
}
struct dma_buf *drm_gem_prime_export(struct drm_device *dev,
struct drm_gem_object *obj,
int flags)
{
TRACE_AND_STOP;
return NULL;
}
int drm_gem_prime_fd_to_handle(struct drm_device *dev, struct drm_file *file_priv, int prime_fd, uint32_t *handle)
{
TRACE_AND_STOP;
return -1;
}
int drm_gem_prime_handle_to_fd(struct drm_device *dev, struct drm_file *file_priv, uint32_t handle, uint32_t flags, int *prime_fd)
{
TRACE_AND_STOP;
return -1;
}
struct drm_gem_object *drm_gem_prime_import(struct drm_device *dev,
struct dma_buf *dma_buf)
{
TRACE_AND_STOP;
return NULL;
}
long drm_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
{
TRACE_AND_STOP;
return -1;
}
int drm_open(struct inode *inode, struct file *filp)
{
TRACE_AND_STOP;
return -1;
}
unsigned int drm_poll(struct file *filp, struct poll_table_struct *wait)
{
TRACE_AND_STOP;
return -1;
}
void drm_prime_gem_destroy(struct drm_gem_object *obj, struct sg_table *sg)
{
TRACE_AND_STOP;
}
ssize_t drm_read(struct file *filp, char __user *buffer, size_t count, loff_t *offset)
{
TRACE_AND_STOP;
return -1;
}
int drm_release(struct inode *inode, struct file *filp)
{
TRACE_AND_STOP;
return -1;
}
void ndelay(unsigned long ns)
{
TRACE_AND_STOP;
}
loff_t noop_llseek(struct file *file, loff_t offset, int whence)
{
TRACE_AND_STOP;
return -1;
}
int of_irq_get(struct device_node *dev, int index)
{
TRACE_AND_STOP;
return -1;
}
int of_irq_get_byname(struct device_node *dev, const char *name)
{
TRACE_AND_STOP;
return -1;
}
pgprot_t pgprot_writecombine(pgprot_t prot)
{
TRACE_AND_STOP;
return prot;
}
void print_hex_dump(const char *level, const char *prefix_str, int prefix_type, int rowsize, int groupsize, const void *buf, size_t len, bool ascii)
{
TRACE;
}
int PTR_ERR_OR_ZERO(__force const void *ptr)
{
TRACE;
return 0;
}
void up_read(struct rw_semaphore *sem)
{
TRACE_AND_STOP;
}
pgprot_t vm_get_page_prot(unsigned long vm_flags)
{
pgprot_t prot;
TRACE_AND_STOP;
return prot;
}
void ww_mutex_lock_slow(struct ww_mutex *lock, struct ww_acquire_ctx *ctx)
{
TRACE_AND_STOP;
}
int ww_mutex_lock_slow_interruptible(struct ww_mutex *lock, struct ww_acquire_ctx *ctx)
{
TRACE_AND_STOP;
return -1;
}
int ww_mutex_trylock(struct ww_mutex *lock)
{
TRACE_AND_STOP;
return -1;
}
int ww_mutex_lock_interruptible(struct ww_mutex *lock, struct ww_acquire_ctx *ctx)
{
TRACE_AND_STOP;
return -1;
}
void might_lock(struct mutex *m)
{
TRACE;
}
void write_lock(rwlock_t *l)
{
TRACE;
}
void write_unlock(rwlock_t *l)
{
TRACE;
}
void read_lock(rwlock_t *l)
{
TRACE_AND_STOP;
}
void read_unlock(rwlock_t *l)
{
TRACE_AND_STOP;
}
void write_seqlock(seqlock_t *l)
{
TRACE;
}
void write_sequnlock(seqlock_t *l)
{
TRACE;
}
unsigned read_seqbegin(const seqlock_t *s)
{
TRACE;
return 0;
}
unsigned read_seqretry(const seqlock_t *s, unsigned x)
{
TRACE;
return 0;
}
struct dma_fence * reservation_object_get_excl_rcu(struct reservation_object *obj)
{
TRACE;
return obj->fence_excl;
}
void rwlock_init(rwlock_t *rw)
{
TRACE;
}
unsigned long vma_pages(struct vm_area_struct *p)
{
TRACE_AND_STOP;
return 0;
}
void call_rcu(struct rcu_head *head, void (*func)(struct rcu_head *))
{
TRACE;
func(head);
}
void seqlock_init (seqlock_t *s)
{
TRACE;
}
void irq_domain_remove(struct irq_domain *d)
{
TRACE_AND_STOP;
}
pgprot_t pgprot_decrypted(pgprot_t prot)
{
TRACE_AND_STOP;
return prot;
}
void dma_buf_put(struct dma_buf *buf)
{
TRACE_AND_STOP;
}
int ___ratelimit(struct ratelimit_state *rs, const char *func)
{
TRACE_AND_STOP;
return 0;
}
bool _drm_lease_held(struct drm_file *f, int x)
{
TRACE_AND_STOP;
return false;
}
long long atomic64_add_return(long long i, atomic64_t *p)
{
TRACE;
p->counter += i;
return p->counter;
}

163
repos/dde_linux/src/drivers/framebuffer/imx8/include/driver.h
View File

@ -1,163 +0,0 @@
/*
* \brief i.MX8 framebuffer driver
* \author Stefan Kalkowski
* \author Norman Feske
* \author Christian Prochaska
* \date 2015-10-16
*/
/*
* Copyright (C) 2015-2020 Genode Labs GmbH
*
* This file is distributed under the terms of the GNU General Public License
* version 2.
*/
#ifndef __DRIVER_H__
#define __DRIVER_H__
/* Genode includes */
#include <base/component.h>
#include <dataspace/capability.h>
#include <capture_session/connection.h>
#include <timer_session/connection.h>
#include <util/reconstructible.h>
#include <base/attached_dataspace.h>
#include <base/attached_ram_dataspace.h>
#include <base/attached_rom_dataspace.h>
#include <os/reporter.h>
#include <lx_emul_c.h>
namespace Framebuffer {
using namespace Genode;
class Driver;
}
class Framebuffer::Driver
{
private:
using Area = Capture::Area;
using Pixel = Capture::Pixel;
struct Configuration
{
struct lx_c_fb_config _lx = { .height = 16,
.width = 64,
.pitch = 64,
.bpp = 4,
.addr = nullptr,
.size = 0,
.lx_fb = nullptr };
} _lx_config;
Env &_env;
Attached_rom_dataspace &_config;
Timer::Connection _timer { _env };
Reporter _reporter { _env, "connectors" };
Signal_context_capability _config_sigh;
drm_display_mode * _preferred_mode(drm_connector *connector,
unsigned &brightness);
/*
* Capture
*/
Constructible<Capture::Connection> _capture { };
Constructible<Capture::Connection::Screen> _captured_screen { };
Timer::Connection _capture_timer { _env };
Signal_handler<Driver> _capture_timer_handler {
_env.ep(), *this, &Driver::_handle_capture_timer };
void _handle_capture_timer()
{
if (!_captured_screen.constructed())
return;
Area const phys_size { _lx_config._lx.pitch/sizeof(Pixel),
_lx_config._lx.height };
Capture::Surface<Pixel> surface((Pixel *)_lx_config._lx.addr, phys_size);
_captured_screen->apply_to_surface(surface);
}
int _force_width_from_config()
{
return _config.xml().attribute_value<unsigned>("force_width", 0);
}
int _force_height_from_config()
{
return _config.xml().attribute_value<unsigned>("force_height", 0);
}
public:
Driver(Env &env, Attached_rom_dataspace &config)
:
_env(env), _config(config)
{
_capture_timer.sigh(_capture_timer_handler);
}
void finish_initialization();
void update_mode();
void generate_report();
/**
* Register signal handler used for config updates
*
* The signal handler is artificially triggered as a side effect
* of connector changes.
*/
void config_sigh(Signal_context_capability sigh)
{
_config_sigh = sigh;
}
void trigger_reconfiguration()
{
/*
* Trigger the reprocessing of the configuration following the
* same ontrol flow as used for external config changes.
*/
if (_config_sigh.valid())
Signal_transmitter(_config_sigh).submit();
else
warning("config signal handler unexpectedly undefined");
}
void config_changed()
{
_config.update();
update_mode();
Area const size { _lx_config._lx.width, _lx_config._lx.height };
if (_captured_screen.constructed()) {
_capture.destruct();
_captured_screen.destruct();
}
_capture.construct(_env);
_captured_screen.construct(*_capture, _env.rm(), size);
_capture_timer.trigger_periodic(10*1000);
}
};
#endif /* __DRIVER_H__ */

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repos/dde_linux/src/drivers/framebuffer/imx8/include/lx_emul.h
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/*
* \brief C-declarations needed for device driver environment
* \author Stefan Kalkowski
* \author Norman Feske
* \date 2016-06-17
*/
#ifndef _LX_EMUL_C_H_
#define _LX_EMUL_C_H_
#if 0
#define TRACE \
do { \
lx_printf("%s not implemented\n", __func__); \
} while (0)
#else
#define TRACE do { ; } while (0)
#endif
#define TRACE_AND_STOP \
do { \
lx_printf("%s not implemented called from %p\n", __func__, __builtin_return_address(0)); \
BUG(); \
} while (0)
#define ASSERT(x) \
do { \
if (!(x)) { \
lx_printf("%s:%u assertion failed\n", __func__, __LINE__); \
BUG(); \
} \
} while (0)
#include <legacy/lx_emul/extern_c_begin.h>
struct drm_device;
struct drm_framebuffer;
struct drm_display_mode;
struct drm_connector;
struct lx_c_fb_config {
int height;
int width;
unsigned pitch;
unsigned bpp;
void * addr;
unsigned long size;
struct drm_framebuffer * lx_fb;
};
void lx_c_allocate_framebuffer(struct drm_device *,
struct lx_c_fb_config *);
void lx_c_set_mode(struct drm_device *, struct drm_connector *,
struct drm_framebuffer *, struct drm_display_mode *);
void lx_c_set_driver(struct drm_device *, void *);
void * lx_c_get_driver(struct drm_device *);
#include <legacy/lx_emul/extern_c_end.h>
#endif /* _LX_EMUL_C_H_ */

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repos/dde_linux/src/drivers/framebuffer/imx8/lx_emul.cc
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/*
* \brief Linux emulation C helper functions
* \author Stefan Kalkowski
* \author Christian Prochaska
* \date 2016-03-22
*/
/*
* Copyright (C) 2016-2019 Genode Labs GmbH
*
* This file is distributed under the terms of the GNU General Public License
* version 2.
*/
/* Genode includes */
#include <lx_emul.h>
#include <lx_emul_c.h>
#include <drm/drm_atomic_helper.h>
#include <drm/drm_encoder.h>
#include <drm/drm_gem_cma_helper.h>
#include <drm/drm_gem_framebuffer_helper.h>
#include <drm/drm_modeset_helper.h>
#include <imx/imx-drm.h>
void lx_c_allocate_framebuffer(struct drm_device * dev,
struct lx_c_fb_config *c)
{
/* from drm_fbdev_cma_create() */
struct drm_gem_cma_object *obj;
c->pitch = c->width * c->bpp;
c->size = c->pitch * c->height;
obj = drm_gem_cma_create(dev, c->size);
if (obj == NULL)
return;
c->addr = obj->vaddr;
/* from drm_gem_fb_alloc() */
struct drm_framebuffer *fb = kzalloc(sizeof(*fb), GFP_KERNEL);
if (fb == NULL)
goto err;
struct drm_mode_fb_cmd2 mode_cmd = { 0 };
mode_cmd.width = c->width;
mode_cmd.height = c->height;
mode_cmd.pitches[0] = c->pitch;
mode_cmd.pixel_format = DRM_FORMAT_XRGB8888;
drm_helper_mode_fill_fb_struct(dev, fb, &mode_cmd);
fb->obj[0] = &obj->base;
static const struct drm_framebuffer_funcs drm_fb_cma_funcs = {
.destroy = drm_gem_fb_destroy,
};
if (drm_framebuffer_init(dev, fb, &drm_fb_cma_funcs) != 0) {
kfree(fb);
goto err;
}
c->lx_fb = fb;
return;
err:
drm_gem_object_put_unlocked(&obj->base); /* as in drm_gem_cma_create() */
return;
}
void lx_c_set_mode(struct drm_device * dev, struct drm_connector * connector,
struct drm_framebuffer *fb, struct drm_display_mode *mode)
{
struct drm_crtc * crtc = NULL;
struct drm_encoder * encoder = connector->encoder;
if (!encoder) {
struct drm_encoder *enc;
list_for_each_entry(enc, &dev->mode_config.encoder_list, head) {
unsigned i;
for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++)
if (connector->encoder_ids[i] == enc->base.id) break;
if (i == DRM_CONNECTOR_MAX_ENCODER) continue;
bool used = false;
struct drm_connector *c;
list_for_each_entry(c, &dev->mode_config.connector_list, head) {
if (c->encoder == enc) used = true;
}
if (used) continue;
encoder = enc;
break;
}
}
if (!encoder) {
lx_printf("Found no encoder for the connector %s\n", connector->name);
return;
}
unsigned used_crtc = 0;
crtc = encoder->crtc;
if (!crtc) {
unsigned i = 0;
struct drm_crtc *c;
list_for_each_entry(c, &dev->mode_config.crtc_list, head) {
if (!(encoder->possible_crtcs & (1 << i))) continue;
if (c->state->enable) {
used_crtc ++;
continue;
}
crtc = c;
break;
}
}
if (!crtc) {
if (mode)
lx_printf("Found no crtc for the connector %s used/max %u+1/%u\n",
connector->name, used_crtc, dev->mode_config.num_crtc);
return;
}
DRM_DEBUG("%s%s for connector %s\n", mode ? "set mode " : "no mode",
mode ? mode->name : "", connector->name);
struct drm_mode_set set;
set.crtc = crtc;
set.x = 0;
set.y = 0;
set.mode = mode;
set.connectors = &connector;
set.num_connectors = mode ? 1 : 0;
set.fb = mode ? fb : 0;
uint32_t const ref_cnt_before = drm_framebuffer_read_refcount(fb);
int ret = drm_atomic_helper_set_config(&set, dev->mode_config.acquire_ctx);
if (ret)
lx_printf("Error: set config failed ret=%d refcnt before=%u after=%u\n",
ret, ref_cnt_before, drm_framebuffer_read_refcount(fb));
}
void lx_c_set_driver(struct drm_device * dev, void * driver)
{
struct imx_drm_device *dev_priv = dev->dev_private;
ASSERT(!dev_priv->fbhelper);
dev_priv->fbhelper = (struct drm_fbdev_cma *) driver;
}
void* lx_c_get_driver(struct drm_device * dev)
{
struct imx_drm_device *dev_priv = dev->dev_private;
return (void*) dev_priv->fbhelper;
}

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/*
* \brief i.MX8 framebuffer driver
* \author Norman Feske
* \author Stefan Kalkowski
* \author Christian Prochaska
* \date 2015-08-19
*/
/*
* Copyright (C) 2015-2020 Genode Labs GmbH
*
* This file is distributed under the terms of the GNU General Public License
* version 2.
*/
/* Genode includes */
#include <base/attached_io_mem_dataspace.h>
#include <base/log.h>
#include <base/component.h>
#include <base/heap.h>
#include <base/attached_rom_dataspace.h>
/* local includes */
#include <driver.h>
/* Linux emulation environment includes */
#include <lx_emul.h>
#include <legacy/lx_kit/env.h>
#include <legacy/lx_kit/malloc.h>
#include <legacy/lx_kit/scheduler.h>
#include <legacy/lx_kit/timer.h>
#include <legacy/lx_kit/irq.h>
#include <legacy/lx_kit/work.h>
/* Linux module functions */
extern "C" void radix_tree_init(); /* called by start_kernel(void) normally */
extern "C" void drm_connector_ida_init(); /* called by drm_core_init(void) normally */
extern "C" int module_irq_imx_irqsteer_init();
extern "C" int module_imx_drm_pdrv_init();
extern "C" int module_dcss_driver_init();
extern "C" int module_dcss_crtc_driver_init();
extern "C" int module_imx_hdp_imx_platform_driver_init();
extern "C" int module_mixel_mipi_phy_driver_init();
extern "C" int module_imx_nwl_dsi_driver_bridge_init();
extern "C" int module_imx_nwl_dsi_driver_init();
extern "C" int module_rad_panel_driver_init();
extern "C" void postcore_mipi_dsi_bus_init();
unsigned long jiffies;
namespace Framebuffer { struct Main; }
struct Framebuffer::Main
{
void _run_linux();
/**
* Entry for executing code in the Linux kernel context
*/
static void _run_linux_entry(void *m)
{
reinterpret_cast<Main*>(m)->_run_linux();
}
Env &_env;
Entrypoint &_ep { _env.ep() };
Attached_rom_dataspace _config { _env, "config" };
Heap _heap { _env.ram(), _env.rm() };
Driver _driver { _env, _config };
/* Linux task that handles the initialization */
Constructible<Lx::Task> _linux;
Signal_handler<Main> _policy_change_handler {
_env.ep(), *this, &Main::_handle_policy_change };
bool _policy_change_pending = false;
void _handle_policy_change()
{
_policy_change_pending = true;
_linux->unblock();
Lx::scheduler().schedule();
}
bool _hdmi()
{
try {
Xml_node config = _config.xml();
Xml_node xn = config.sub_node();
for (unsigned i = 0; i < config.num_sub_nodes(); xn = xn.next()) {
if (!xn.has_type("connector"))
continue;
bool enabled = xn.attribute_value("enabled", true);
if (!enabled)
continue;
/* check first connector only */
typedef String<64> Name;
Name const con_policy = xn.attribute_value("name", Name());
if (con_policy == "DSI-1")
return false;
return true;
}
} catch (...) { }
return true;
}
Main(Env &env) : _env(env)
{
log("--- i.MX8 framebuffer driver ---");
Lx_kit::construct_env(_env);
LX_MUTEX_INIT(bridge_lock);
LX_MUTEX_INIT(core_lock);
LX_MUTEX_INIT(component_mutex);
LX_MUTEX_INIT(host_lock);
/* init singleton Lx::Scheduler */
Lx::scheduler(&_env);
Lx::malloc_init(_env, _heap);
/* init singleton Lx::Timer */
Lx::timer(&_env, &_ep, &_heap, &jiffies);
/* init singleton Lx::Irq */
Lx::Irq::irq(&_ep, &_heap);
/* init singleton Lx::Work */
Lx::Work::work_queue(&_heap);
_linux.construct(_run_linux_entry, reinterpret_cast<void*>(this),
"linux", Lx::Task::PRIORITY_0, Lx::scheduler());
/* give all task a first kick before returning */
Lx::scheduler().schedule();
}
};
void Framebuffer::Main::_run_linux()
{
system_wq = alloc_workqueue("system_wq", 0, 0);
radix_tree_init();
drm_connector_ida_init();
module_irq_imx_irqsteer_init();
module_dcss_driver_init();
module_imx_drm_pdrv_init();
module_dcss_crtc_driver_init();
module_imx_hdp_imx_platform_driver_init();
/* MIPI DSI */
module_mixel_mipi_phy_driver_init();
module_imx_nwl_dsi_driver_bridge_init();
module_imx_nwl_dsi_driver_init();
postcore_mipi_dsi_bus_init();
module_rad_panel_driver_init();
/**
* This device is originally created with the name '32e2d000.irqsteer'
* via 'of_platform_bus_create()'. Here it is called 'imx-irqsteer' to match
* the driver name.
*/
struct platform_device *imx_irqsteer_pdev =
platform_device_alloc("imx-irqsteer", 0);
static resource imx_irqsteer_resources[] = {
{ IOMEM_BASE_IRQSTEER, IOMEM_END_IRQSTEER,
"imx-irqsteer", IORESOURCE_MEM },
{ IRQ_IRQSTEER, IRQ_IRQSTEER, "imx-irqsteer", IORESOURCE_IRQ },
};
imx_irqsteer_pdev->num_resources = 2;
imx_irqsteer_pdev->resource = imx_irqsteer_resources;
imx_irqsteer_pdev->dev.of_node = (device_node*)kzalloc(sizeof(device_node), 0);
imx_irqsteer_pdev->dev.of_node->name = "imx-irqsteer";
imx_irqsteer_pdev->dev.of_node->full_name = "imx-irqsteer";
platform_device_register(imx_irqsteer_pdev);
/**
* This device is originally created with the name '32c00000.hdmi'
* via 'of_platform_bus_create()'. Here it is called 'i.mx8-hdp' to match
* the driver name.
*/
struct platform_device *hdp_pdev =
platform_device_alloc("i.mx8-hdp", 0);
static resource hdp_resources[] = {
{ IOMEM_BASE_HDMI_CTRL, IOMEM_END_HDMI_CTRL,
"hdp_ctrl", IORESOURCE_MEM },
{ IOMEM_BASE_HDMI_CRS, IOMEM_END_HDMI_CRS,
"hdp_crs", IORESOURCE_MEM },
{ IOMEM_BASE_HDMI_RST, IOMEM_END_HDMI_RST,
"hdp_reset", IORESOURCE_MEM },
{ 33, 33, "plug_in", IORESOURCE_IRQ },
{ 34, 34, "plug_out", IORESOURCE_IRQ },
};
hdp_pdev->num_resources = 5;
hdp_pdev->resource = hdp_resources;
hdp_pdev->dev.of_node = (device_node*)kzalloc(sizeof(device_node), 0);
hdp_pdev->dev.of_node->name = "hdmi";
hdp_pdev->dev.of_node->full_name = "hdmi";
hdp_pdev->dev.of_node->properties = (property*)kzalloc(sizeof(property), 0);
hdp_pdev->dev.of_node->properties->name = "compatible";
hdp_pdev->dev.of_node->properties->value = (void*)"fsl,imx8mq-hdmi";
bool hdmi = _hdmi();
if (hdmi)
platform_device_register(hdp_pdev);
struct platform_device *mipi_dsi_phy_pdev =
platform_device_alloc("mixel-mipi-dsi-phy", 0);
static resource mipi_dsi_phy_resources[] = {
{ IOMEM_BASE_MIPI_DPHY, IOMEM_BASE_MIPI_DPHY+0xff, "dsi_phy", IORESOURCE_MEM }
};
mipi_dsi_phy_pdev->num_resources = 1;
mipi_dsi_phy_pdev->resource = mipi_dsi_phy_resources;
mipi_dsi_phy_pdev->dev.of_node = (device_node*)kzalloc(sizeof(device_node), 0);
mipi_dsi_phy_pdev->dev.of_node->properties = (property*)kzalloc(2*sizeof(property), 0);
mipi_dsi_phy_pdev->dev.of_node->properties[0].name = "compatible";
mipi_dsi_phy_pdev->dev.of_node->properties[0].value = (void*)"mixel,imx8mq-mipi-dsi-phy";
mipi_dsi_phy_pdev->dev.of_node->properties[0].next = &mipi_dsi_phy_pdev->dev.of_node->properties[1];
mipi_dsi_phy_pdev->dev.of_node->properties[1].name = "dsi_phy";
mipi_dsi_phy_pdev->dev.of_node->properties[1].value = (void*)0;
mipi_dsi_phy_pdev->dev.parent = &mipi_dsi_phy_pdev->dev;
if (hdmi == false) {
platform_device_register(mipi_dsi_phy_pdev);
}
/**
* This device is originally created with the name '32e00000.dcss'
* via 'of_platform_bus_create()'. Here it is called 'dcss-core' to match
* the driver name.
*/
struct platform_device *dcss_pdev =
platform_device_alloc("dcss-core", 0);
static resource dcss_resources[] = {
{ IOMEM_BASE_DCSS, IOMEM_END_DCSS, "dcss", IORESOURCE_MEM },
{ 3, 3, "dpr_dc_ch0", IORESOURCE_IRQ },
{ 4, 4, "dpr_dc_ch1", IORESOURCE_IRQ },
{ 5, 5, "dpr_dc_ch2", IORESOURCE_IRQ },
{ 6, 6, "ctx_ld", IORESOURCE_IRQ },
{ 8, 8, "ctxld_kick", IORESOURCE_IRQ },
{ 9, 9, "dtg_prg1", IORESOURCE_IRQ },
{ 16, 16, "dtrc_ch1", IORESOURCE_IRQ },
{ 17, 17, "dtrc_ch2", IORESOURCE_IRQ },
};
dcss_pdev->num_resources = 9;
dcss_pdev->resource = dcss_resources;
dcss_pdev->dev.of_node = (device_node*)kzalloc(sizeof(device_node), 0);
dcss_pdev->dev.of_node->name = "dcss";
dcss_pdev->dev.of_node->full_name = "dcss";
dcss_pdev->dev.of_node->properties = (property*)kzalloc(sizeof(property), 0);
dcss_pdev->dev.of_node->properties->name = "disp-dev";
dcss_pdev->dev.of_node->properties->value = hdmi ? (void*)"hdmi_disp" : (void *)"mipi_disp";
platform_device_register(dcss_pdev);
struct platform_device *mipi_dsi_bridge_pdev =
platform_device_alloc("nwl-mipi-dsi", 0);
static resource mipi_dsi_bridge_resources[] = {
{ IOMEM_BASE_MIPI_DSI, IOMEM_END_MIPI_DSI, "mipi_dsi_bridge", IORESOURCE_MEM },
{ IRQ_MIPI_DSI, IRQ_MIPI_DSI, "mipi_dsi", IORESOURCE_IRQ }
};
mipi_dsi_bridge_pdev->num_resources = 2;
mipi_dsi_bridge_pdev->resource = mipi_dsi_bridge_resources;
Genode::addr_t **phy_ptr =
(Genode::addr_t **)devres_find(&mipi_dsi_phy_pdev->dev, devm_phy_consume, nullptr, nullptr);
mipi_dsi_bridge_pdev->dev.of_node = (device_node*)kzalloc(sizeof(device_node), 0);
mipi_dsi_bridge_pdev->dev.of_node->name = "mipi_dsi_bridge";
mipi_dsi_bridge_pdev->dev.of_node->properties = (property*)kzalloc(sizeof(property), 0);
mipi_dsi_bridge_pdev->dev.of_node->properties[0].name = "dphy";
mipi_dsi_bridge_pdev->dev.of_node->properties[0].value = phy_ptr ? (void*)*phy_ptr : nullptr;
mipi_dsi_bridge_pdev->dev.of_node->properties[0].next = nullptr;
if (hdmi == false)
platform_device_register(mipi_dsi_bridge_pdev);
/*
* This device is originally created with the name 'display-subsystem'
* via 'of_platform_bus_create()'. Here it is called 'imx-drm' to match
* the driver name.
*/
struct platform_device *display_subsystem_pdev =
platform_device_alloc("imx-drm", 0);
static device_node display_subsystem_of_node = { "display-subsystem" };
display_subsystem_pdev->dev.of_node = &display_subsystem_of_node;
platform_device_register(display_subsystem_pdev);
struct platform_device *mipi_dsi_imx_pdev =
platform_device_alloc("nwl_dsi-imx", 0);
mipi_dsi_imx_pdev->dev.of_node = (device_node*)kzalloc(sizeof(device_node), 0);
mipi_dsi_imx_pdev->dev.of_node->name = "mipi_dsi";
mipi_dsi_imx_pdev->dev.of_node->properties = (property*)kzalloc(2*sizeof(property), 0);
mipi_dsi_imx_pdev->dev.of_node->properties[0].name = "compatible";
mipi_dsi_imx_pdev->dev.of_node->properties[0].value = (void *)"fsl,imx8mq-mipi-dsi_drm";
mipi_dsi_imx_pdev->dev.of_node->properties[0].next = &mipi_dsi_imx_pdev->dev.of_node->properties[1];
mipi_dsi_imx_pdev->dev.of_node->properties[1].name = "dphy";
mipi_dsi_imx_pdev->dev.of_node->properties[1].value = phy_ptr ? (void *)*phy_ptr : nullptr;
if (hdmi == false)
platform_device_register(mipi_dsi_imx_pdev);
_driver.finish_initialization();
_driver.config_sigh(_policy_change_handler);
_config.sigh(_policy_change_handler);
while (1) {
Lx::scheduler().current()->block_and_schedule();
while (_policy_change_pending) {
_policy_change_pending = false;
_driver.config_changed();
}
}
}
void Component::construct(Genode::Env &env)
{
/* XXX execute constructors of global statics */
env.exec_static_constructors();
static Framebuffer::Main main(env);
}

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repos/dde_linux/src/drivers/framebuffer/imx8/platform.cc
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/*
* \brief Platform driver relevant lx_kit backend functions
* \author Stefan Kalkowski
* \date 2017-11-01
*
* Taken from the USB driver.
*/
/*
* Copyright (C) 2017 Genode Labs GmbH
*
* This file is distributed under the terms of the GNU General Public License
* version 2.
*/
#include <base/ram_allocator.h>
#include <legacy/lx_kit/backend_alloc.h>
#include <legacy/lx_kit/env.h>
/****************************
** lx_kit/backend_alloc.h **
****************************/
void backend_alloc_init(Genode::Env&, Genode::Ram_allocator&,
Genode::Allocator&)
{
/* intentionally left blank */
}
Genode::Ram_dataspace_capability
Lx::backend_alloc(Genode::addr_t size, Genode::Cache cache) {
return Lx_kit::env().env().ram().alloc(size, cache); }
void Lx::backend_free(Genode::Ram_dataspace_capability cap) {
return Lx_kit::env().env().ram().free(cap); }

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repos/dde_linux/src/drivers/framebuffer/imx8/target.mk
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@ -1,24 +0,0 @@
REQUIRES = arm_v8a
TARGET = imx8_fb_drv
LIBS = base imx8_fb_include lx_kit_setjmp imx8_fb_drv blit
SRC_CC = main.cc platform.cc lx_emul.cc
SRC_C = dummies.c lx_emul_c.c
# lx_kit
SRC_CC += printf.cc \
bug.cc \
env.cc \
irq.cc \
malloc.cc \
scheduler.cc \
timer.cc \
work.cc
INC_DIR += $(REP_DIR)/src/include
vpath %.cc $(PRG_DIR)
vpath %.cc $(REP_DIR)/src/lib/legacy/lx_kit
CC_CXX_WARN_STRICT =
CC_OPT += -Wno-narrowing

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repos/dde_linux/src/drivers/usb_host/spec/imx8q_evk/platform.cc
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/*
* \brief XHCI for Freescale i.MX8
* \author Alexander Boettcher
* \date 2019-12-02
*
* The driver is supposed to work solely if in the bootloader (uboot) the
* usb controller got powered on and the bootloader does not disable it on
* Genode boot.
*/
/*
* Copyright (C) 2019 Genode Labs GmbH
*
* This file is distributed under the terms of the GNU General Public License
* version 2.
*/
#include <platform.h>
#include <lx_emul.h>
extern "C" void module_dwc3_driver_init();
extern "C" void module_xhci_plat_init();
void platform_hcd_init(Genode::Env &, Services *)
{
module_dwc3_driver_init();
module_xhci_plat_init();
lx_platform_device_init();
}

17
repos/dde_linux/src/drivers/usb_host/spec/imx8q_evk/target.mk
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include $(REP_DIR)/src/drivers/usb_host/target.inc
TARGET = imx8q_evk_usb_host_drv
REQUIRES = arm_v8
SRC_C += usb/dwc3/core.c
SRC_C += usb/dwc3/host.c
SRC_C += usb/host/xhci-plat.c
INC_DIR += $(REP_DIR)/src/drivers/usb_host/spec/arm
INC_DIR += $(REP_DIR)/src/include/spec/arm_64
SRC_CC += spec/arm/platform.cc
SRC_CC += spec/imx8q_evk/platform.cc
CC_OPT += -DCONFIG_ARM64
CC_OPT += -DCONFIG_USB_DWC3_HOST=1

4
repos/gems/recipes/pkg/drivers_managed-imx8q_evk/README
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@ -1,4 +0,0 @@
Device-driver subsystem that starts drivers for
framebuffer, input, and block devices on demand

11
repos/gems/recipes/pkg/drivers_managed-imx8q_evk/archives
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@ -1,11 +0,0 @@
_/raw/drivers_managed-imx8q_evk
_/src/event_filter
_/src/imx8_fb_drv
_/src/imx8q_evk_drivers
_/src/platform_drv
_/src/report_rom
_/src/rom_filter
_/src/rom_reporter
_/src/usb_block_drv
_/src/usb_hid_drv
_/src/usb_host_drv

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repos/gems/recipes/pkg/drivers_managed-imx8q_evk/hash
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@ -1 +0,0 @@
2021-10-13 1251a0601c05ba4dbeb58a15c2750a4dc6907fd4

1
repos/gems/recipes/pkg/sculpt-imx8q_evk/README
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@ -1 +0,0 @@
The i.MX8 Quad EVK specific parts needed to run sculpt.

4
repos/gems/recipes/pkg/sculpt-imx8q_evk/archives
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@ -1,4 +0,0 @@
_/pkg/drivers_managed-imx8q_evk
_/pkg/sculpt
_/src/fec_nic_drv

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repos/gems/recipes/pkg/sculpt-imx8q_evk/hash
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@ -1 +0,0 @@
2021-10-14 c556e2753528478c2f94cf70068d6bd7ecaa552a

3
repos/gems/recipes/raw/drivers_managed-imx8q_evk/block_devices.report
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@ -1,3 +0,0 @@
<block_devices default="sdcard">
<device label="sdcard" model="Unknown"/>
</block_devices>

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repos/gems/recipes/raw/drivers_managed-imx8q_evk/content.mk
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@ -1,11 +0,0 @@
content: drivers.config fb_drv.config event_filter.config en_us.chargen \
special.chargen numlock_remap.config block_devices.report
drivers.config numlock_remap.config event_filter.config block_devices.report:
cp $(REP_DIR)/recipes/raw/drivers_managed-imx8q_evk/$@ $@
fb_drv.config:
cp $(GENODE_DIR)/repos/dde_linux/recipes/raw/drivers_interactive-imx8q_evk/$@ $@
en_us.chargen special.chargen:
cp $(GENODE_DIR)/repos/os/src/server/event_filter/$@ $@

350
repos/gems/recipes/raw/drivers_managed-imx8q_evk/drivers.config
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@ -1,350 +0,0 @@
<config>
<parent-provides>
<service name="ROM"/>
<service name="IRQ"/>
<service name="IO_MEM"/>
<service name="PD"/>
<service name="RM"/>
<service name="CPU"/>
<service name="LOG"/>
<service name="Timer"/>
<service name="Report"/>
<service name="Capture"/>
<service name="Event"/>
</parent-provides>
<report child_caps="true" child_ram="true" init_caps="true" init_ram="true" delay_ms="5000"/>
<default-route>
<any-service> <parent/> <any-child/> </any-service>
</default-route>
<default caps="100"/>
<service name="Block">
<default-policy> <child name="sd_card_drv"/> </default-policy> </service>
<service name="Usb">
<default-policy> <child name="usb_drv"/> </default-policy> </service>
<service name="Platform">
<default-policy> <child name="platform_drv"/> </default-policy> </service>
<start name="report_rom">
<resource name="RAM" quantum="2M"/>
<provides> <service name="Report"/> <service name="ROM"/> </provides>
<config verbose="no">
<policy label="rom_reporter -> usb_devices" report="usb_drv -> devices"/>
<policy label="usb_hid_drv -> report" report="usb_drv -> devices"/>
</config>
</start>
<start name="rom_reporter">
<resource name="RAM" quantum="1M"/>
<config>
<rom label="usb_devices"/>
<rom label="block_devices"/>
</config>
<route>
<service name="ROM" label="block_devices"><parent label="block_devices.report"/> </service>
<service name="ROM" label="usb_devices"> <child name="report_rom"/> </service>
<service name="Report" label="usb_devices"> <parent label="usb_devices"/> </service>
<service name="Report" label="block_devices"><parent label="block_devices"/> </service>
<service name="LOG"> <parent/> </service>
<service name="PD"> <parent/> </service>
<service name="CPU"> <parent/> </service>
<service name="ROM"> <parent/> </service>
</route>
</start>
<start name="platform_drv" caps="150">
<binary name="imx8mq_platform_drv"/>
<resource name="RAM" quantum="1M"/>
<provides> <service name="Platform"/> </provides>
<config>
<!-- GPIO banks -->
<device name="gpio1">
<io_mem address="0x30200000" size="0x10000"/>
<irq number="96"/>
<irq number="97"/>
</device>
<device name="gpio2">
<io_mem address="0x30210000" size="0x10000"/>
<irq number="98"/>
<irq number="99"/>
</device>
<device name="gpio3">
<io_mem address="0x30220000" size="0x10000"/>
<irq number="100"/>
<irq number="101"/>
</device>
<device name="gpio4">
<io_mem address="0x30230000" size="0x10000"/>
<irq number="102"/>
<irq number="103"/>
</device>
<device name="gpio5">
<io_mem address="0x30240000" size="0x10000"/>
<irq number="104"/>
<irq number="105"/>
</device>
<device name="synaptics_dsx">
<io_mem address="0x30a20000" size="0x10000"/>
<irq number="67"/>
</device>
<device name="usb_host_2" type="snps,dwc3">
<io_mem address="0x38200000" size="0x10000"/>
<irq number="73"/>
<power-domain name="usb_otg_2"/>
<clock name="usb_phy_ref_clk_root"
driver_name="usb_phy_root_clk"
parent="system_pll1_div8"
rate="100000000"/>
<clock name="usb_core_ref_clk_root"
parent="system_pll1_div8"
rate="100000000"/>
<clock name="usb_bus_clk_root"
parent="system_pll2_div2"
rate="500000000"/>
<clock name="usb_ctrl2_gate"/>
<clock name="usb_phy2_gate"/>
<property name="dr_mode" value="host"/>
<property name="snps,dis_u2_susphy_quirk"/>
</device>
<device name="dcss" type="nxp,imx8mq-dcss">
<io_mem address="0x32e00000" size="0x30000"/>
<irq number="50"/>
<clock name="display_apb_clk_root"
driver_name="apb"/>
<clock name="display_axi_clk_root"
parent="system_pll1_clk"
rate="800000000"
driver_name="axi"/>
<clock name="display_rtrm_clk_root"
parent="system_pll1_clk"
rate="400000000"
driver_name="rtrm"/>
<clock name="video_pll1_clk"
parent="25m_ref_clk"
rate="1200000000" />
<clock name="display_dtrc_clk_root"
driver_name="dtrc"/>
<clock name="dc_pixel_clk_root"
parent="video_pll1_clk"
rate="120000000"
driver_name="pix"/>
<property name="disp-dev" value="hdmi_disp"/>
</device>
<!-- CAUTION: System reset controller access is currently required by
mipi_dsi -->
<device name="src" type="fsl,imx8mq-src">
<io_mem address="0x30390000" size="0x10000"/>
</device>
<device name="mipi_dsi" type="fsl,imx8mq-mipi-dsi_drm">
<io_mem address="0x30a00000" size="0x1000"/>
<irq number="66"/>
<power-domain name="mipi"/>
<clock name="mipi_dsi_phy_ref_clk_root"
parent="video_pll1_clk"
rate="24000000"
driver_name="phy_ref"/>
<clock name="mipi_dsi_esc_rx_clk_root"
parent="system_pll1_div10"
rate="80000000"
driver_name="rx_esc"/>
<clock name="mipi_dsi_core_clk_root"
parent="system_pll1_div3"
rate="266000000"
driver_name="core"/>
</device>
<device name="hdmi" type="fsl,imx8mq-hdmi">
<io_mem address="0x32c00000" size="0x100000"/>
<io_mem address="0x32e40000" size="0x40000"/>
<io_mem address="0x32e2f000" size="0x10"/>
<irq number="48"/>
<irq number="57"/>
</device>
<device name="sdhc2" type="fsl,imx8mq-usdhc">
<io_mem address="0x30b50000" size="0x10000"/>
<irq number="55"/>
<clock name="nand_usdhc_bus_clk_root"/>
<clock name="usdhc2_clk_root"/>
<clock name="usdhc2_gate"/>
</device>
<device name="fec" type="fsl,imx6sx-fec">
<io_mem address="0x30be0000" size="0x4000"/>
<irq number="152"/>
<irq number="151"/>
<irq number="150"/>
<property name="mii" value="rgmii-id"/>
</device>
<policy label="usb_drv -> " info="yes"> <device name="usb_host_2"/> </policy>
<policy label="fb_drv -> " info="yes">
<device name="dcss"/>
<device name="hdmi"/>
<device name="mipi_dsi"/>
<device name="src"/>
</policy>
<policy label="gpio_drv -> " info="yes">
<device name="gpio1"/>
<device name="gpio2"/>
<device name="gpio3"/>
<device name="gpio4"/>
<device name="gpio5"/>
</policy>
<policy label="touch_drv -> "> <device name="synaptics_dsx"/> </policy>
<policy label="sd_card_drv -> "> <device name="sdhc2"/> </policy>
<policy label="runtime -> nic" info="yes"> <device name="fec"/> </policy>
</config>
<route> <any-service> <parent/> </any-service> </route>
</start>
<start name="usb_drv" caps="200">
<binary name="imx8q_evk_usb_host_drv"/>
<resource name="RAM" quantum="16M"/>
<provides> <service name="Usb"/> </provides>
<config>
<report devices="yes"/>
<policy label_prefix="usb_hid_drv" class="0x3"/>
</config>
<route>
<service name="Platform"> <child name="platform_drv"/> </service>
<service name="Report" label="devices"> <child name="report_rom"/> </service>
<service name="Report" label="config"> <parent label="usb_active_config"/> </service>
<service name="ROM"> <parent/> </service>
<service name="PD"> <parent/> </service>
<service name="RM"> <parent/> </service>
<service name="CPU"> <parent/> </service>
<service name="LOG"> <parent/> </service>
<service name="Timer"> <parent/> </service>
</route>
</start>
<start name="usb_hid_drv" caps="140">
<resource name="RAM" quantum="11M"/>
<config use_report="yes" capslock_led="rom" numlock_led="rom"/>
<route>
<service name="ROM" label="report"> <child name="report_rom"/> </service>
<service name="ROM" label="capslock"> <parent label="capslock"/> </service>
<service name="ROM" label="numlock"> <parent label="numlock"/> </service>
<service name="ROM"> <parent/> </service>
<service name="PD"> <parent/> </service>
<service name="RM"> <parent/> </service>
<service name="CPU"> <parent/> </service>
<service name="LOG"> <parent/> </service>
<service name="Timer"> <parent/> </service>
<service name="Event"> <child name="event_filter" label="usb"/> </service>
<service name="Usb"> <child name="usb_drv"/> </service>
</route>
</start>
<start name="gpio_drv" caps="150">
<binary name="imx_gpio_drv"/>
<resource name="RAM" quantum="2M"/>
<provides><service name="Gpio"/></provides>
<config/>
<route>
<service name="RM"> <parent/> </service>
<service name="ROM"> <parent/> </service>
<service name="PD"> <parent/> </service>
<service name="CPU"> <parent/> </service>
<service name="LOG"> <parent/> </service>
<service name="Platform"> <child name="platform_drv"/> </service>
</route>
</start>
<start name="touch_drv" caps="150">
<binary name="imx8_synaptics_touch_drv"/>
<resource name="RAM" quantum="5M"/>
<provides><service name="Input"/></provides>
<route>
<service name="RM"> <parent/> </service>
<service name="ROM"> <parent/> </service>
<service name="PD"> <parent/> </service>
<service name="CPU"> <parent/> </service>
<service name="LOG"> <parent/> </service>
<service name="Timer"> <parent/> </service>
<service name="Event"> <child name="event_filter" label="touch"/> </service>
<service name="Platform"> <child name="platform_drv"/> </service>
<service name="Gpio"> <child name="gpio_drv"/> </service>
</route>
</start>
<start name="fb_drv" caps="250">
<binary name="imx8_fb_drv"/>
<resource name="RAM" quantum="40M"/>
<route>
<service name="ROM" label="config"> <parent label="fb_drv.config"/> </service>
<service name="RM"> <parent/> </service>
<service name="ROM"> <parent/> </service>
<service name="PD"> <parent/> </service>
<service name="CPU"> <parent/> </service>
<service name="LOG"> <parent/> </service>
<service name="Timer"> <parent/> </service>
<service name="Capture"> <parent/> </service>
<service name="Report"> <parent/> </service>
<service name="Platform"> <child name="platform_drv"/> </service>
</route>
</start>
<start name="sd_card_drv">
<binary name="imx8_sd_card_drv"/>
<resource name="RAM" quantum="16M"/>
<resource name="CPU" quantum="80"/>
<provides><service name="Block"/></provides>
<route>
<service name="ROM"> <parent/> </service>
<service name="PD"> <parent/> </service>
<service name="RM"> <parent/> </service>
<service name="CPU"> <parent/> </service>
<service name="LOG"> <parent/> </service>
<service name="Timer"> <parent/> </service>
<service name="Platform"> <child name="platform_drv"/> </service>
</route>
</start>
<!-- toggle key mappings depending on the numlock state -->
<start name="numlock_remap_rom">
<binary name="rom_filter"/>
<resource name="RAM" quantum="1M"/>
<provides> <service name="ROM"/> </provides>
<route>
<service name="ROM" label="config"> <parent label="numlock_remap.config"/> </service>
<service name="ROM" label="numlock"> <parent label="numlock"/> </service>
<any-service> <parent/> </any-service>
</route>
</start>
<start name="event_filter" caps="90">
<resource name="RAM" quantum="2M"/>
<provides> <service name="Event"/> </provides>
<route>
<service name="ROM" label="config"> <parent label="event_filter.config"/> </service>
<service name="ROM" label="numlock.remap"> <child name="numlock_remap_rom"/> </service>
<service name="ROM" label="capslock"> <parent label="capslock"/> </service>
<service name="ROM"> <parent/> </service>
<service name="PD"> <parent/> </service>
<service name="CPU"> <parent/> </service>
<service name="LOG"> <parent/> </service>
<service name="Timer"> <parent/> </service>
<service name="Event"> <parent/> </service>
</route>
</start>
</config>

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@ -1,34 +0,0 @@
<config>
<output>
<chargen>
<remap>
<!-- <key name="KEY_CAPSLOCK" to="KEY_ESC"/> -->
<key name="KEY_F11" to="KEY_RESTART"/>
<key name="KEY_F12" to="KEY_DASHBOARD"/>
<key name="KEY_LEFTMETA" to="KEY_SCREEN"/>
<include rom="numlock.remap"/>
<merge>
<input name="touch"/>
<input name="usb"/>
</merge>
</remap>
<mod1>
<key name="KEY_LEFTSHIFT"/> <key name="KEY_RIGHTSHIFT"/>
</mod1>
<mod2>
<key name="KEY_LEFTCTRL"/> <key name="KEY_RIGHTCTRL"/>
</mod2>
<mod3>
<key name="KEY_RIGHTALT"/> <!-- AltGr -->
</mod3>
<mod4>
<rom name="capslock"/>
</mod4>
<repeat delay_ms="230" rate_ms="40"/>
<include rom="en_us.chargen"/>
<include rom="special.chargen"/>
</chargen>
</output>
<policy label="touch" input="touch"/>
<policy label="usb" input="usb"/>
</config>

1
repos/gems/recipes/raw/drivers_managed-imx8q_evk/hash
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@ -1 +0,0 @@
2021-10-13 0fbdbd1d072347e8e1e6b9f169ed7a6264b05fac

25
repos/gems/recipes/raw/drivers_managed-imx8q_evk/numlock_remap.config
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@ -1,25 +0,0 @@
<config>
<input name="numlock_enabled" rom="numlock" node="numlock">
<attribute name="enabled" /> </input>
<output node="remap">
<if>
<has_value input="numlock_enabled" value="no"/>
<then>
<inline>
<key name="KEY_KP0" to="KEY_INSERT"/>
<key name="KEY_KP1" to="KEY_END"/>
<key name="KEY_KP2" to="KEY_DOWN"/>
<key name="KEY_KP3" to="KEY_PAGEDOWN"/>
<key name="KEY_KP4" to="KEY_LEFT"/>
<key name="KEY_KP5" to="KEY_RESERVED"/>
<key name="KEY_KP6" to="KEY_RIGHT"/>
<key name="KEY_KP7" to="KEY_HOME"/>
<key name="KEY_KP8" to="KEY_UP"/>
<key name="KEY_KP9" to="KEY_PAGEUP"/>
<key name="KEY_KPDOT" to="KEY_DELETE"/>
</inline>
</then>
</if>
</output>
</config>

16
repos/os/recipes/src/imx8q_evk_drivers/content.mk
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@ -1,16 +0,0 @@
include $(GENODE_DIR)/repos/base/recipes/src/content.inc
content: src/drivers include/gpio
include/gpio:
mkdir -p include
cp -r $(REP_DIR)/include/gpio $@
src/drivers:
mkdir -p $@/gpio/ $@/touch/ $@/sd_card
cp -r $(REP_DIR)/src/drivers/gpio/imx/ $@/gpio
cp -r $(REP_DIR)/src/drivers/touch/synaptics_dsx/ $@/touch
cp -r $(REP_DIR)/src/drivers/sd_card/imx/ $@/sd_card/
cp -r $(REP_DIR)/src/drivers/sd_card/imx6/ $@/sd_card/
cp -r $(REP_DIR)/src/drivers/sd_card/imx8/ $@/sd_card/
cp $(REP_DIR)/src/drivers/sd_card/*.* $@/sd_card/

1
repos/os/recipes/src/imx8q_evk_drivers/hash
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@ -1 +0,0 @@
2021-10-13 977612244ac10735bdbd6cbf7d8a2c373a73b4d6

7
repos/os/recipes/src/imx8q_evk_drivers/used_apis
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@ -1,7 +0,0 @@
base
os
event_session
platform_session
gpio_session
block_session

14
repos/os/run/sd_card_bench.run
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@ -8,7 +8,6 @@ if {[get_cmd_switch --autopilot] && [have_board riscv_qemu]} {
proc buffer_size_kib {} {
if {[have_board pbxa9]} { return [expr 12 * 1024] }
if {[have_board imx8q_evk]} { return [expr 1024] }
if {[have_board imx6q_sabrelite]} { return [expr 1024] }
if {[have_board imx53_qsb]} { return [expr 1024] }
if {[have_board imx53_qsb_tz]} { return [expr 1024] }
@ -19,7 +18,6 @@ proc buffer_size_kib {} {
proc sd_card_drv {} {
if {[have_board pbxa9]} { return pl180_sd_card_drv }
if {[have_board imx8q_evk]} { return imx8_sd_card_drv }
if {[have_board imx6q_sabrelite]} { return imx6_sd_card_drv }
if {[have_board imx53_qsb]} { return imx53_sd_card_drv }
if {[have_board imx53_qsb_tz]} { return imx53_sd_card_drv }
@ -29,7 +27,6 @@ proc sd_card_drv {} {
}
proc platform_drv {} {
if {[have_board imx8q_evk]} { return imx8mq_platform_drv }
return platform_drv
}
@ -41,17 +38,6 @@ proc device {} {
</device>
}
}
if {[have_board imx8q_evk]} {
return {
<device name="card" type="fsl,imx8mq-usdhc">
<io_mem address="0x30b50000" size="0x10000"/>
<irq number="55"/>
<clock name="nand_usdhc_bus_clk_root"/>
<clock name="usdhc2_clk_root"/>
<clock name="usdhc2_gate"/>
</device>
}
}
if {[have_board imx6q_sabrelite]} {
return {
<device name="card" type="fsl,imx6q-usdhc">

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repos/os/src/drivers/platform/imx8mq/ccm.cc
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@ -1,465 +0,0 @@
/*
* \brief Central clock module for i.MX8MQ
* \author Stefan Kalkowski
* \date 2020-06-12
*/
/*
* Copyright (C) 2020 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU Affero General Public License version 3.
*/
#include <ccm.h>
/******************************
** Frac_pll immplementation **
******************************/
void Driver::Ccm::Frac_pll::disable()
{
write<Config_reg_0::Power_down>(1);
}
void Driver::Ccm::Frac_pll::enable()
{
if (!read<Config_reg_0::Power_down>()) return;
write<Config_reg_0::Power_down>(0);
for (unsigned i = 0; i < 0xfffff; i++) {
if (read<Config_reg_0::Lock_status>()) { break; }
}
}
Driver::Clock & Driver::Ccm::Frac_pll::_parent() const
{
Name pname;
switch (read<Config_reg_0::Ref_sel>()) {
case Config_reg_0::Ref_sel::REF_CLK_25M: pname = "25m_ref_clk"; break;
case Config_reg_0::Ref_sel::REF_CLK_27M: pname = "27m_ref_clk"; break;
case Config_reg_0::Ref_sel::HDMI_PHY_27M: pname = "hdmi_phy_27m_clk"; break;
case Config_reg_0::Ref_sel::CLK_P_N: pname = "no_clk"; break;
};
return static_cast<Clock_tree_element*>(_tree.first()->find_by_name(pname.string()))->object();
};
void Driver::Ccm::Frac_pll::set_parent(Name parent)
{
if (parent == "25m_ref_clk") {
write<Config_reg_0::Ref_sel>(Config_reg_0::Ref_sel::REF_CLK_25M);
return;
}
if (parent == "27m_ref_clk") {
write<Config_reg_0::Ref_sel>(Config_reg_0::Ref_sel::REF_CLK_27M);
return;
}
if (parent == "hdmi_phy_27m_clk") {
write<Config_reg_0::Ref_sel>(Config_reg_0::Ref_sel::HDMI_PHY_27M);
return;
}
write<Config_reg_0::Ref_sel>(Config_reg_0::Ref_sel::CLK_P_N);
}
void Driver::Ccm::Frac_pll::set_rate(unsigned long rate)
{
static constexpr uint32_t fixed_frac = 1 << 24;
/* we set output div value to fixed value of 2 */
uint64_t r = rate * 2;
uint64_t pr = _parent().get_rate() * 8 /
(read<Config_reg_0::Refclk_div_value>() + 1);
uint32_t div_int = (uint32_t)((r / pr) & 0b1111111);
uint32_t div_frac = (uint32_t)(((r - div_int * pr) * fixed_frac) / pr);
Config_reg_1::access_t v = 0;
Config_reg_1::Int_div_ctl::set(v, div_int-1);
Config_reg_1::Frac_div_ctl::set(v, div_frac);
write<Config_reg_1>(v);
//write<Config_reg_0::Refclk_div_value>(0);
write<Config_reg_0::Output_div_value>(0);
write<Config_reg_0::Newdiv_val>(1);
/* wait for ack, if powered and not bypassed */
if (!(read<Config_reg_0::Bypass>() ||
read<Config_reg_0::Power_down>())) {
for (unsigned i = 0; i < 0xfffff; i++) {
if (read<Config_reg_0::Newdiv_ack>()) { break; }
}
}
write<Config_reg_0::Newdiv_val>(0);
}
unsigned long Driver::Ccm::Frac_pll::get_rate() const
{
static constexpr uint32_t fixed_frac = 1 << 24;
/**
* Formula from the reference manual:
* PLLOUT = REF / DIVR_VAL * 8 * DIVF_VAL / DIVQ_VAL
* DIVF_VAL = 1 + DIVFI + (DIVFF/2^24)
*/
uint32_t divq = (read<Config_reg_0::Output_div_value>() + 1) * 2;
uint32_t divr = read<Config_reg_0::Refclk_div_value>() + 1;
uint32_t divff = read<Config_reg_1::Frac_div_ctl>();
uint32_t divfi = read<Config_reg_1::Int_div_ctl>();
uint64_t ref = _parent().get_rate() * 8 / divr;
return (ref * (divfi + 1) / divq) +
(ref * divff / fixed_frac / divq);
}
Driver::Ccm::Frac_pll::Frac_pll(Name name, addr_t const base, Clock_tree & tree)
: Clock(name, tree), Mmio(base), _tree(tree)
{
write<Config_reg_0::Bypass>(0);
write<Config_reg_0::Out_enable>(1);
}
/******************************
** Sccg_pll immplementation **
******************************/
Driver::Clock & Driver::Ccm::Sccg_pll::_parent() const
{
Name pname;
switch (read<Config_reg_0::Ref_sel>()) {
case Config_reg_0::Ref_sel::REF_CLK_25M: pname = "25m_ref_clk"; break;
case Config_reg_0::Ref_sel::REF_CLK_27M: pname = "27m_ref_clk"; break;
case Config_reg_0::Ref_sel::HDMI_PHY_27M: pname = "hdmi_phy_27m_clk"; break;
case Config_reg_0::Ref_sel::CLK_P_N: pname = "no_clk"; break;
};
return static_cast<Clock_tree_element*>(_tree.first()->find_by_name(pname.string()))->object();
};
void Driver::Ccm::Sccg_pll::set_parent(Name parent)
{
if (parent == "25m_ref_clk") {
write<Config_reg_0::Ref_sel>(Config_reg_0::Ref_sel::REF_CLK_25M);
return;
}
if (parent == "27m_ref_clk") {
write<Config_reg_0::Ref_sel>(Config_reg_0::Ref_sel::REF_CLK_27M);
return;
}
if (parent == "hdmi_phy_27m_clk") {
write<Config_reg_0::Ref_sel>(Config_reg_0::Ref_sel::HDMI_PHY_27M);
return;
}
write<Config_reg_0::Ref_sel>(Config_reg_0::Ref_sel::CLK_P_N);
}
void Driver::Ccm::Sccg_pll::set_rate(unsigned long)
{
Genode::error(__func__," not implemented yet!");
}
unsigned long Driver::Ccm::Sccg_pll::get_rate() const
{
unsigned factor = read<Config_reg_1::Sse>() ? 8 : 2;
unsigned divf1 = read<Config_reg_2::Feedback_divf1>() + 1;
unsigned divf2 = read<Config_reg_2::Feedback_divf2>() + 1;
unsigned divr1 = read<Config_reg_2::Ref_divr1>() + 1;
unsigned divr2 = read<Config_reg_2::Ref_divr2>() + 1;
unsigned divq = read<Config_reg_2::Output_div_val>() + 1;
unsigned long parent_rate = _parent().get_rate();
if (read<Config_reg_0::Bypass2>()) {
return parent_rate;
}
if (read<Config_reg_0::Bypass1>()) {
return (parent_rate * divf2) / (divr2 * divq);
}
return parent_rate * factor * divf1 * divf2 / (divr1*divr2*divq);
}
void Driver::Ccm::Sccg_pll::enable()
{
if (!read<Config_reg_0::Power_down>()) return;
write<Config_reg_0::Power_down>(0);
for (unsigned i = 0; i < 0xfffff; i++) {
if (read<Config_reg_0::Lock_status>()) { break; }
}
}
void Driver::Ccm::Sccg_pll::disable()
{
write<Config_reg_0::Power_down>(1);
}
/********************************
** Root_clock immplementation **
********************************/
void Driver::Ccm::Root_clock::set_rate(unsigned long rate)
{
uint32_t pre_div = 0;
uint32_t post_div = 0;
int deviation = (int)(~0U >> 1);
unsigned long parent_rate =
_ref_clks[read<Target_reg::Ref_sel>()].ref.get_rate();
for (unsigned pre = 0; pre < (1<<3); pre++) {
for (unsigned post = 0; post < (1<<6); post++) {
int diff = (parent_rate / (pre+1)) / (post+1) - rate;
if (abs(diff) < abs(deviation)) {
pre_div = pre;
post_div = post;
deviation = diff;
}
}
}
write<Target_reg::Pre_div>(pre_div);
write<Target_reg::Post_div>(post_div);
};
void Driver::Ccm::Root_clock::set_parent(Name name)
{
for (unsigned i = 0; i < REF_CLK_MAX; i++) {
if (_ref_clks[i].ref.name() == name) {
/**
* enable parent before setting it,
* otherwise the system stalls
*/
_ref_clks[i].ref.enable();
write<Target_reg::Ref_sel>(i);
return;
}
}
warning("Reference clock ", name, " cannot be set");
}
unsigned long Driver::Ccm::Root_clock::get_rate() const
{
unsigned long parent_rate =
_ref_clks[read<Target_reg::Ref_sel>()].ref.get_rate();
unsigned pre = read<Target_reg::Pre_div>()+1;
unsigned post = read<Target_reg::Post_div>()+1;
return parent_rate / pre / post;
}
void Driver::Ccm::Root_clock::enable()
{
/* enable the parent clock */
_ref_clks[read<Target_reg::Ref_sel>()].ref.enable();
write<Target_reg::Enable>(1);
}
void Driver::Ccm::Root_clock::disable()
{
/*
* the parent clock cannot be disabled implictly,
* because it can be used by several root clocks,
* we need reference-counting first to implement this.
*/
write<Target_reg::Enable>(0);
}
/**************************
** Gate immplementation **
**************************/
void Driver::Ccm::Root_clock_divider::set_rate(unsigned long rate)
{
unsigned long div = _parent.get_rate() / rate;
if (!div || div > 64) {
Genode::error("Cannot set divider ", name(), " to ", div);
return;
}
write<Target_reg::Post_div>(div-1);
}
unsigned long Driver::Ccm::Root_clock_divider::get_rate() const
{
return _parent.get_rate() / (read<Target_reg::Post_div>()+1);
};
/**************************
** Gate immplementation **
**************************/
void Driver::Ccm::Gate::enable()
{
/* enable the parent clock implictly */
_parent.enable();
write<Ccgr>(0x3);
}
void Driver::Ccm::Gate::disable()
{
/* disable the parent clock implictly */
_parent.disable();
write<Ccgr>(0x0);
}
/*******************
** CCM interface **
*******************/
Driver::Ccm::Ccm(Genode::Env & env) : env(env)
{
//FIXME: add beyond initialization code,
// when all drivers use the new platform driver
// Until now, the disabling of certain clocks will harm
// drivers not claiming it resources from here
#if 0
video_pll1_clk.enable();
/* set VIDEO PLL */
video_pll1_clk.set_parent(m27_ref_clk.name());
video_pll1_clk.set_rate(593999999);
audio_pll1_clk.disable();
audio_pll2_clk.disable();
video_pll1_clk.disable();
gpu_pll_clk.disable();
vpu_pll_clk.disable();
system_pll3_clk.disable();
video_pll2_clk.disable();
usb_ctrl1_gate.disable();
usb_ctrl2_gate.disable();
usb_phy1_gate.disable();
usb_phy2_gate.disable();
/* turn off all unnecessary root clocks */
arm_m4_clk_root.disable();
vpu_a53_clk_root.disable();
gpu_core_clk_root.disable();
gpu_shader_clk_root.disable();
enet_axi_clk_root.disable();
nand_usdhc_bus_clk_root.disable();
vpu_bus_clk_root.disable();
display_axi_clk_root.disable();
display_apb_clk_root.disable();
display_rtrm_clk_root.disable();
usb_bus_clk_root.disable();
gpu_axi_clk_root.disable();
gpu_ahb_clk_root.disable();
audio_ahb_clk_root.disable();
mipi_dsi_esc_rx_clk_root.disable();
vpu_g1_clk_root.disable();
vpu_g2_clk_root.disable();
display_dtrc_clk_root.disable();
display_dc8000_clk_root.disable();
pcie1_ctrl_clk_root.disable();
pcie1_phy_clk_root.disable();
pcie1_aux_clk_root.disable();
dc_pixel_clk_root.disable();
lcdif_pixel_clk_root.disable();
sai1_clk_root.disable();
sai2_clk_root.disable();
sai3_clk_root.disable();
sai4_clk_root.disable();
sai5_clk_root.disable();
sai6_clk_root.disable();
spdif1_clk_root.disable();
spdif2_clk_root.disable();
enet_ref_clk_root.disable();
enet_timer_clk_root.disable();
enet_phy_ref_clk_root.disable();
nand_clk_root.disable();
qspi_clk_root.disable();
usdhc1_clk_root.disable();
usdhc2_clk_root.disable();
i2c1_clk_root.disable();
i2c2_clk_root.disable();
i2c3_clk_root.disable();
i2c4_clk_root.disable();
uart2_clk_root.disable();
uart3_clk_root.disable();
uart4_clk_root.disable();
usb_core_ref_clk_root.disable();
usb_phy_ref_clk_root.disable();
ecspi1_clk_root.disable();
ecspi2_clk_root.disable();
pwm1_clk_root.disable();
pwm2_clk_root.disable();
pwm3_clk_root.disable();
pwm4_clk_root.disable();
gpt1_clk_root.disable();
gpt2_clk_root.disable();
gpt3_clk_root.disable();
gpt4_clk_root.disable();
gpt5_clk_root.disable();
gpt6_clk_root.disable();
trace_clk_root.disable();
wdog_clk_root.disable();
wrclk_clk_root.disable();
ipp_do_clko1clk_root.disable();
ipp_do_clko2_clk_root.disable();
mipi_dsi_core_clk_root.disable();
mipi_dsi_phy_ref_clk_root.disable();
mipi_dsi_dbi_clk_root.disable();
old_mipi_dsi_esc_clk_root.disable();
mipi_csi1_core_clk_root.disable();
mipi_csi1_phy_ref_clk_root.disable();
mipi_csi1_esc_clk_root.disable();
mipi_csi2_core_clk_root.disable();
mipi_csi2_phy_ref_clk_root.disable();
mipi_csi2_esc_clk_root.disable();
pcie2_ctrl_clk_root.disable();
pcie2_phy_clk_root.disable();
pcie2_aux_clk_root.disable();
ecspi3_clk_root.disable();
old_mipi_dsi_esc_rx_clk_root.disable();
display_hdmi_clk_root.disable();
/* set certain reference clocks */
ahb_clk_root.set_parent("system_pll1_div6");
nand_usdhc_bus_clk_root.set_parent("system_pll1_div3");
audio_ahb_clk_root.set_parent("system_pll2_div2");
pcie1_ctrl_clk_root.set_parent("system_pll2_div5");
pcie1_phy_clk_root.set_parent("system_pll2_div10");
pcie2_ctrl_clk_root.set_parent("system_pll2_div5");
pcie2_phy_clk_root.set_parent("system_pll2_div10");
mipi_csi1_core_clk_root.set_parent("system_pll1_div3");
mipi_csi1_phy_ref_clk_root.set_parent("system_pll2_clk");
mipi_csi1_esc_clk_root.set_parent("system_pll1_clk");
mipi_csi2_core_clk_root.set_parent("system_pll1_div3");
mipi_csi2_phy_ref_clk_root.set_parent("system_pll2_clk");
mipi_csi2_esc_clk_root.set_parent("system_pll1_clk");
/* increase NOC clock for better DDR performance */
noc_clk_root.set_parent("system_pll1_clk");
noc_clk_root.set_rate(800000000);
#endif
}

423
repos/os/src/drivers/platform/imx8mq/ccm.h
View File

@ -1,423 +0,0 @@
/*
* \brief Central clock module for i.MX8MQ
* \author Stefan Kalkowski
* \date 2020-06-12
*/
/*
* Copyright (C) 2020 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU Affero General Public License version 3.
*/
#pragma once
#include <os/attached_mmio.h>
#include <clock.h>
namespace Driver {
using namespace Genode;
struct Ccm;
};
struct Driver::Ccm
{
class Frac_pll : public Driver::Clock, Mmio
{
struct Config_reg_0 : Register<0x0, 32>
{
struct Output_div_value : Bitfield<0, 5> {};
struct Refclk_div_value : Bitfield<5, 6> {};
struct Newdiv_ack : Bitfield<11,1> {};
struct Newdiv_val : Bitfield<12,1> {};
struct Bypass : Bitfield<14,1> {};
struct Ref_sel : Bitfield<16,2>
{
enum Ref_clk {
REF_CLK_25M, REF_CLK_27M, HDMI_PHY_27M, CLK_P_N };
};
struct Power_down : Bitfield<19,1> {};
struct Out_enable : Bitfield<21,1> {};
struct Lock_status : Bitfield<31,1> {};
};
struct Config_reg_1 : Register<0x4, 32>
{
struct Int_div_ctl : Bitfield<0, 7> {};
struct Frac_div_ctl : Bitfield<7, 24> {};
};
Clock_tree & _tree;
Clock & _parent() const;
public:
Frac_pll(Name name,
addr_t const base,
Clock_tree & tree);
void set_parent(Name name) override;
void set_rate(unsigned long) override;
unsigned long get_rate() const override;
void enable() override;
void disable() override;
};
class Sccg_pll : public Driver::Clock, Mmio
{
struct Config_reg_0 : Register<0x0, 32>
{
struct Ref_sel : Bitfield<0,2> {
enum Ref_clk {
REF_CLK_25M, REF_CLK_27M, HDMI_PHY_27M, CLK_P_N };
};
struct Bypass2 : Bitfield<4, 1> {};
struct Bypass1 : Bitfield<5, 1> {};
struct Power_down : Bitfield<7, 1> {};
struct Out_enable : Bitfield<25,1> {};
struct Lock_status : Bitfield<31,1> {};
};
struct Config_reg_1 : Register<0x4, 32>
{
struct Sse : Bitfield<0,1> {};
};
struct Config_reg_2 : Register<0x8, 32>
{
struct Output_div_val : Bitfield<1, 6> {};
struct Feedback_divf2 : Bitfield<7, 6> {};
struct Feedback_divf1 : Bitfield<13,6> {};
struct Ref_divr2 : Bitfield<19,6> {};
struct Ref_divr1 : Bitfield<25,3> {};
};
Clock_tree & _tree;
Clock & _parent() const;
public:
Sccg_pll(Name name,
addr_t const base,
Clock_tree & tree)
: Clock(name, tree), Mmio(base), _tree(tree) {}
void set_parent(Name name) override;
void set_rate(unsigned long) override;
unsigned long get_rate() const override;
void enable() override;
void disable() override;
};
class Root_clock : public Clock, Mmio
{
struct Target_reg : Register<0x0, 32>
{
struct Post_div : Bitfield<0,6> {};
struct Pre_div : Bitfield<16,3> {};
struct Ref_sel : Bitfield<24,3> {};
struct Enable : Bitfield<28,1> {};
};
struct Clock_ref {
Clock & ref;
Clock_ref(Clock & c) : ref(c) {}
};
enum { REF_CLK_MAX = 8 };
Clock_tree & _tree;
Clock_ref _ref_clks[REF_CLK_MAX];
Clock & _parent() const;
public:
Root_clock(Name name,
addr_t const base,
Clock & ref_clk0,
Clock & ref_clk1,
Clock & ref_clk2,
Clock & ref_clk3,
Clock & ref_clk4,
Clock & ref_clk5,
Clock & ref_clk6,
Clock & ref_clk7,
Clock_tree & tree)
: Clock(name, tree), Mmio(base), _tree(tree),
_ref_clks { ref_clk0, ref_clk1, ref_clk2, ref_clk3,
ref_clk4, ref_clk5, ref_clk6, ref_clk7 }{}
void set_parent(Name name) override;
void set_rate(unsigned long) override;
unsigned long get_rate() const override;
void enable() override;
void disable() override;
};
class Root_clock_divider : public Clock, Mmio
{
struct Target_reg : Register<0x0, 32>
{
struct Post_div : Bitfield<0,6> {};
};
Clock & _parent;
public:
Root_clock_divider(Name name,
addr_t const base,
Clock & parent,
Clock_tree & tree)
: Clock(name, tree), Mmio(base),
_parent(parent) {}
void set_rate(unsigned long) override;
unsigned long get_rate() const override;
};
class Gate : public Clock, Mmio
{
struct Ccgr : Register<0x0, 32> { };
Clock & _parent;
public:
Gate(Name name,
addr_t const base,
Clock & parent,
Clock_tree & tree)
: Clock(name, tree), Mmio(base), _parent(parent) {}
void set_rate(unsigned long) override {}
unsigned long get_rate() const override {
return _parent.get_rate(); }
void enable() override;
void disable() override;
};
enum {
CCM_MMIO_BASE = 0x30380000,
CCM_MMIO_SIZE = 0x10000,
CCM_ANALOG_MMIO_BASE = 0x30360000,
CCM_ANALOG_MMIO_SIZE = 0x10000,
};
Ccm(Genode::Env & env);
Genode::Env & env;
Attached_mmio ccm_regs { env, CCM_MMIO_BASE, CCM_MMIO_SIZE };
Attached_mmio ccm_analog_regs { env, CCM_ANALOG_MMIO_BASE, CCM_ANALOG_MMIO_SIZE };
Clock::Clock_tree tree { };
addr_t frac_pll_base(unsigned pll) {
return (addr_t)ccm_analog_regs.local_addr<const void>() + pll*0x8; }
addr_t sccg_pll_base(unsigned pll) {
return (addr_t)ccm_analog_regs.local_addr<const void>() + 0x30 + pll*0xc; }
addr_t gate_base(unsigned nr) {
return (addr_t)ccm_regs.local_addr<const void>() + 0x4000 + nr*0x10; }
addr_t root_base(unsigned nr) {
return (addr_t)ccm_regs.local_addr<const void>() + 0x8000 + nr*0x80; }
Fixed_clock no_clk { "no_clk", 0, tree };
Fixed_clock k32_ref_clk { "32k_ref_clk", 32 * 1000, tree };
Fixed_clock m25_ref_clk { "25m_ref_clk", 25 * 1000 * 1000, tree };
Fixed_clock m27_ref_clk { "27m_ref_clk", 27 * 1000 * 1000, tree };
Fixed_clock hdmi_phy_m27_clk { "hdmi_phy_27m_clk", 27 * 1000 * 1000, tree };
Fixed_clock ext_clk_1 { "ext_clk_1", 133 * 1000 * 1000, tree };
Fixed_clock ext_clk_2 { "ext_clk_2", 133 * 1000 * 1000, tree };
Fixed_clock ext_clk_3 { "ext_clk_3", 133 * 1000 * 1000, tree };
Fixed_clock ext_clk_4 { "ext_clk_4", 133 * 1000 * 1000, tree };
Frac_pll audio_pll1_clk { "audio_pll1_clk", frac_pll_base(0), tree };
Frac_pll audio_pll2_clk { "audio_pll2_clk", frac_pll_base(1), tree };
Frac_pll video_pll1_clk { "video_pll1_clk", frac_pll_base(2), tree };
Frac_pll gpu_pll_clk { "gpu_pll_clk", frac_pll_base(3), tree };
Frac_pll vpu_pll_clk { "vpu_pll_clk", frac_pll_base(4), tree };
Frac_pll arm_pll_clk { "arm_pll_clk", frac_pll_base(5), tree };
Sccg_pll system_pll1_clk { "system_pll1_clk", sccg_pll_base(0), tree };
Sccg_pll system_pll2_clk { "system_pll2_clk", sccg_pll_base(1), tree };
Sccg_pll system_pll3_clk { "system_pll3_clk", sccg_pll_base(2), tree };
Sccg_pll video_pll2_clk { "video2_pll2_clk", sccg_pll_base(3), tree };
Sccg_pll dram_pll_clk { "dram_pll_clk", sccg_pll_base(4), tree };
Fixed_divider system_pll1_div20 { "system_pll1_div20", system_pll1_clk, 20, tree };
Fixed_divider system_pll1_div10 { "system_pll1_div10", system_pll1_clk, 10, tree };
Fixed_divider system_pll1_div8 { "system_pll1_div8", system_pll1_clk, 8, tree };
Fixed_divider system_pll1_div6 { "system_pll1_div6", system_pll1_clk, 6, tree };
Fixed_divider system_pll1_div5 { "system_pll1_div5", system_pll1_clk, 5, tree };
Fixed_divider system_pll1_div4 { "system_pll1_div4", system_pll1_clk, 4, tree };
Fixed_divider system_pll1_div3 { "system_pll1_div3", system_pll1_clk, 3, tree };
Fixed_divider system_pll1_div2 { "system_pll1_div2", system_pll1_clk, 2, tree };
Fixed_divider system_pll2_div20 { "system_pll2_div20", system_pll2_clk, 20, tree };
Fixed_divider system_pll2_div10 { "system_pll2_div10", system_pll2_clk, 10, tree };
Fixed_divider system_pll2_div8 { "system_pll2_div8", system_pll2_clk, 8, tree };
Fixed_divider system_pll2_div6 { "system_pll2_div6", system_pll2_clk, 6, tree };
Fixed_divider system_pll2_div5 { "system_pll2_div5", system_pll2_clk, 5, tree };
Fixed_divider system_pll2_div4 { "system_pll2_div4", system_pll2_clk, 4, tree };
Fixed_divider system_pll2_div3 { "system_pll2_div3", system_pll2_clk, 3, tree };
Fixed_divider system_pll2_div2 { "system_pll2_div2", system_pll2_clk, 2, tree };
Root_clock arm_a53_clk_root { "arm_a53_clk_root", root_base(0), m25_ref_clk, arm_pll_clk, system_pll2_div2, system_pll2_clk, system_pll1_clk, system_pll1_div2, audio_pll1_clk, system_pll3_clk, tree };
Root_clock arm_m4_clk_root { "arm_m4_clk_root", root_base(1), m25_ref_clk, system_pll2_div5, system_pll2_div4, system_pll1_div3, system_pll1_clk, audio_pll1_clk, video_pll1_clk, system_pll3_clk, tree };
Root_clock vpu_a53_clk_root { "vpu_a53_clk_root", root_base(2), m25_ref_clk, arm_pll_clk, system_pll2_div2, system_pll2_clk, system_pll1_clk, system_pll1_div2, audio_pll1_clk, vpu_pll_clk, tree };
Root_clock gpu_core_clk_root { "gpu_core_clk_root", root_base(3), m25_ref_clk, gpu_pll_clk, system_pll1_clk, system_pll3_clk, system_pll2_clk, audio_pll1_clk, video_pll1_clk, audio_pll2_clk, tree };
Root_clock gpu_shader_clk_root { "gpu_shader_clk", root_base(4), m25_ref_clk, gpu_pll_clk, system_pll1_clk, system_pll3_clk, system_pll2_clk, audio_pll1_clk, video_pll1_clk, audio_pll2_clk, tree };
Root_clock main_axi_clk_root { "main_axi_clk_root", root_base(16), m25_ref_clk, system_pll2_div3, system_pll1_clk, system_pll2_div4, system_pll2_clk, audio_pll1_clk, video_pll1_clk, system_pll1_div8, tree };
Root_clock enet_axi_clk_root { "enet_axi_clk_root", root_base(17), m25_ref_clk, system_pll1_div3, system_pll1_clk, system_pll2_div4, system_pll2_div5, audio_pll1_clk, video_pll1_clk, system_pll3_clk, tree };
Root_clock nand_usdhc_bus_clk_root { "nand_usdhc_bus_clk_root", root_base(18), m25_ref_clk, system_pll1_div3, system_pll1_clk, system_pll2_div5, system_pll1_div6, system_pll3_clk, system_pll2_div4, audio_pll1_clk, tree };
Root_clock vpu_bus_clk_root { "vpu_bus_clk_root", root_base(19), m25_ref_clk, system_pll1_clk, vpu_pll_clk, audio_pll2_clk, system_pll3_clk, system_pll2_clk, system_pll2_div5, system_pll1_div8, tree };
Root_clock display_axi_clk_root { "display_axi_clk_root", root_base(20), m25_ref_clk, system_pll2_div8, system_pll1_clk, system_pll3_clk, system_pll1_div20, audio_pll2_clk, ext_clk_1, ext_clk_4, tree };
Root_clock display_apb_clk_root { "display_apb_clk_root", root_base(21), m25_ref_clk, system_pll2_div8, system_pll1_clk, system_pll3_clk, system_pll1_div20, audio_pll2_clk, ext_clk_1, ext_clk_3, tree };
Root_clock display_rtrm_clk_root { "display_rtrm_clk_root", root_base(22), m25_ref_clk, system_pll1_clk, system_pll2_div5, system_pll1_div2, audio_pll1_clk, video_pll1_clk, ext_clk_2, ext_clk_3, tree };
Root_clock usb_bus_clk_root { "usb_bus_clk_root", root_base(23), m25_ref_clk, system_pll2_div2, system_pll1_clk, system_pll2_div10, system_pll2_div5, ext_clk_2, ext_clk_4, audio_pll2_clk, tree };
Root_clock gpu_axi_clk_root { "gpu_axi_clk_root", root_base(24), m25_ref_clk, system_pll1_clk, gpu_pll_clk, system_pll3_clk, system_pll2_clk, audio_pll1_clk, video_pll1_clk, audio_pll2_clk, tree };
Root_clock gpu_ahb_clk_root { "gpu_ahb_clk_root", root_base(25), m25_ref_clk, system_pll1_clk, gpu_pll_clk, system_pll3_clk, system_pll2_clk, audio_pll1_clk, video_pll1_clk, audio_pll2_clk, tree };
Root_clock noc_clk_root { "noc_clk_root", root_base(26), m25_ref_clk, system_pll1_clk, system_pll3_clk, system_pll2_clk, system_pll2_div2, audio_pll1_clk, video_pll1_clk, audio_pll2_clk, tree };
Root_clock noc_apb_clk_root { "noc_apb_clk_root", root_base(27), m25_ref_clk, system_pll1_div2, system_pll3_clk, system_pll2_div3, system_pll2_div5, system_pll1_clk, audio_pll1_clk, video_pll1_clk, tree };
Root_clock ahb_clk_root { "ahb_clk_root", root_base(32), m25_ref_clk, system_pll1_div6, system_pll1_clk, system_pll1_div2, system_pll2_div8, system_pll3_clk, audio_pll1_clk, video_pll1_clk, tree };
Root_clock audio_ahb_clk_root { "audio_ahb_clk_root", root_base(34), m25_ref_clk, system_pll2_div2, system_pll1_clk, system_pll2_clk, system_pll2_div6, system_pll3_clk, audio_pll1_clk, video_pll1_clk, tree };
Root_clock mipi_dsi_esc_rx_clk_root { "mipi_dsi_esc_rx_clk_root", root_base(36), m25_ref_clk, system_pll2_div10, system_pll1_div10, system_pll1_clk, system_pll2_clk, system_pll3_clk, ext_clk_3, audio_pll2_clk, tree };
Root_clock dram_alt_clk_root { "dram_alt_clk_root", root_base(64), m25_ref_clk, system_pll1_clk, system_pll1_div8, system_pll2_div2, system_pll2_div4, system_pll1_div2, audio_pll1_clk, system_pll1_div3, tree };
Root_clock dram_apb_clk_root { "dram_apb_clk_root", root_base(65), m25_ref_clk, system_pll2_div5, system_pll1_div20, system_pll1_div5, system_pll1_clk, system_pll3_clk, system_pll2_div4, audio_pll2_clk, tree };
Root_clock vpu_g1_clk_root { "vpu_g1_clk_root", root_base(66), m25_ref_clk, vpu_pll_clk, system_pll1_clk, system_pll2_clk, system_pll1_div8, system_pll2_div8, system_pll3_clk, audio_pll1_clk, tree };
Root_clock vpu_g2_clk_root { "vpu_g2_clk_root", root_base(67), m25_ref_clk, vpu_pll_clk, system_pll1_clk, system_pll2_clk, system_pll1_div8, system_pll2_div8, system_pll3_clk, audio_pll1_clk, tree };
Root_clock display_dtrc_clk_root { "display_dtrc_clk_root", root_base(68), m25_ref_clk, video_pll2_clk, system_pll1_clk, system_pll2_clk, system_pll1_div5, video_pll1_clk, system_pll3_clk, audio_pll2_clk, tree };
Root_clock display_dc8000_clk_root { "display_dc8000_clk_root", root_base(69), m25_ref_clk, video_pll2_clk, system_pll1_clk, system_pll2_clk, system_pll1_div5, video_pll1_clk, system_pll3_clk, audio_pll2_clk, tree };
Root_clock pcie1_ctrl_clk_root { "pcie1_ctrl_clk_root", root_base(70), m25_ref_clk, system_pll2_div4, system_pll2_div5, system_pll1_div3, system_pll1_clk, system_pll2_div2, system_pll2_div3, system_pll3_clk, tree };
Root_clock pcie1_phy_clk_root { "pcie1_phy_clk_root", root_base(71), m25_ref_clk, system_pll2_div10, system_pll2_div2, ext_clk_1, ext_clk_2, ext_clk_3, ext_clk_4, system_pll1_div2, tree };
Root_clock pcie1_aux_clk_root { "pcie1_aux_clk_root", root_base(72), m25_ref_clk, system_pll2_div5, system_pll2_div20, system_pll3_clk, system_pll2_div10, system_pll1_div10, system_pll1_div5, system_pll1_div4, tree };
Root_clock dc_pixel_clk_root { "dc_pixel_clk_root", root_base(73), m25_ref_clk, video_pll1_clk, audio_pll2_clk, audio_pll1_clk, system_pll1_clk, system_pll2_clk, system_pll3_clk, ext_clk_4, tree };
Root_clock lcdif_pixel_clk_root { "lcdif_pixel_clk_root", root_base(74), m25_ref_clk, video_pll1_clk, audio_pll2_clk, audio_pll1_clk, system_pll1_clk, system_pll2_clk, system_pll3_clk, ext_clk_4, tree };
Root_clock sai1_clk_root { "sai1_clk_root", root_base(75), m25_ref_clk, audio_pll1_clk, audio_pll2_clk, video_pll1_clk, system_pll1_div6, m27_ref_clk, ext_clk_1, ext_clk_2, tree };
Root_clock sai2_clk_root { "sai2_clk_root", root_base(76), m25_ref_clk, audio_pll1_clk, audio_pll2_clk, video_pll1_clk, system_pll1_div6, m27_ref_clk, ext_clk_2, ext_clk_3, tree };
Root_clock sai3_clk_root { "sai3_clk_root", root_base(77), m25_ref_clk, audio_pll1_clk, audio_pll2_clk, video_pll1_clk, system_pll1_div6, m27_ref_clk, ext_clk_3, ext_clk_4, tree };
Root_clock sai4_clk_root { "sai4_clk_root", root_base(78), m25_ref_clk, audio_pll1_clk, audio_pll2_clk, video_pll1_clk, system_pll1_div6, m27_ref_clk, ext_clk_1, ext_clk_2, tree };
Root_clock sai5_clk_root { "sai5_clk_root", root_base(79), m25_ref_clk, audio_pll1_clk, audio_pll2_clk, video_pll1_clk, system_pll1_div6, m27_ref_clk, ext_clk_2, ext_clk_3, tree };
Root_clock sai6_clk_root { "sai6_clk_root", root_base(80), m25_ref_clk, audio_pll1_clk, audio_pll2_clk, video_pll1_clk, system_pll1_div6, m27_ref_clk, ext_clk_3, ext_clk_4, tree };
Root_clock spdif1_clk_root { "spdif1_clk_root", root_base(81), m25_ref_clk, audio_pll1_clk, audio_pll2_clk, video_pll1_clk, system_pll1_div6, m27_ref_clk, ext_clk_2, ext_clk_3, tree };
Root_clock spdif2_clk_root { "spdif2_clk_root", root_base(82), m25_ref_clk, audio_pll1_clk, audio_pll2_clk, video_pll1_clk, system_pll1_div6, m27_ref_clk, ext_clk_3, ext_clk_4, tree };
Root_clock enet_ref_clk_root { "enet_ref_clk_root", root_base(83), m25_ref_clk, system_pll2_div8, system_pll2_div20, system_pll2_div10, system_pll1_div5, audio_pll1_clk, video_pll1_clk, ext_clk_4, tree };
Root_clock enet_timer_clk_root { "enet_timer_clk_root", root_base(84), m25_ref_clk, system_pll2_div10, audio_pll1_clk, ext_clk_1, ext_clk_2, ext_clk_3, ext_clk_4, video_pll1_clk, tree };
Root_clock enet_phy_ref_clk_root { "enet_phy_ref_clk_root", root_base(85), m25_ref_clk, system_pll2_div20, system_pll2_div8, system_pll2_div5, system_pll2_div2, audio_pll1_clk, video_pll1_clk, audio_pll2_clk, tree };
Root_clock nand_clk_root { "nand_clk_root", root_base(86), m25_ref_clk, system_pll2_div2, audio_pll1_clk, system_pll1_div2, audio_pll2_clk, system_pll3_clk, system_pll2_div4, video_pll1_clk, tree };
Root_clock qspi_clk_root { "qspi_clk_root", root_base(87), m25_ref_clk, system_pll1_div2, system_pll1_clk, system_pll2_div2, audio_pll2_clk, system_pll1_div3, system_pll3_clk, system_pll1_div8, tree };
Root_clock usdhc1_clk_root { "usdhc1_clk_root", root_base(88), m25_ref_clk, system_pll1_div2, system_pll1_clk, system_pll2_div2, system_pll3_clk, system_pll1_div3, audio_pll2_clk, system_pll1_div8, tree };
Root_clock usdhc2_clk_root { "usdhc2_clk_root", root_base(89), m25_ref_clk, system_pll1_div2, system_pll1_clk, system_pll2_div2, system_pll3_clk, system_pll1_div3, audio_pll2_clk, system_pll1_div8, tree };
Root_clock i2c1_clk_root { "i2c1_clk_root", root_base(90), m25_ref_clk, system_pll1_div5, system_pll2_div20, system_pll3_clk, audio_pll1_clk, video_pll1_clk, audio_pll2_clk, system_pll1_div6, tree };
Root_clock i2c2_clk_root { "i2c2_clk_root", root_base(91), m25_ref_clk, system_pll1_div5, system_pll2_div20, system_pll3_clk, audio_pll1_clk, video_pll1_clk, audio_pll2_clk, system_pll1_div6, tree };
Root_clock i2c3_clk_root { "i2c3_clk_root", root_base(92), m25_ref_clk, system_pll1_div5, system_pll2_div20, system_pll3_clk, audio_pll1_clk, video_pll1_clk, audio_pll2_clk, system_pll1_div6, tree };
Root_clock i2c4_clk_root { "i2c4_clk_root", root_base(93), m25_ref_clk, system_pll1_div5, system_pll2_div20, system_pll3_clk, audio_pll1_clk, video_pll1_clk, audio_pll2_clk, system_pll1_div6, tree };
Root_clock uart1_clk_root { "uart1_clk_root", root_base(94), m25_ref_clk, system_pll1_div10, system_pll2_div5, system_pll2_div10, system_pll3_clk, ext_clk_2, ext_clk_4, audio_pll2_clk, tree };
Root_clock uart2_clk_root { "uart2_clk_root", root_base(95), m25_ref_clk, system_pll1_div10, system_pll2_div5, system_pll2_div10, system_pll3_clk, ext_clk_2, ext_clk_3, audio_pll2_clk, tree };
Root_clock uart3_clk_root { "uart3_clk_root", root_base(96), m25_ref_clk, system_pll1_div10, system_pll2_div5, system_pll2_div10, system_pll3_clk, ext_clk_2, ext_clk_4, audio_pll2_clk, tree };
Root_clock uart4_clk_root { "uart4_clk_root", root_base(97), m25_ref_clk, system_pll1_div10, system_pll2_div5, system_pll2_div10, system_pll3_clk, ext_clk_2, ext_clk_3, audio_pll2_clk, tree };
Root_clock usb_core_ref_clk_root { "usb_core_ref_clk_root", root_base(98), m25_ref_clk, system_pll1_div8, system_pll1_div20, system_pll2_div10, system_pll2_div5, ext_clk_2, ext_clk_3, audio_pll2_clk, tree };
Root_clock usb_phy_ref_clk_root { "usb_phy_ref_clk_root", root_base(99), m25_ref_clk, system_pll1_div8, system_pll1_div20, system_pll2_div10, system_pll2_div5, ext_clk_2, ext_clk_3, audio_pll2_clk, tree };
Root_clock gic_clk_root { "gic_clk_root", root_base(100), m25_ref_clk, system_pll2_div5, system_pll1_div20, system_pll2_div10, system_pll1_clk, ext_clk_2, ext_clk_4, audio_pll2_clk, tree };
Root_clock ecspi1_clk_root { "ecspi1_clk_root", root_base(101), m25_ref_clk, system_pll2_div5, system_pll1_div20, system_pll1_div5, system_pll1_clk, system_pll3_clk, system_pll2_div4, audio_pll2_clk, tree };
Root_clock ecspi2_clk_root { "ecspi2_clk_root", root_base(102), m25_ref_clk, system_pll2_div5, system_pll1_div20, system_pll1_div5, system_pll1_clk, system_pll3_clk, system_pll2_div4, audio_pll2_clk, tree };
Root_clock pwm1_clk_root { "pwm1_clk_root", root_base(103), m25_ref_clk, system_pll2_div10, system_pll1_div5, system_pll1_div20, system_pll3_clk, ext_clk_1, system_pll1_div10, video_pll1_clk, tree };
Root_clock pwm2_clk_root { "pwm2_clk_root", root_base(104), m25_ref_clk, system_pll2_div10, system_pll1_div5, system_pll1_div20, system_pll3_clk, ext_clk_1, system_pll1_div10, video_pll1_clk, tree };
Root_clock pwm3_clk_root { "pwm3_clk_root", root_base(105), m25_ref_clk, system_pll2_div10, system_pll1_div5, system_pll1_div20, system_pll3_clk, ext_clk_2, system_pll1_div10, video_pll1_clk, tree };
Root_clock pwm4_clk_root { "pwm4_clk_root", root_base(106), m25_ref_clk, system_pll2_div10, system_pll1_div5, system_pll1_div20, system_pll3_clk, ext_clk_2, system_pll1_div10, video_pll1_clk, tree };
Root_clock gpt1_clk_root { "gpt1_clk_root", root_base(107), m25_ref_clk, system_pll2_div10, system_pll1_div2, system_pll1_div20, video_pll1_clk, system_pll1_div10, audio_pll1_clk, ext_clk_1, tree };
Root_clock gpt2_clk_root { "gpt2_clk_root", root_base(108), m25_ref_clk, system_pll2_div10, system_pll1_div2, system_pll1_div20, video_pll1_clk, system_pll1_div10, audio_pll1_clk, ext_clk_2, tree };
Root_clock gpt3_clk_root { "gpt3_clk_root", root_base(109), m25_ref_clk, system_pll2_div10, system_pll1_div2, system_pll1_div20, video_pll1_clk, system_pll1_div10, audio_pll1_clk, ext_clk_3, tree };
Root_clock gpt4_clk_root { "gpt4_clk_root", root_base(110), m25_ref_clk, system_pll2_div10, system_pll1_div2, system_pll1_div20, video_pll1_clk, system_pll1_div10, audio_pll1_clk, ext_clk_1, tree };
Root_clock gpt5_clk_root { "gpt5_clk_root", root_base(111), m25_ref_clk, system_pll2_div10, system_pll1_div2, system_pll1_div20, video_pll1_clk, system_pll1_div10, audio_pll1_clk, ext_clk_2, tree };
Root_clock gpt6_clk_root { "gpt6_clk_root", root_base(112), m25_ref_clk, system_pll2_div10, system_pll1_div2, system_pll1_div20, video_pll1_clk, system_pll1_div10, audio_pll1_clk, ext_clk_3, tree };
Root_clock trace_clk_root { "trace_clk_root", root_base(113), m25_ref_clk, system_pll1_div6, system_pll1_div5, vpu_pll_clk, system_pll2_div8, system_pll3_clk, ext_clk_1, ext_clk_3, tree };
Root_clock wdog_clk_root { "wdog_clk_root", root_base(114), m25_ref_clk, system_pll1_div6, system_pll1_div5, vpu_pll_clk, system_pll2_div8, system_pll3_clk, system_pll1_div10, system_pll2_div6, tree };
Root_clock wrclk_clk_root { "wrclk_clk_root", root_base(115), m25_ref_clk, system_pll1_div20, vpu_pll_clk, system_pll3_clk, system_pll2_div5, system_pll1_div3, system_pll2_div2, system_pll1_div8, tree };
Root_clock ipp_do_clko1clk_root { "ipp_do_clko1_clk_root", root_base(116), m25_ref_clk, system_pll1_clk, m27_ref_clk, system_pll1_div4, audio_pll2_clk, system_pll2_div2, vpu_pll_clk, system_pll1_div10, tree };
Root_clock ipp_do_clko2_clk_root { "ipp_do_clko2_clk_root", root_base(117), m25_ref_clk, system_pll2_div5, system_pll1_div2, system_pll2_div6, system_pll3_clk, audio_pll1_clk, video_pll1_clk, k32_ref_clk, tree };
Root_clock mipi_dsi_core_clk_root { "mipi_dsi_core_clk_root", root_base(118), m25_ref_clk, system_pll1_div3, system_pll2_div4, system_pll1_clk, system_pll2_clk, system_pll3_clk, audio_pll2_clk, video_pll1_clk, tree };
Root_clock mipi_dsi_phy_ref_clk_root { "mipi_dsi_phy_ref_clk_root", root_base(119), m25_ref_clk, system_pll2_div8, system_pll2_div10, system_pll1_clk, system_pll2_clk, ext_clk_2, audio_pll2_clk, video_pll1_clk, tree };
Root_clock mipi_dsi_dbi_clk_root { "mipi_dsi_dbi_clk_root", root_base(120), m25_ref_clk, system_pll1_div3, system_pll2_div10, system_pll1_clk, system_pll2_clk, system_pll3_clk, audio_pll2_clk, video_pll1_clk, tree };
Root_clock old_mipi_dsi_esc_clk_root { "old_mipi_dsi_esc_clk_root", root_base(121), m25_ref_clk, system_pll2_div10, system_pll1_div10, system_pll1_clk, system_pll2_clk, system_pll3_clk, ext_clk_3, audio_pll2_clk, tree };
Root_clock mipi_csi1_core_clk_root { "mipi_csi1_core_clk_root", root_base(122), m25_ref_clk, system_pll1_div3, system_pll2_div4, system_pll1_clk, system_pll2_clk, system_pll3_clk, audio_pll2_clk, video_pll1_clk, tree };
Root_clock mipi_csi1_phy_ref_clk_root { "mipi_csi1_phy_ref_clk_root", root_base(123), m25_ref_clk, system_pll2_div3, system_pll2_div10, system_pll1_clk, system_pll2_clk, ext_clk_2, audio_pll2_clk, video_pll1_clk, tree };
Root_clock mipi_csi1_esc_clk_root { "mipi_csi1_esc_clk_root", root_base(124), m25_ref_clk, system_pll2_div10, system_pll1_div10, system_pll1_clk, system_pll2_clk, system_pll3_clk, ext_clk_3, audio_pll2_clk, tree };
Root_clock mipi_csi2_core_clk_root { "mipi_csi2_core_clk_root", root_base(125), m25_ref_clk, system_pll1_div3, system_pll2_div4, system_pll1_clk, system_pll2_clk, system_pll3_clk, audio_pll2_clk, video_pll1_clk, tree };
Root_clock mipi_csi2_phy_ref_clk_root { "mipi_csi2_phy_ref_clk_root", root_base(126), m25_ref_clk, system_pll2_div3, system_pll2_div10, system_pll1_clk, system_pll2_clk, ext_clk_2, audio_pll2_clk, video_pll1_clk, tree };
Root_clock mipi_csi2_esc_clk_root { "mipi_csi2_esc_clk_root", root_base(127), m25_ref_clk, system_pll2_div10, system_pll1_div10, system_pll1_clk, system_pll2_clk, system_pll3_clk, ext_clk_3, audio_pll2_clk, tree };
Root_clock pcie2_ctrl_clk_root { "pcie2_ctrl_clk_root", root_base(128), m25_ref_clk, system_pll2_div4, system_pll2_div5, system_pll1_div3, system_pll1_clk, system_pll2_div2, system_pll2_div3, system_pll3_clk, tree };
Root_clock pcie2_phy_clk_root { "pcie2_phy_clk_root", root_base(129), m25_ref_clk, system_pll2_div10, system_pll2_div2, ext_clk_1, ext_clk_2, ext_clk_3, ext_clk_4, system_pll1_div2, tree };
Root_clock pcie2_aux_clk_root { "pcie2_aux_clk_root", root_base(130), m25_ref_clk, system_pll2_div5, system_pll2_div20, system_pll3_clk, system_pll2_div10, system_pll1_div10, system_pll1_div5, system_pll1_div4, tree };
Root_clock ecspi3_clk_root { "ecspi3_clk_root", root_base(131), m25_ref_clk, system_pll2_div5, system_pll1_div20, system_pll1_div5, system_pll1_clk, system_pll3_clk, system_pll2_div4, audio_pll2_clk, tree };
Root_clock old_mipi_dsi_esc_rx_clk_root { "old_mipi_dsi_esc_rx_clk_root", root_base(132), m25_ref_clk, system_pll2_div10, system_pll1_div10, system_pll1_clk, system_pll2_clk, system_pll3_clk, ext_clk_3, audio_pll2_clk, tree };
Root_clock display_hdmi_clk_root { "display_hdmi_clk_root", root_base(133), m25_ref_clk, system_pll1_div4, system_pll2_div5, vpu_pll_clk, system_pll1_clk, system_pll2_clk, system_pll3_clk, ext_clk_4, tree };
Root_clock_divider ipg_clk_root { "ipg_clk_root", root_base(33), ahb_clk_root, tree };
Root_clock_divider ipg_audio_clk_root { "ipg_audio_clk_root", root_base(35), audio_ahb_clk_root, tree };
Root_clock_divider mipi_dsi_esc_clk_root { "mipi_dsi_esc_clk_root", root_base(37), mipi_dsi_esc_rx_clk_root, tree };
Gate ecspi1_gate { "ecspi1_gate", gate_base(7), ecspi1_clk_root, tree };
Gate ecspi2_gate { "ecspi2_gate", gate_base(8), ecspi2_clk_root, tree };
Gate ecspi3_gate { "ecspi3_gate", gate_base(9), ecspi3_clk_root, tree };
Gate enet1_gate { "enet1_gate", gate_base(10), enet_axi_clk_root, tree };
Gate gpt1_gate { "gpt1_gate", gate_base(16), gpt1_clk_root, tree };
Gate i2c1_gate { "i2c1_gate", gate_base(23), i2c1_clk_root, tree };
Gate i2c2_gate { "i2c2_gate", gate_base(24), i2c2_clk_root, tree };
Gate i2c3_gate { "i2c3_gate", gate_base(25), i2c3_clk_root, tree };
Gate i2c4_gate { "i2c4_gate", gate_base(26), i2c4_clk_root, tree };
Gate mu_gate { "mu_gate", gate_base(33), ipg_clk_root, tree };
Gate ocotp_gate { "ocotp_gate", gate_base(34), ipg_clk_root, tree };
Gate pcie_gate { "pcie_gate", gate_base(37), pcie1_ctrl_clk_root, tree };
Gate pwm1_gate { "pwm1_gate", gate_base(40), pwm1_clk_root, tree };
Gate pwm2_gate { "pwm2_gate", gate_base(41), pwm2_clk_root, tree };
Gate pwm3_gate { "pwm3_gate", gate_base(42), pwm3_clk_root, tree };
Gate pwm4_gate { "pwm4_gate", gate_base(43), pwm4_clk_root, tree };
Gate qspi_gate { "qspi_gate", gate_base(47), qspi_clk_root, tree };
Gate nand_gate { "nand_gate", gate_base(48), nand_clk_root, tree };
Gate sai1_gate { "sai1_gate", gate_base(51), sai1_clk_root, tree };
Gate sai2_gate { "sai2_gate", gate_base(52), sai2_clk_root, tree };
Gate sai3_gate { "sai3_gate", gate_base(53), sai3_clk_root, tree };
Gate sai4_gate { "sai4_gate", gate_base(54), sai4_clk_root, tree };
Gate sai5_gate { "sai5_gate", gate_base(55), sai5_clk_root, tree };
Gate sai6_gate { "sai6_gate", gate_base(56), sai6_clk_root, tree };
Gate sdma1_gate { "sdma1_gate", gate_base(58), ipg_clk_root, tree };
Gate sdma2_gate { "sdma2_gate", gate_base(59), ipg_audio_clk_root, tree };
Gate uart1_gate { "uart1_gate", gate_base(73), uart1_clk_root, tree };
Gate uart2_gate { "uart2_gate", gate_base(74), uart2_clk_root, tree };
Gate uart3_gate { "uart3_gate", gate_base(75), uart3_clk_root, tree };
Gate uart4_gate { "uart4_gate", gate_base(76), uart4_clk_root, tree };
Gate usb_ctrl1_gate { "usb_ctrl1_gate", gate_base(77), usb_core_ref_clk_root, tree };
Gate usb_ctrl2_gate { "usb_ctrl2_gate", gate_base(78), usb_core_ref_clk_root, tree };
Gate usb_phy1_gate { "usb_phy1_gate", gate_base(79), usb_phy_ref_clk_root, tree };
Gate usb_phy2_gate { "usb_phy2_gate", gate_base(80), usb_phy_ref_clk_root, tree };
Gate usdhc1_gate { "usdhc1_gate", gate_base(81), usdhc1_clk_root, tree };
Gate usdhc2_gate { "usdhc2_gate", gate_base(82), usdhc2_clk_root, tree };
Gate wdog1_gate { "wdog1_gate", gate_base(83), wdog_clk_root, tree };
Gate wdog2_gate { "wdog2_gate", gate_base(84), wdog_clk_root, tree };
Gate wdog3_gate { "wdog3_gate", gate_base(85), wdog_clk_root, tree };
Gate va53_gate { "va53_gate", gate_base(86), vpu_g1_clk_root, tree };
Gate gpu_gate { "gpu_gate", gate_base(87), gpu_core_clk_root, tree };
Gate vp9_gate { "vp9_gate", gate_base(90), vpu_g2_clk_root, tree };
Gate display_gate { "display_gate", gate_base(93), display_dc8000_clk_root, tree };
Gate tempsensor_gate { "tempsensor_gate", gate_base(98), ipg_clk_root, tree };
Gate vpu_dec_gate { "vpu_dec_gate", gate_base(99), vpu_bus_clk_root, tree };
Gate pcie2_gate { "pcie2_gate", gate_base(100), pcie2_ctrl_clk_root, tree };
Gate mipi_csi1_gate { "mipi_csi1_gate", gate_base(101), mipi_csi1_core_clk_root, tree };
Gate mipi_csi2_gate { "mipi_csi2_gate", gate_base(102), mipi_csi2_core_clk_root, tree };
};

120
repos/os/src/drivers/platform/imx8mq/clock.h
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@ -1,120 +0,0 @@
/*
* \brief Clock tree for platform driver
* \author Stefan Kalkowski
* \date 2020-06-12
*/
/*
* Copyright (C) 2020 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU Affero General Public License version 3.
*/
#pragma once
#include <util/avl_string.h>
namespace Driver {
template <unsigned, typename> class Avl_string_element;
class Clock;
class Fixed_clock;
class Fixed_divider;
using namespace Genode;
}
template <unsigned STRING_LEN, typename T>
class Driver::Avl_string_element : public String<STRING_LEN>,
public Avl_string_base
{
T & _object;
public:
Avl_string_element(String<STRING_LEN> name, T & o)
: String<STRING_LEN>(name),
Avl_string_base(this->string()),
_object(o) {}
String<STRING_LEN> name() const { return *this; }
T & object() const { return _object; }
};
class Driver::Clock
{
protected:
enum { NAME_LEN = 64 };
using Node = Avl_string_element<NAME_LEN, Clock>;
Node _tree_elem;
/*
* Noncopyable
*/
Clock(Clock const &);
Clock &operator = (Clock const &);
public:
using Name = Genode::String<NAME_LEN>;
using Clock_tree = Avl_tree<Avl_string_base>;
using Clock_tree_element = Avl_string_element<NAME_LEN, Clock>;
Clock(Name name,
Clock_tree & tree)
: _tree_elem(name, *this) { tree.insert(&_tree_elem); }
virtual ~Clock() {}
virtual void set_rate(unsigned long rate) = 0;
virtual unsigned long get_rate() const = 0;
virtual void enable() {}
virtual void disable() {}
virtual void set_parent(Name) {}
Name name() const { return _tree_elem.name(); }
};
class Driver::Fixed_clock : public Driver::Clock
{
private:
unsigned long _rate;
public:
Fixed_clock(Name name,
unsigned long rate,
Clock_tree & tree)
: Clock(name, tree), _rate(rate) {}
void set_rate(unsigned long) override {}
unsigned long get_rate() const override { return _rate; }
};
class Driver::Fixed_divider : public Driver::Clock
{
private:
Clock & _parent;
unsigned _divider;
public:
Fixed_divider(Name name,
Clock & parent,
unsigned divider,
Clock_tree & tree)
: Clock(name, tree), _parent(parent), _divider(divider) {}
void set_rate(unsigned long) override {}
unsigned long get_rate() const override {
return _parent.get_rate() / _divider; }
};

101
repos/os/src/drivers/platform/imx8mq/device_model_policy.cc
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@ -1,101 +0,0 @@
/*
* \brief Platform driver - Device model policy for i.MX
* \author Stefan Kalkowski
* \date 2020-08-16
*/
/*
* Copyright (C) 2020 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU Affero General Public License version 3.
*/
#include <env.h>
#include <imx_device.h>
using Driver::Device_model;
using Driver::Device;
using Driver::Imx_device;
void Device_model::destroy_element(Device & dev)
{
Imx_device & device = static_cast<Imx_device&>(dev);
{
Irq_update_policy policy(_env.heap);
device._irq_list.destroy_all_elements(policy);
}
{
Io_mem_update_policy policy(_env.heap);
device._io_mem_list.destroy_all_elements(policy);
}
{
Property_update_policy policy(_env.heap);
device._property_list.destroy_all_elements(policy);
}
{
Clock_update_policy policy(_env.heap);
device._clock_list.destroy_all_elements(policy);
}
{
Power_domain_update_policy policy(_env.heap);
device._power_domain_list.destroy_all_elements(policy);
}
{
Reset_domain_update_policy policy(_env.heap);
device._reset_domain_list.destroy_all_elements(policy);
}
Genode::destroy(_env.heap, &device);
}
Device & Device_model::create_element(Genode::Xml_node node)
{
Device::Name name = node.attribute_value("name", Device::Name());
Device::Type type = node.attribute_value("type", Device::Type());
return *(new (_env.heap) Imx_device(name, type));
}
void Device_model::update_element(Device & dev,
Genode::Xml_node node)
{
Imx_device & device = static_cast<Imx_device&>(dev);
{
Irq_update_policy policy(_env.heap);
device._irq_list.update_from_xml(policy, node);
}
{
Io_mem_update_policy policy(_env.heap);
device._io_mem_list.update_from_xml(policy, node);
}
{
Property_update_policy policy(_env.heap);
device._property_list.update_from_xml(policy, node);
}
{
Clock_update_policy policy(_env.heap);
device._clock_list.update_from_xml(policy, node);
}
{
Power_domain_update_policy policy(_env.heap);
device._power_domain_list.update_from_xml(policy, node);
}
{
Reset_domain_update_policy policy(_env.heap);
device._reset_domain_list.update_from_xml(policy, node);
}
}

47
repos/os/src/drivers/platform/imx8mq/env.h
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@ -1,47 +0,0 @@
/*
* \brief Platform driver for ARM
* \author Stefan Kalkowski
* \date 2020-04-12
*/
/*
* Copyright (C) 2020 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU Affero General Public License version 3.
*/
#ifndef _SRC__DRIVERS__PLATFORM__SPEC__ARM__ENV_H_
#define _SRC__DRIVERS__PLATFORM__SPEC__ARM__ENV_H_
#include <base/attached_rom_dataspace.h>
#include <base/env.h>
#include <base/heap.h>
#include <ccm.h>
#include <gpc.h>
#include <src.h>
#include <device.h>
namespace Driver {
using namespace Genode;
struct Env;
};
struct Driver::Env
{
Genode::Env & env;
Heap heap { env.ram(), env.rm() };
Sliced_heap sliced_heap { env.ram(), env.rm() };
Attached_rom_dataspace config { env, "config" };
Ccm ccm { env };
Gpc gpc { env };
Src src { env };
Device_model devices { *this };
Env(Genode::Env &env) : env(env) { }
};
#endif /* _SRC__DRIVERS__PLATFORM__SPEC__ARM__ENV_H_ */

109
repos/os/src/drivers/platform/imx8mq/gpc.h
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@ -1,109 +0,0 @@
/*
* \brief Global power controller for i.MX8
* \author Stefan Kalkowski
* \date 2020-06-12
*/
/*
* Copyright (C) 2020 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU Affero General Public License version 3.
*/
#pragma once
#include <base/env.h>
#include <util/string.h>
struct Gpc
{
enum Pu {
MIPI = 0,
PCIE_1 = 1,
USB_OTG_1 = 2,
USB_OTG_2 = 3,
GPU = 4,
VPU = 5,
HDMI = 6,
DISP = 7,
CSI_1 = 8,
CSI_2 = 9,
PCIE_2 = 10,
INVALID,
};
enum {
SIP_SERVICE_FUNC = 0xc2000000,
GPC_PM_DOMAIN = 0x3,
ON = 1,
OFF = 0
};
Genode::Env & env;
Pu pu(Genode::String<64> name)
{
if (name == "mipi") { return MIPI; }
if (name == "pcie_1") { return PCIE_1; }
if (name == "usb_otg_1") { return USB_OTG_1; }
if (name == "usb_otg_2") { return USB_OTG_2; }
if (name == "gpu") { return GPU; }
if (name == "vpu") { return VPU; }
if (name == "hdmi") { return HDMI; }
if (name == "disp") { return DISP; }
if (name == "csi_1") { return CSI_1; }
if (name == "csi_2") { return CSI_2; }
if (name == "pcie_2") { return PCIE_2; }
return INVALID;
}
void enable(Genode::String<64> name)
{
Genode::Pd_session::Managing_system_state state;
state.r[0] = SIP_SERVICE_FUNC;
state.r[1] = GPC_PM_DOMAIN;
state.r[2] = pu(name);
state.r[3] = ON;
if (state.r[2] == INVALID) {
Genode::warning("Power domain ", name.string(), " is not valid!");
return;
}
env.pd().managing_system(state);
}
void disable(Genode::String<64> name)
{
Genode::Pd_session::Managing_system_state state;
state.r[0] = SIP_SERVICE_FUNC;
state.r[1] = GPC_PM_DOMAIN;
state.r[2] = pu(name);
state.r[3] = OFF;
if (state.r[2] == INVALID) {
Genode::warning("Power domain ", name.string(), " is not valid!");
return;
}
env.pd().managing_system(state);
}
Gpc(Genode::Env & env) : env(env)
{
//FIXME: add beyond initialization code,
// when all drivers use the new platform driver
// Until now, the disabling of power domains will harm
// drivers not claiming it resources from here
#if 0
for (unsigned domain = MIPI; domain <= PCIE_2; domain++) {
Genode::Pd_session::Managing_system_state state;
state.r[0] = SIP_SERVICE_FUNC;
state.r[1] = GPC_PM_DOMAIN;
state.r[2] = domain;
state.r[3] = OFF;
}
#endif
};
};

80
repos/os/src/drivers/platform/imx8mq/imx_device.cc
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@ -1,80 +0,0 @@
/*
* \brief Platform driver - Device abstraction for i.MX
* \author Stefan Kalkowski
* \date 2020-08-17
*/
/*
* Copyright (C) 2020 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU Affero General Public License version 3.
*/
#include <imx_device.h>
#include <clock.h>
#include <session_component.h>
bool Driver::Imx_device::acquire(Driver::Session_component & sc)
{
bool ret = Driver::Device::acquire(sc);
if (ret) {
_power_domain_list.for_each([&] (Power_domain & p) {
sc.env().gpc.enable(p.name); });
_reset_domain_list.for_each([&] (Reset_domain & r) {
sc.env().src.enable(r.name); });
_clock_list.for_each([&] (Clock & c) {
Avl_string_base * asb =
sc.env().ccm.tree.first()->find_by_name(c.name.string());
if (!asb) {
Genode::warning("Clock ", c.name, " is unknown! ");
return;
}
Driver::Clock & clock =
static_cast<Driver::Clock::Clock_tree_element*>(asb)->object();
if (c.parent.valid()) { clock.set_parent(c.parent); }
if (c.rate) { clock.set_rate(c.rate); }
clock.enable();
});
sc.update_devices_rom();
}
return ret;
}
void Driver::Imx_device::release(Session_component & sc)
{
_reset_domain_list.for_each([&] (Reset_domain & r) {
sc.env().src.disable(r.name); });
_power_domain_list.for_each([&] (Power_domain & p) {
sc.env().gpc.disable(p.name); });
_clock_list.for_each([&] (Clock & c) {
Avl_string_base * asb =
sc.env().ccm.tree.first()->find_by_name(c.name.string());
if (!asb) { return; }
static_cast<Driver::Clock::Clock_tree_element*>(asb)->object().disable();
});
return Driver::Device::release(sc);
}
void Driver::Imx_device::_report_platform_specifics(Genode::Xml_generator & xml,
Driver::Session_component & sc)
{
_clock_list.for_each([&] (Clock & c) {
Avl_string_base * asb =
sc.env().ccm.tree.first()->find_by_name(c.name.string());
if (!asb || !c.driver_name.valid()) { return; }
Driver::Clock & clock =
static_cast<Driver::Clock::Clock_tree_element*>(asb)->object();
xml.node("clock", [&] () {
xml.attribute("rate", clock.get_rate());
xml.attribute("name", c.driver_name);
});
});
}

183
repos/os/src/drivers/platform/imx8mq/imx_device.h
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@ -1,183 +0,0 @@
/*
* \brief Platform driver - Device abstraction for i.MX
* \author Stefan Kalkowski
* \date 2020-08-17
*/
/*
* Copyright (C) 2020 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU Affero General Public License version 3.
*/
#ifndef _SRC__DRIVERS__PLATFORM__IMX8MQ__IMX_DEVICE_H_
#define _SRC__DRIVERS__PLATFORM__IMX8MQ__IMX_DEVICE_H_
#include <device.h>
namespace Driver {
using namespace Genode;
class Imx_device;
struct Clock_update_policy;
struct Power_domain_update_policy;
struct Reset_domain_update_policy;
}
class Driver::Imx_device : public Driver::Device
{
public:
struct Clock : List_model<Clock>::Element
{
using Name = Genode::String<64>;
Name name;
Name parent;
Name driver_name;
unsigned long rate;
Clock(Name name,
Name parent,
Name driver_name,
unsigned long rate)
: name(name), parent(parent),
driver_name(driver_name), rate(rate) {}
};
struct Power_domain : List_model<Power_domain>::Element
{
using Name = Genode::String<64>;
Name name;
Power_domain(Name name) : name(name) {}
};
struct Reset_domain : List_model<Reset_domain>::Element
{
using Name = Genode::String<64>;
Name name;
Reset_domain(Name name) : name(name) {}
};
bool acquire(Session_component &) override;
void release(Session_component &) override;
Imx_device(Device::Name name, Device::Type type)
: Device(name, type) {}
protected:
friend class Driver::Device_model;
friend class List_model<Device>;
void _report_platform_specifics(Xml_generator &,
Session_component &) override;
List_model<Clock> _clock_list {};
List_model<Power_domain> _power_domain_list {};
List_model<Reset_domain> _reset_domain_list {};
};
struct Driver::Clock_update_policy
: Genode::List_model<Imx_device::Clock>::Update_policy
{
Genode::Allocator & alloc;
Clock_update_policy(Genode::Allocator & alloc) : alloc(alloc) {}
void destroy_element(Element & clock) {
Genode::destroy(alloc, &clock); }
Element & create_element(Genode::Xml_node node)
{
Element::Name name = node.attribute_value("name", Element::Name());
Element::Name parent = node.attribute_value("parent", Element::Name());
Element::Name driver = node.attribute_value("driver_name", Element::Name());
unsigned long rate = node.attribute_value<unsigned long >("rate", 0);
return *(new (alloc) Element(name, parent, driver, rate));
}
void update_element(Element &, Genode::Xml_node) {}
static bool element_matches_xml_node(Element const & clock, Genode::Xml_node node)
{
Element::Name name = node.attribute_value("name", Element::Name());
return name == clock.name;
}
static bool node_is_element(Genode::Xml_node node)
{
return node.has_type("clock");
}
};
struct Driver::Power_domain_update_policy
: Genode::List_model<Imx_device::Power_domain>::Update_policy
{
Genode::Allocator & alloc;
Power_domain_update_policy(Genode::Allocator & alloc) : alloc(alloc) {}
void destroy_element(Element & pd) {
Genode::destroy(alloc, &pd); }
Element & create_element(Genode::Xml_node node)
{
Element::Name name = node.attribute_value("name", Element::Name());
return *(new (alloc) Element(name));
}
void update_element(Element &, Genode::Xml_node) {}
static bool element_matches_xml_node(Element const & pd, Genode::Xml_node node)
{
Element::Name name = node.attribute_value("name", Element::Name());
return name == pd.name;
}
static bool node_is_element(Genode::Xml_node node)
{
return node.has_type("power-domain");
}
};
struct Driver::Reset_domain_update_policy
: Genode::List_model<Imx_device::Reset_domain>::Update_policy
{
Genode::Allocator & alloc;
Reset_domain_update_policy(Genode::Allocator & alloc) : alloc(alloc) {}
void destroy_element(Element & pd) {
Genode::destroy(alloc, &pd); }
Element & create_element(Genode::Xml_node node)
{
Element::Name name = node.attribute_value("name", Element::Name());
return *(new (alloc) Element(name));
}
void update_element(Element &, Genode::Xml_node) {}
static bool element_matches_xml_node(Element const & pd, Genode::Xml_node node)
{
Element::Name name = node.attribute_value("name", Element::Name());
return name == pd.name;
}
static bool node_is_element(Genode::Xml_node node)
{
return node.has_type("reset-domain");
}
};
#endif /* _SRC__DRIVERS__PLATFORM__IMX8MQ__IMX_DEVICE_H_ */

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repos/os/src/drivers/platform/imx8mq/src.h
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@ -1,58 +0,0 @@
/*
* \brief System reset controller for i.MX8
* \author Stefan Kalkowski
* \date 2021-05-21
*/
/*
* Copyright (C) 2021 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU Affero General Public License version 3.
*/
#pragma once
#include <base/env.h>
#include <base/log.h>
#include <os/attached_mmio.h>
#include <util/string.h>
struct Src : Genode::Attached_mmio
{
struct Mipi_phy : Register<0x28, 32>
{
struct Byte : Bitfield<1, 1> {};
struct Reset : Bitfield<2, 1> {};
struct Dpi : Bitfield<3, 1> {};
struct Esc : Bitfield<4, 1> {};
struct Pclk : Bitfield<5, 1> {};
};
void enable(Genode::String<64> name)
{
if (name == "mipi_dsi_byte") { write<Mipi_phy::Byte>(1); return; }
if (name == "mipi_dsi_dpi") { write<Mipi_phy::Dpi>(1); return; }
if (name == "mipi_dsi_esc") { write<Mipi_phy::Esc>(1); return; }
if (name == "mipi_dsi_pclk") { write<Mipi_phy::Pclk>(1); return; }
warning("Reset domain ", name, " is unknown!");
}
void disable(Genode::String<64> name)
{
if (name == "mipi_dsi_byte") { write<Mipi_phy::Byte>(0); return; }
if (name == "mipi_dsi_dpi") { write<Mipi_phy::Dpi>(0); return; }
if (name == "mipi_dsi_esc") { write<Mipi_phy::Esc>(0); return; }
if (name == "mipi_dsi_pclk") { write<Mipi_phy::Pclk>(0); return; }
warning("Reset domain ", name, " is unknown!");
}
enum {
SRC_MMIO_BASE = 0x30390000,
SRC_MMIO_SIZE = 0x10000,
};
Src(Genode::Env & env)
: Attached_mmio(env, SRC_MMIO_BASE, SRC_MMIO_SIZE) { };
};

15
repos/os/src/drivers/platform/imx8mq/target.mk
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@ -1,15 +0,0 @@
TARGET = imx8mq_platform_drv
REQUIRES = arm_v8
SRC_CC = ccm.cc
SRC_CC += device.cc
SRC_CC += device_component.cc
SRC_CC += device_model_policy.cc
SRC_CC += imx_device.cc
SRC_CC += main.cc
SRC_CC += session_component.cc
SRC_CC += root.cc
INC_DIR = $(PRG_DIR) $(REP_DIR)/src/drivers/platform/spec/arm
LIBS = base
vpath %.cc $(PRG_DIR)
vpath %.cc $(REP_DIR)/src/drivers/platform/spec/arm

9
repos/os/src/drivers/sd_card/imx8/target.mk
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@ -1,9 +0,0 @@
TARGET = imx8_sd_card_drv
SRC_CC = adma2.cc imx/driver.cc
INC_DIR = $(REP_DIR)/src/drivers/sd_card/imx
REQUIRES = arm_v8a
include $(REP_DIR)/src/drivers/sd_card/target.inc
vpath driver.cc $(REP_DIR)/src/drivers/sd_card/imx6

4
tool/builddir/build.conf/repos_arm_v8 Normal file
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@ -0,0 +1,4 @@
#
# Board support for i.MX SoC family
#
#REPOSITORIES += $(GENODE_DIR)/repos/imx

2
tool/builddir/build.conf/run_arm_v8
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@ -4,7 +4,7 @@ QEMU_RUN_OPT := --include power_on/qemu --include log/qemu
# kernel to use (hw, foc, or sel4)
#KERNEL ?= hw
# board to use (rpi3, imx8q_evk, virt_qemu)
# board to use (rpi3, virt_qemu, ...)
#BOARD ?= rpi3
# local variable for run-tool arguments that depend on the used board

2
tool/create_builddir
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@ -90,7 +90,7 @@ BUILD_CONF_ARM_V6 := run_arm_v6 run_boot_dir repos
BUILD_CONF_ARM_V7 := run_arm_v7 run_boot_dir repos repos_arm_v7
BUILD_CONF(arm_v6) := $(BUILD_CONF_ARM_V6)
BUILD_CONF(arm_v7a) := $(BUILD_CONF_ARM_V7)
BUILD_CONF(arm_v8a) := run_arm_v8 run_boot_dir repos
BUILD_CONF(arm_v8a) := run_arm_v8 run_boot_dir repos repos_arm_v8
BUILD_CONF(riscv) := run_riscv run_boot_dir repos
BUILD_CONF(x86_32) := run_x86_32 $(BUILD_CONF_X86)
BUILD_CONF(x86_64) := run_x86_64 $(BUILD_CONF_X86)