Commit Graph

547 Commits

Author SHA1 Message Date
Piotr Tworek
880cd3a490 virtio_nic: Fix packet transmission handling.
The problem can be seen when running nic_router_flood scenarion on arm
qemu_virt boards. With the amount of data this scenario tries to send
the driver quickly complains it has failed to push data into TX VirtIO
queue. After this warning message is printed nothing really happens and
after a while the test scenario fails.

The fact that we can't write all available data to the device is not
unexpected. VirtIO queue size is slected at initialization time and we
don't change it during driver lifetime. It can be tweaked via driver
config, but this does not change the fact that we'll always be able to
produce more data packets than we have free space in the VirtIO queue.

IMO the expected behavior of the driver in such case should be to:
1. Notify the device there is data to process.
2. Wait for the device to process at least part of it.
3. Retry sending queued packets.

One could expect returning Transmit_result::RETRY from _drv_transmit_pkt
would produce such result. Unfortunately it seems that Uplink_client_base
treats RETRY return value as indication of link being down. It'll retry
sending the packet only after the device notifies it the link is once
again up. This is the reason why nothing happens when running
nic_router_flood on top of virtio_nic driver. The link never goes down
in this case so once we fill the TX VirtIO queue and tell the base class
to retry the send, we'll be stuck waiting for link up change event
which will never arrive.

To fix this problem, when sending a packet to the device fails, do a
synchrnonus TX VirtIO queue flush (tell device there is data to process
and wait until its done with it).

With this fix in place nic_router_flood test scenario passes on both arm
qemu_virt boards.

Issue #4264
2021-10-13 14:46:51 +02:00
Alexander Boettcher
d85a448c52 gpu/intel: provide supported devices as config
Adjust drivers_managed and sculpt accordingly.

Issue #4260
2021-10-13 14:46:51 +02:00
Sebastian Sumpf
d67899be95 gpu/intel: enable 32 bit CPU support
* use Gpu::addr_t (64 Bit) where necessary instead of Genode::addr_t.

issue #4260
2021-10-13 14:46:51 +02:00
Alexander Boettcher
367385aed7 gpu/intel: add more supported Intel GPUs
- Lenovo T470p, T490, T490s

Issue #4260
2021-10-13 14:46:51 +02:00
Alexander Boettcher
0f72356570 gpu/intel: use read out gttm size
and don't assume 8M, which leads to Region_conflicts if size is >8M (X201).

Issue #4260
2021-10-13 14:46:51 +02:00
Sebastian Sumpf
3daa94ff2e gpu/intel: Add support for Gen9+
This commit contains features and buf fixes:

* Catch errors during resource allocation

* Because Mesa tries to allocate fence (hardware) registers for each
  batch buffer execution, do not allocate new fences for buffer objects
  that are already fenced

* Add support for global hardware status page. Each context additionally
  has a per-process hardware status page, which we used to set the
  global hardware status page during Vgpu switch. This was obviously
  wrong. There is only one global hardware status page (set once during
  initialization) and a distinct per-process page for contexts.

* Write the sequence number of the currently executing batch buffer to
  dword 52 of the per-process hardware status page. We use the pipe line
  command with QW_WRITE (quad word write), GLOBAL_GTT_IVB disabled
  (address space is per-process address space), and STORE_DATA_INDEX
  enabled (write goes to offset of hardware status page). This command
  used to write to the scratch page. But Linux now uses the first
  reserved word of the per-process hardware status page.

* Add Gen9+ WaEnableGapsTsvCreditFix workaround. This sets the "GAPS TSV
  Credit fix Enable" bit of the Arbiter control register (GARBCNTLREG)
  as described by the documentation this bit should be set by the BIOS
  but is not on most Gen9/9.5 platforms. Not setting this bit leads to
  random GPU hangs.

* Increase the context size from 20 to 22 pages for Gen9. On Gen8 the
  hardware context is 20 pages (1 hardware status page + 19 ring context
  register pages). On Gen9 the size of the ring context registers has
  increased by two pages to 21 pages or 81.3125 KBytes as the IGD
  documentation states.

* The logical ring size in the ring buffer control of the execlist
  context has to be programmed with number of pages - 1. So 0 is 1 page.
  We programmed the actual number of pages before, leading to ring
  buffer execution of NOOPs if page behind our ring buffer was empty or
  GPU hangs if there was data on the page.

issue #4260
2021-10-13 14:46:50 +02:00
Sebastian Sumpf
e4ae817e82 ram_fb_drv: RAM framebuffer driver for Qemu
Enable "-device ramfb" to use in Qemu. Also add drivers interactive
using this framebuffer for the "virt_qemu" platform.

issue #4254
2021-08-30 15:00:38 +02:00
Alexander Boettcher
7a4626861e gpu/intel: add w/a for gen9 kabylake a0-b0 stepping
issue #4254
2021-08-30 15:00:37 +02:00
Alexander Boettcher
bac7381be3 gpu/intel: adjust submit batch to linux 5.13 handling
issue #4254
2021-08-30 15:00:37 +02:00
Alexander Boettcher
6b1f1794c4 gpu/intel: add gen9 forcewake support
issue #4254
2021-08-30 15:00:37 +02:00
Alexander Boettcher
eab92f8d6f gpu/intel: add clock gating for kabylake
issue #4254
2021-08-30 15:00:37 +02:00
Alexander Boettcher
ee283c0d12 gpu/intel: dump more in error case
- show hardware read tail & head pointer of ring buffer

issue #4254
2021-08-30 15:00:37 +02:00
Alexander Boettcher
c5d8a43418 gpu/intel: sanity check tail pointer alignment
According to spec the tail pointer points to the next qword instructions
which will be used by the software.

p 1354, Doc Ref # IHD-OS-BDW-Vol 2c-11.15

issue #4254
2021-08-30 15:00:37 +02:00
Alexander Boettcher
cc2363d421 gpu/intel: report slice, subslice, eu via gpu info
used by libdrm & mesa-21 clients

issue #4254
2021-08-30 15:00:37 +02:00
Alexander Boettcher
b287c4888a gpu/intel: update context inhibit setup
issue #4254
2021-08-30 15:00:37 +02:00
Alexander Boettcher
66ac2dc635 gpu/intel: avoid one-by-off in ring buffer
during wrap.

issue #4254
2021-08-30 15:00:37 +02:00
Alexander Boettcher
6c7bcdd32e gpu/intel: add gen9 w/a for submit batch
issue #4254
2021-08-30 15:00:37 +02:00
Alexander Boettcher
b2440a72c3 gpu/intel: add more debug registers
issue #4254
2021-08-30 15:00:37 +02:00
Alexander Boettcher
8a285a7bee gpu/intel: add more debug registers
issue #4254
2021-08-30 15:00:37 +02:00
Alexander Boettcher
c9809fde67 gpu/intel: remove unused superpage scratch code
Superpages (2M, 1G) are not supported by now, but partially copied over code
from base-hw was around. Remove unused register definitions and remove
non-working super page code do avoid confusion.

issue #4254
2021-08-30 15:00:37 +02:00
Alexander Boettcher
de8327c11a gpu/intel: add more supported chips
support for Gen > 8

+ determine platform, revision and stepping

issue #4254
2021-08-30 15:00:37 +02:00
Alexander Boettcher
0aa17661cc gpu/intel: avoid overlapping ggtt range allocation
Size argument of ggtt free range check is ignored, which leads to
overlapping allocations inside, which leads to unavailable IO-MEM exceptions
thrown by core.

issue #4254
2021-08-30 15:00:37 +02:00
Sebastian Sumpf
1727de30b7 gpu/intel: free DMA, clear ggtt
* free DMA caps in case platform client's session is closed
* clear GGTT of platform client upon session close

issue #4233
2021-08-18 15:06:11 +02:00
Sebastian Sumpf
6c003a13d2 gpu/intel: add platform service for display handling
The platform services is intented to be used by dde_linux's intel_fb_drv
in order to initlialize displays.

* implement and announce platform session
* limit accessible GTT and aperture of client to 64 MB
* forward display engine IRQs to platform client
* move all PCI resources to 'Igd::Resources' class in order to make them
  accessible by the platform service and the GPU driver
* fix fence register allocation for id zero (return true)

issue #4233
2021-08-18 15:06:11 +02:00
Alexander Boettcher
11192b18e6 gpu/intel: dump status context register bits
Issue #4148 #4233
2021-08-18 15:06:11 +02:00
Alexander Boettcher
fe867765a8 gpu/intel: support multiple exec buffer per client
required for mesa-21

Issue #4148 #4233
2021-08-18 15:06:11 +02:00
Alexander Boettcher
ffc89f3edf gpu/intel: let guard page handling up to client
For mesa-21 the client takes care and manages
the virtual address space of the vGPU by itself and the intel/gpu driver
can't add silently a guard page anymore. Move the patch to the drm/ioctl
of the former mesa version.

Issue #4148 #4233
2021-08-18 15:06:11 +02:00
Alexander Boettcher
067b7d7c67 gpu/intel: deny virtual address above 1 << 48
commit avoids memory corruption in the ppgtt page insertion code

Issue #4148 #4233
2021-08-18 15:06:11 +02:00
Josef Söntgen
4b653fbac1 gpu/intel: handle double insertion in PPGTT
As the PPGTT is populated by the client, the client has to account for
guard pages and so forth.

Issue #4148 #4233
2021-08-18 15:06:11 +02:00
Josef Söntgen
7dc997c8e6 gpu/intel: handle CSB correctly
As it turns out reading both dwords as qword results in mirrored
values, DDTT.

Issue #4148 #4233
2021-08-18 15:06:11 +02:00
Alexander Boettcher
5d6ea5ef22 gpu/intel: allocate vcpu/engine as part of session
Issue #4148 #4233
2021-08-18 15:06:11 +02:00
Alexander Boettcher
a721933771 gpu/intel: move context/ring handling into objects
Issue #4148 #4233
2021-08-18 15:06:11 +02:00
Alexander Boettcher
c949e5c90d gpu/intel: remove allocator_guard
Issue #3759 #4148 #4233
2021-08-18 15:06:11 +02:00
Alexander Boettcher
243a9ec3ca gpu/intel: free up context/memory ring
_unmap_dataspace_ggtt requires the cap of Ggtt::Mapping (ring_map, ctx_map)
in order to find the right metadata and to free up the ggtt entries. Also the
pte range is removed already if the metadata was found.

Issue #4148 #4233
2021-08-18 15:06:11 +02:00
Alexander Boettcher
b3147050cc gpu/intel: add support to report finished batches
- extend gpu multiplexer to report last completed execution buffer
- on client side lookup finished buffers and disable busy state

issue #4233
2021-08-18 15:06:11 +02:00
Christian Helmuth
62f83b7198 linux_nic_drv: optionally report MAC address
Issue #4133
2021-05-28 14:16:45 +02:00
Christian Helmuth
464f0eaf8b linux_nic_drv: remove nic_server mode
Issue #4133
2021-05-28 14:16:45 +02:00
Stefan Kalkowski
7f6f710bd2 imx8mq_platform_drv: introduce reset domains
A reset domain can consist of one or several reset-pins
denoted by name that are assigned to a device.
When the device gets acquired via the Platform RPC API,
the pins are de-asserted, and asserted again when the
device gets released.

A configuration looks like the following:

  <device name="mipi_dsi>
    <reset-domain name="mipi_dsi_pclk"/>
    ...
  </device>

Fixes #4171
2021-05-28 14:16:45 +02:00
Stefan Kalkowski
ed7d6c74f4 i2c: extend API to support transactions
Introduces the notion of a transaction that consists of one or more
messages. Whereby a message has a read or write direction and consists
of one or more bytes.

Issue #4170
Fixes #4169
2021-05-28 14:16:45 +02:00
Alexander Boettcher
509e5aa776 platform(x86): report features via platform_info
Report via platform_info the capabilities of the kernel, e.g. ACPI and MSI.

With the commit the try-catch pattern on IRQ session creation by the platform
driver is avoided.

Issue #4016
2021-05-28 14:16:44 +02:00
Stefan Kalkowski
b22d9385f1 imx8mq_platform_drv: enable root clock div setting
Fixes #4155
2021-05-28 14:15:27 +02:00
Josef Söntgen
3e284558a1 drm: account for guard page
This makes the rendering issue with mesa gears disappear.

Issue #4148
2021-05-28 14:15:27 +02:00
Martin Stein
d2bf565503 nic/zynq: fix packed conversion error with gcc 10
Fixes #4142
2021-05-10 11:17:21 +02:00
Johannes Schlatow
2db94b8438 platform_drv/x86: support to disable MSI-X
+ disable for wifi driver MSI-X

Issue #4079
2021-05-05 11:35:28 +02:00
Stefan Kalkowski
421d2bed40 platform driver: make device info XML optional
* The device XML information dataspace is only provided,
  when the client's policy states `info="yes"`
* The device XM information gets changed to include the
  physical resource names (I/O memory and IRQ addresses)
  instead of virtual ids and page offset

Fix #4077
2021-05-05 11:31:16 +02:00
Norman Feske
dc8c899c1d Streamline platform-device API on ARM
This API rework eases the access to memory-mapped I/O registers and
interrupts when using the platform driver. It introduces the notions of

- Platform::Device       - one device obtained from a platform session
- Platform::Device::Mmio - locally-mapped MMIO registers of a device
- Platform::Device::Irq  - interface for receiving device interrupts

The patch touches several drivers. Some drivers would require a
significant structural change to adopt the new API (e.g., net/virtio,
dde_linux drivers, imx gpio). In these cases, the patch adds
compatibility shims meant to be temporary. In other cases (e.g., imx
i2c), the adaptation was simple enough to carry through.

Fixes #4075
2021-04-20 12:10:58 +02:00
Stefan Kalkowski
d1cf9c86b8 os: introduce device type in platform driver
* Move "compatible" property value to "type" attribute
* Turn device_by_property helper in Platform::Connection into device_by_type

Fix #4074
2021-04-20 12:10:58 +02:00
Norman Feske
e28709d54d acpi_drv: use expanding reporter
This makes the driver work on newer machines that produce reports larger
than 16 KiB. E.g., Sculpt OS boots successfully on a Lenovo P53s laptop
now.
2021-04-20 12:10:58 +02:00
Norman Feske
0339318572 platform_session: cache arg for alloc_dma_buffer
This patch extends the 'Platform_session::alloc_dma_buffer' interface
with a 'Cache' argument that corresponds to the argument accepted by
'Ram_allocator::alloc', which is used by the platform driver under the
hood.

Since the x86 platform driver used to be hardwired to allocate DMA
buffers as UNCACHED, I adjusted all drivers by specifying the UNCACHED
argument. Right now, this is needed as a hint for core to steer the
allocation of I/O page tables. Once we eliminate the need for such hints
(by introducing an explicit 'Region_map::attach_dma' operation), we can
revisit the drivers individually because cached DMA buffers should
generally be fine on the x86 architecture.

Issue #2243
2021-04-20 12:10:57 +02:00
Norman Feske
53e44f8bfd x86/platform_session: import Genode namespace
This change avoids many repetetive Genode:: prefixes, making the code
easier to read. The patch also includes a few consistency fixes
regarding include guards and file headers. It also renames
Platform_device::String to Platform_device::Device:name.

Issue #2243
2021-04-20 12:10:57 +02:00