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gpu/intel: dump more in error case
- show hardware read tail & head pointer of ring buffer issue #4254
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c5d8a43418
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@ -821,6 +821,11 @@ class Igd::Rcs_context
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_execlist_context.tail_offset(offset);
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}
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addr_t tail_offset()
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{
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return _execlist_context.tail_offset();
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}
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/*********************
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** Debug interface **
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*********************/
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@ -329,7 +329,7 @@ struct Igd::Device
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_ring.flush(from, to);
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}
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void ring_dump(size_t limit = 0) const { _ring.dump(limit); }
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void ring_dump(size_t limit, unsigned hw_tail, unsigned hw_head) const { _ring.dump(limit, hw_tail, hw_head); }
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/*********************
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** Debug interface **
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@ -891,8 +891,10 @@ struct Igd::Device
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_active_vgpu->rcs.context->dump();
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_active_vgpu->rcs.context->dump_hw_status_page();
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Execlist const &el = *_active_vgpu->rcs.execlist;
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el.ring_dump(52);
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Execlist &el = *_active_vgpu->rcs.execlist;
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el.ring_update_head(_active_vgpu->rcs.context->head_offset());
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el.ring_dump(4096, _active_vgpu->rcs.context->tail_offset() * 2,
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_active_vgpu->rcs.context->head_offset());
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_device_reset_and_init();
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@ -186,19 +186,23 @@ class Igd::Ring_buffer
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** Debug interface **
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*********************/
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void dump(size_t dw_limit = 0) const
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void dump(size_t dw_limit, unsigned const hw_tail, unsigned const hw_head) const
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{
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using namespace Genode;
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size_t const max = dw_limit ? dw_limit : _max;
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log("Ring_buffer: ", Hex(*_dwords), " max: ", _max, " (limit: ", max, ")");
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log("Ring_buffer: ", Hex(*_dwords), " max: ", _max, " (limit: ", max, ")",
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" hardware read: tail=", Genode::Hex(hw_tail),
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" head=", Genode::Hex(hw_head));
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for (size_t i = 0; i < max; i++) {
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log(Hex(i*4, Hex::PREFIX, Hex::PAD), " ",
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Hex(_dwords[i], Hex::PREFIX, Hex::PAD),
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i == _tail ? " T " : " ",
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i == _head ? " H " : " "
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i == _head ? " H " : " ",
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i == hw_tail ? " T_HW " : " ",
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i == hw_head ? " H_HW " : " "
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);
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}
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}
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