Enable DEBUG_BUGVERBOSE by default on qualcommax as without it once BUG()
is called we will not get any output other than
"------------[ cut here ]------------"
which is not usefull at all, so since we dont have kernel size constraints
lets enable it by default.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add node to support the QUP4 SPI controller inside of IPQ8074.
Some devices use this bus to communicate to a Bluetooth controller.
Signed-off-by: Robert Marko <robimarko@gmail.com>
[port 8ed390a (qualcommax: set correct PHY mode for port 0-4) to ipq60xx]
Port 0-4 have the mode set to SGMII instead of PSGMII. Now that we use
he upstream qca807x driver, this conflicts with the qca SSDK driver
that expects the mode to be PSGMII as for not integrated driver, it does
refer to the real PHY mode.
Update the entry for port 0-4 to PSGMII to solve warning from qca SSDK
in ipq6018-ess.dtsi.
Signed-off-by: Mantas Pucka <mantas@8devices.com>
UNIPHY2 on the WAX630 is connected to a QCA8081 PHY which is only 2.5G and
it does not support using USXGMII at all but rather only SGMII or SGMII+.
Tested-by: Kristian Skramstad <kristian+github@83.no>
Signed-off-by: Robert Marko <robimarko@gmail.com>
Interfaces that have AQR-s attached to them are using USXGMII and not just
the default SGMII.
This was fine until SSDK added some sanity checking and now on Qnap 301W it
would fail with:
[ 24.740197] nss-dp 3a001800.dp5 10g-1 (uninitialized): failed to connect to phy device
[ 24.740264] nss-dp: probe of 3a001800.dp5 failed with error -14
Since this is not Qnap 301W specific lets fix it subtarget wide by
declaring the correct PHY mode for 10G AQR-s.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Interfaces that have AQR-s attached to them are using USXGMII and not just
the default SGMII.
This was fine until SSDK added some sanity checking and now on Qnap 301W it
would fail with:
[ 24.740197] nss-dp 3a001800.dp5 10g-1 (uninitialized): failed to connect to phy device
[ 24.740264] nss-dp: probe of 3a001800.dp5 failed with error -14
So, lets fix 10G AQR ports by declaring the correct PHY mode.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Since we can configure the PHY LED of the qca8081,
add a configuration for this device.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Reviewed-by: Robert Marko <robimarko@gmail.com>
The dts of Arcadyan AW1000 forgot to convert qca807x PHY
to PHY package implementation. This commit fix it.
Fixes: 0ab4b92 ("qualcommax: convert qca807x PHY to PHY package implementation")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Reviewed-by: Robert Marko <robimarko@gmail.com>
Convert qca807x PHY to new implementation like for other devices.
Signed-off-by: Paweł Owoc <frut3k7@gmail.com>
Reviewed-by: Robert Marko <robimarko@gmail.com>
Now that Malibu (QCA807x) PHY is using the upstream driver, we dont need
support to define address of the first PHY in package, so remove the
malibu_first_phy_addr DTS property.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Xiaomi AX9000 apply a special PHY LEDs configuration where the unique
green LED for each qca807x PHY port is turned on also on 1000Mbps link.
Apply this special configuration to reflect original implementation.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Xiaomi AX3600 apply a special PHY LEDs configuration where the unique
green LED for each qca807x PHY port is turned on also on 1000Mbps link.
Apply this special configuration to reflect original implementation.
Also enable CONFIG_PHYLIB_LEDS to actually expose the PHY LEDs if
defined in DT.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Convert every qca807x PHY definition in DT to new PHY package
implementation to correctly support applying fixup for the correct PHY
mode.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Port 0-4 have the mode set to SGMII instead of PSGMII. Now that we use
the upstream qca807x driver, this conflicts with the qca SSDK driver
that expects the mode to be PSGMII as for not integrated driver, it does
refer to the real PHY mode.
Update the entry for port 0-4 to PSGMII to solve warning from qca SSDK
in ipq8074-ess.dtsi.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
IPQ807x have integrated qca8074 PHY supported by the upstream qca807x driver.
Enable it to use it instead of the downstream qca SSDK variant.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Commit d737ae99cb ("qualcommax: Fix Buffalo WXR-5950AX12 Ethernet
DTS") reverted the switch bmp to the original OEM definition and
added the malibu_first_phy_addr property.
Problem is that OEM bmp definition is wrong and actually doesn't make sense,
probably caused by copy-paste of the QCOM reference DTS without actually
setting real values. What actually fixed the regression was adding the
malibu_first_phy_addr as without it the MALIBU PHY was actually not
correctly configured and the Aquantia PHY were actually configured as
MALIBU PHY.
Fix all these wrong PHY definition.
The BPM is reverted and the following fixes are applied:
- Drop ESS_PORT1 as it's not actually attached in HW.
- Move ESS_PORT5 AGAIN from lan to wan. This refer to the first Aquantia
PHY that is labelled "wan"
- Move ESS_PORT6 AGAIN from wan to lan. This refer to the second
Aquantia PHY that is labelled "lan1".
Also PHY tag in MDIO node are renumbered to start from 0 following the
tagging standard used also in other dts and the not attached one (reg
0x18 and reg 0x1c) are correctly dropped.
Definition for port@1 in phyinfo is dropped as it doesn't exist.
dp nodes are updated to reference the new PHY tag numbering.
Fixes: d737ae99cb ("qualcommax: Fix Buffalo WXR-5950AX12 Ethernet DTS")
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Refresh kernel patches changed from the just introduced ipq60xx new
subtarget.
Patch automatically refreshed with make target/linux/refresh.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
These recipes are generic and will be used for other subtargets, so lets
move them to the target Makefile so they can reused.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Introduce support for the Qualcomm IPQ60xx SoC. WiFi support still has
to be handled and correctly fix hence this is currently marked as
source-only to have a solid base to progress on correct support of this
and hope Upstream QUIC publish newers ath11k drivers for this SoC.
Co-developed-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Mantas Pucka <mantas@8devices.com>
[ improve commit description, add SoB for Robert, make it source-only ]
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Initial conversion to new LED color/function format
and drop label format where possible. The same label
is composed at runtime.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Drop redundant label with new LED color/function format declared.
This was needed previously when the new format wasn't supported by
leds.sh functions script. Now that is supported this property
can be removed in favor of the new format.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
CONFIG_PHYLIB_LEDS is required in order for phylib to probe the DT for LEDs
attached to PHY-s.
Fixes: 75ad5c2 ("qualcommax: switch to qca8081 upstream PHY driver")
Signed-off-by: Robert Marko <robimarko@gmail.com>
The qca8081 phy needs to set the reset delay time,
otherwise it will not be detected by the mdio bus.
Fixes: 75ad5c2 ("qualcommax: switch to qca8081 upstream PHY driver")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Switch to qca8081 upstream PHY. Update every device that have LEDs
attached to the qca8081 PHY to follow new way of defining the LEDs and
add original OEM configuration.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
In order to get rid of having to modify U-boot bootcmd and having U-boot
load the Aquantia PHY-s firmware lets use some of the free space on SPI-NOR
to add a second ethphyfw partition and be able to load AQR FW via NVMEM
cells.
Signed-off-by: Robert Marko <robimarko@gmail.com>
It seems that the reset GPIO-s defined for the two AQR PHY-s are actually
reversed.
Manually testing confirmed that GPIO44 is actually reset GPIO of AQR at 0,
while GPIO59 is reset of AQR at 8:
root@OpenWrt:~# mdio 9*
DEV PHY-ID LINK
0x00 0x00000000 down
0x08 0x00000000 down
0x10 0x004dd0b1 down
0x11 0x004dd0b1 down
0x12 0x004dd0b1 down
0x13 0x004dd0b1 up
0x14 0x004dd0b1 down
0x15 0x04820a05 down
root@OpenWrt:~# gpioset gpiochip0 44=0
root@OpenWrt:~# mdio 9*
DEV PHY-ID LINK
0x08 0x00000000 down
0x10 0x004dd0b1 down
0x11 0x004dd0b1 down
0x12 0x004dd0b1 down
0x13 0x004dd0b1 up
0x14 0x004dd0b1 down
0x15 0x04820a05 down
root@OpenWrt:~# gpioset gpiochip0 44=1
root@OpenWrt:~# mdio 9*
DEV PHY-ID LINK
0x00 0x00000000 down
0x08 0x00000000 down
0x10 0x004dd0b1 down
0x11 0x004dd0b1 down
0x12 0x004dd0b1 down
0x13 0x004dd0b1 up
0x14 0x004dd0b1 down
0x15 0x04820a05 down
root@OpenWrt:~# gpioset gpiochip0 59=0
root@OpenWrt:~# mdio 9*
DEV PHY-ID LINK
0x00 0x00000000 down
0x10 0x004dd0b1 down
0x11 0x004dd0b1 down
0x12 0x004dd0b1 down
0x13 0x004dd0b1 up
0x14 0x004dd0b1 down
0x15 0x04820a05 down
root@OpenWrt:~# gpioset gpiochip0 59=1
root@OpenWrt:~# mdio 9*
DEV PHY-ID LINK
0x00 0x00000000 down
0x08 0x00000000 down
0x10 0x004dd0b1 down
0x11 0x004dd0b1 down
0x12 0x004dd0b1 down
0x13 0x004dd0b1 up
0x14 0x004dd0b1 down
0x15 0x04820a05 down
Signed-off-by: Robert Marko <robimarko@gmail.com>
Now that we have support for firmware loading via the kernel driver, it
makes sense to populate the firmware name as well, so if its present the
driver can load it.
In later patches, loading the FW via NVMEM will be added as well.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add support for loading Aquantia FW from NVMEM for Zyxel NBG7815
restoring correct functionality of the 10g port.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
By default Linux will default to most IRQ-s being mapped to core 0 which
during high loads will completely swamp the core 0, so lets add the widely
used script that has been floating around forums for a long time to try and
optimize the IRQ mapping a bit.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Enable LED driver LP5562 on HAZE device tree and include its kernel
module package on default package for HAZE.
Signed-off-by: CheWei Chien <chewei.chien@wnc.com.tw>
Some devices (MX42CF) have a wrong MAC address configuration. The correct one is located only on the devinfo partition.
Signed-off-by: Paweł Owoc <frut3k7@gmail.com>
Currently, WiFi interfaces on WXR-5950AX12 / WXR-6000AX12 devices
come up with some MAC addresses inconsistent with vendor and Ethernet
addresses. This adds a hotplug override in order to make it consistent
with what is in u-boot env as well as OAM firmware where 1st radio MAC
is set at Ethernet MAC + 8, and 2nd radio mac at Ethernet MAC + 16.
fw_printenv | grep addr
ethaddr=68:e1:dc:xx:xx:d8
ipaddr=192.168.11.1
wlan0addr=68:e1:dc:xx:xx:e0
wlan1addr=68:e1:dc:xx:xx:e8
wlan2addr=00:00:00:00:00:00
For OEM bootlog and MAC assagnment check
https://openwrt.org/toh/buffalo/wxr-5950ax12#openwrt_uimage_tftp_bootlog
Tested-by: Samir Ibradžić <sibradzic@gmail.com> # Buffalo WXR-6000AX12P
Signed-off-by: Samir Ibradžić <sibradzic@gmail.com>
Linksys MX4200 is a 802.11ax Tri-band router/AP.
Specifications:
* CPU: Qualcomm IPQ8174 Quad core Cortex-A53 1.4GHz
* RAM: 512MB of DDR3
* Storage: 512Mb NAND
* Ethernet: 4x1G RJ45 ports (QCA8075)
* WLAN:
* 2.4GHz: Qualcomm QCN5024 2x2 802.11b/g/n/ax 574 Mbps PHY rate
* 5GHz: Qualcomm QCN5054 2x2@80MHz or 2x2@160MHz 802.11a/b/g/n/ac/ax 2402 PHY rate
* 5GHz: Qualcomm QCN5054 4x4@80MHz or 2x2@160MHz 802.11a/b/g/n/ac/ax 2402 PHY rate
* LED-s:
* RGB system led
* Buttons: 1x Soft reset 1x WPS
* Power: 12V DC Jack
Installation instructions:
Open Linksys Web UI - http://192.168.1.1/ca or http://10.65.1.1/ca depending on your setup.
Login with your admin password. The default password can be found on a sticker under the device.
To enter into the support mode, click on the “CA” link and the bottom of the page.
Open the “Connectivity” menu and upload the squash-factory image with the “Choose file” button.
Click start. Ignore all the prompts and warnings by click “yes” in all the popups.
The Wifi radios are turned off by default. To configure the router, you will need to connect your computer to the LAN port of the device.
Then you would need to write openwrt to the other partition for it to work
- First Check booted partition
fw_printenv -n boot_part
- Then install Openwrt to the other partition if booted in slot 1:
mtd -r -e alt_kernel -n write openwrt-qualcommax-ipq807x-linksys_mx4200v(X)-squashfs-factory.bin alt_kernel
- If in slot 2:
mtd -r -e kernel -n write openwrt-qualcommax-ipq807x-linksys_mx4200v(X)-squashfs-factory.bin kernel
Replace (X) with your model version either 1 or 2
Signed-off-by: Mohammad Sayful Islam <sayf.mohammad01@gmail.com>
Reviewed-by: Robert Marko <robimarko@gmail.com>
`ok` status is obsolete and thus `okay` should be used instead:
spi@78b9000: status:0: 'ok' is not one of ['okay', 'disabled', 'reserved']
Signed-off-by: Petr Štetiar <ynezz@true.cz>
* Revert the switch_lan_bmp and switch_wan_bmp to match the values from
the original device support DTS
* Add specific malibu_first_phy_addr, as it differs from default for
this device
Fixes: #14234
Reviewed-by: Robert Marko <robimarko@gmail.com>
Tested-by: Samir Ibradžić <sibradzic@gmail.com> # Buffalo WXR-6000AX12P
Signed-off-by: Samir Ibradžić <sibradzic@gmail.com>
Hardware specifications:
SoC: Qualcomm IPQ8071A
RAM: 512MB of DDR3
Flash1: Eon EN25S64 8MB
Flash2: MX30UF2G18AC 256MB
Ethernet: 2x 2.5G RJ45 port
Phone: 1x RJ11 port (SPI)
USB: 1x Type-C 2.0 port
WiFi1: QCN5024 2.4GHz
WiFi2: QCN5054 5GHz
Button: Reset, WPS
Flash instructions:
1. Connect the router via serial port (115200 8N1 1.8V)
2. Download the initramfs image, rename it to initramfs.bin,
and host it with the tftp server.
3. Interrupt U-Boot and run these commands:
tftpboot initramfs.bin
bootm
4. After openwrt boots up, use scp or luci web
to upload sysupgrade.bin to upgrade.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Reviewed-by: Robert Marko <robimarko@gmail.com>
We have a report in the forum, that lan/wan is non-functional
on the EAP102 (https://forum.openwrt.org/t/edgecore-eap102/178449)
Fixing that by swapping label and phy-handle of the dp-nodes and
updating the lan/wan bmp.
Note: the original commiter of the device support seems absent for a
long time in the forum and on the OpenWrt github group.
Tested-by: Antonio Della Selva <antonio.dellaselva@uniurb.it>
Signed-off-by: Dirk Buchwalder <buchwalder@posteo.de>
Reviewed-by: Robert Marko <robimarko@gmail.com>
Hardware specification:
SoC: Qualcomm IPQ8072A
Flash: Toshiba NAND 1GiB
RAM: 1 GiB of DDR3 466 MHz
Ethernet: 4x 1Gbps + 1x 2.5Gbps
WiFi1: QCN5024 2.4GHz ax 4x4
WiFi2: QCN5054 5GHz ax 4x4
Button: WiFi, WPS, Reset
Modem: RG500Q-EA
USB: 1 x USB 3.0
Power: DC 12V 4A
Flash instructions:
1. Download the initramfs image, rename it to
initramfs.bin, and host it with tftp server.
2. Interrupt U-Boot and run these commands:
tftpboot initramfs.bin
bootm
3. After openwrt boots up, use scp or luci web
to upload sysupgrade.bin to upgrade.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Reviewed-by: Robert Marko <robimarko@gmail.com>
Replace blanks with tabs, also sort base-files alphabetically.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Reviewed-by: Robert Marko <robimarko@gmail.com>
