Xianjun Jiao 75d924e0e8 Remove unnecessary reg code in tx_intf.c		2023-01-17 13:49:50 +01:00
..
ad9361	Driver changes for FPGA SPI Tx LO control	2022-03-29 09:56:20 +02:00
openofdm_rx	Add OPENWIFI_MIN_SIGNAL_LEN_TH 14 to set min pkt length threshold for FPGA signal watchdog	2023-01-17 13:14:59 +01:00
openofdm_tx	Update openofdm_tx.c	2021-02-03 15:38:47 +01:00
rx_intf	Remove the reg 3 init in rx_intf.c:	2022-05-13 16:48:30 +02:00
side_ch	Scripts are adapted for SW HW decouple	2021-10-20 22:50:30 +02:00
tx_intf	Remove unnecessary reg code in tx_intf.c	2023-01-17 13:49:50 +01:00
xilinx_dma	Scripts are adapted for SW HW decouple	2021-10-20 22:50:30 +02:00
xpu	Refactor initial all open slice setup in xpu.c	2023-01-17 13:48:08 +01:00
hw_def.h	Refactor according to ...	2023-01-17 13:31:10 +01:00
make_all.sh	Add conditional compiling for driver:	2022-05-13 16:57:39 +02:00
Makefile	prepare upgrade	2020-04-27 09:37:04 +02:00
sdr.c	Though the SIFS definition in 2.4GHz is 10us, the actual gap is still 16us:	2023-01-17 13:30:58 +01:00
sdr.h	Format sdr.h	2023-01-17 13:31:10 +01:00
sdrctl_intf.c	Easier way to set arbitrary trx frequency via register rf 1 and 5:	2022-03-30 11:36:36 +02:00
sysfs_intf.c	Example of how to add debug channel via sysfs and access it via script --> driver	2022-03-29 15:18:55 +02:00