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Some xpu registers are removed
This commit is contained in:
Xianjun Jiao 2023-01-17 13:22:17 +01:00
parent d4c3d8108e
commit 6c6cf95190
1 changed files with 8 additions and 23 deletions
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31
driver/hw_def.h
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@ -304,18 +304,18 @@ const char *xpu_compatible_str = "sdr,xpu";
#define XPU_REG_RSSI_DB_CFG_ADDR (7*4)
#define XPU_REG_LBT_TH_ADDR (8*4)
#define XPU_REG_CSMA_DEBUG_ADDR (9*4)
#define XPU_REG_BB_RF_DELAY_ADDR (10*4)
#define XPU_REG_BB_RF_DELAY_ADDR (10*4)
#define XPU_REG_ACK_CTL_MAX_NUM_RETRANS_ADDR (11*4)
#define XPU_REG_AMPDU_ACTION_ADDR (12*4)
#define XPU_REG_SPI_DISABLE_ADDR (13*4)
#define XPU_REG_AMPDU_ACTION_ADDR (12*4)
#define XPU_REG_SPI_DISABLE_ADDR (13*4)
#define XPU_REG_RECV_ACK_COUNT_TOP0_ADDR (16*4)
#define XPU_REG_RECV_ACK_COUNT_TOP1_ADDR (17*4)
#define XPU_REG_SEND_ACK_WAIT_TOP_ADDR (18*4)
#define XPU_REG_CSMA_CFG_ADDR (19*4)
#define XPU_REG_SLICE_COUNT_TOTAL_ADDR (20*4)
#define XPU_REG_SLICE_COUNT_START_ADDR (21*4)
#define XPU_REG_SLICE_COUNT_END_ADDR (22*4)
#define XPU_REG_SLICE_COUNT_TOTAL_ADDR (20*4)
#define XPU_REG_SLICE_COUNT_START_ADDR (21*4)
#define XPU_REG_SLICE_COUNT_END_ADDR (22*4)
#define XPU_REG_CTS_TO_RTS_CONFIG_ADDR (26*4)
#define XPU_REG_FILTER_FLAG_ADDR (27*4)
@ -324,26 +324,11 @@ const char *xpu_compatible_str = "sdr,xpu";
#define XPU_REG_MAC_ADDR_LOW_ADDR (30*4)
#define XPU_REG_MAC_ADDR_HIGH_ADDR (31*4)
#define XPU_REG_FC_DI_ADDR (34*4)
#define XPU_REG_ADDR1_LOW_ADDR (35*4)
#define XPU_REG_ADDR1_HIGH_ADDR (36*4)
#define XPU_REG_ADDR2_LOW_ADDR (37*4)
#define XPU_REG_ADDR2_HIGH_ADDR (38*4)
#define XPU_REG_ADDR3_LOW_ADDR (39*4)
#define XPU_REG_ADDR3_HIGH_ADDR (40*4)
#define XPU_REG_SC_LOW_ADDR (41*4)
#define XPU_REG_ADDR4_HIGH_ADDR (42*4)
#define XPU_REG_ADDR4_LOW_ADDR (43*4)
#define XPU_REG_TRX_STATUS_ADDR (50*4)
#define XPU_REG_TX_RESULT_ADDR (51*4)
#define XPU_REG_TSF_RUNTIME_VAL_LOW_ADDR (58*4)
#define XPU_REG_TSF_RUNTIME_VAL_HIGH_ADDR (59*4)
#define XPU_REG_RSSI_HALF_DB_ADDR (60*4)
#define XPU_REG_IQ_RSSI_HALF_DB_ADDR (61*4)
#define XPU_REG_MAC_ADDR_READ_BACK_ADDR (62*4)
#define XPU_REG_FPGA_GIT_REV_ADDR (63*4)
enum xpu_mode {
XPU_TEST = 0,