Commit Graph

110 Commits

Author SHA1 Message Date
Norman Feske
5a6c4d6ff2 base-hw: handle cap-slab exhaust in Thread::start
This interim solution for issue #5256 solves the problem for the
thread.run script.

Issue #5256
2024-07-02 11:59:16 +02:00
Stefan Kalkowski
e93f5fe8e0 base-hw: move imx53-specifics to imx repository
Ref genodelabs/genode#5252
2024-06-20 13:25:06 +02:00
Benjamin Lamowski
3a88d133ed hw: generalize virtualization memory
The initial vCPU memory was written for AMD's SVM.

Make the vCPU memory provider virtualization technology agnostic.

Issue #5113
2024-05-29 08:37:07 +02:00
Benjamin Lamowski
8540b4c9d1 hw: rename Vm_data to Vcpu_data
Rename Vm_data to Vcpu_data to make it clear that the allocated data is
per vCPU, not per VM.

Issue #5100
2024-02-26 08:31:05 +01:00
Benjamin Lamowski
69b76ba9ed hw: move physical VMCB address out of the VMCB
The physical address of the memory used for the guest VMCB is already
present in Vcpu_data. Use the information there instead of storing the
physical address in the host data area, thereby freeing up 8 bytes for
a bigger Mmio class.

Issue #4081
2024-02-26 08:31:05 +01:00
Christian Prochaska
aea90dc7da hw: fix vmm_arm test on arm_v8a
Fixes #4975 regression
2023-10-04 13:22:08 +02:00
Benjamin Lamowski
0e49149a46 base-hw: rename Vm_state to Vcpu_state
Make naming across architectures coherent by renaming Vm_state to
Vcpu_state, to reflect that it contains the state of a Vcpu and not that
of an entire VM.

Ref #4968
2023-10-04 13:22:07 +02:00
Benjamin Lamowski
5abd2dddb8 tz_vmm: port to new VMM library API
Ref #4968
2023-10-04 13:22:05 +02:00
Benjamin Lamowski
9489bf41a5 base-hw: port to new VMM library API
Ref #4968
2023-10-04 13:22:03 +02:00
Benjamin Lamowski
e882ca748d base-hw: virt: implement support for SVM
Ref #4826
2023-05-30 12:13:34 +02:00
Benjamin Lamowski
1e3836f8b5 base-hw: pass generic Vm_data structure to the kernel object
This enables passing additional data structures to the kernel on x86.

Ref #4826
2023-05-30 12:13:34 +02:00
Benjamin Lamowski
fa6e819f9a base-hw: x86: use Vcpu_state as Vm_state
Ref #4826
2023-05-30 12:13:33 +02:00
Benjamin Lamowski
6ca7119267 base-hw: copy virtualization structure for x86_64
Ref #4826
2023-05-30 12:13:33 +02:00
Alexander Boettcher
df27cc87b5 hw/x86: add suspend kernel syscall
using the ACPI mechanism. The syscall can be triggered solely via core's
RPC managing_system call.

Issue #4669
2023-02-27 08:22:50 +01:00
Josef Söntgen
66fd027b96 base-hw: introduce 'cache_line_size' call
This call is used to query the cache line size of the underlying CPU.
For now it is only implemented and used by 'arm_v8' platforms.

It does not distinguish between D-/I-cache sizes and always uses the
smallest size. Furthermore it does not account for any discrepancy
in 'big.little' CPUs.

Issue #4339.
2023-01-24 12:07:29 +01:00
Stefan Kalkowski
b5b958c276 hw: unify architectural kernel interface header
Fix genodelabs/genode#4345
2022-02-28 11:45:18 +01:00
Norman Feske
ab0cba8ead base-hw: improve comments in kernel/interface.h 2022-02-15 10:10:02 +01:00
Norman Feske
03047009b1 base: avoid implicit conversions
This patch is a prerequisite for compiling the code with
the warnings -Wconversion enabled.

Issue #23
2021-12-17 15:04:44 +01:00
Martin Stein
b922dc5c10 base-hw: fix self-include in kernel/types.h
That this header apparently used to include itself didn't cause any problems
so far but still remained bad style.

Ref #4217
2021-10-13 14:46:52 +02:00
Stefan Kalkowski
e7067050be base: extend cache maintainance functionality
Introduce two new cache maintainance functions:
* cache_clean_invalidate_data
* cache_invalidate_data
used to flush or invalidate data-cache lines.

Both functions are typically empty, accept for the ARM architecture.
The commit provides implementations for the base-hw kernel, and Fiasco.OC.

Fixes #4207
2021-06-25 11:43:41 +02:00
Sebastian Sumpf
ccd9ba4161 riscv: move CPU header from base-hw to base
issue #4021
2021-02-23 12:07:16 +01:00
Sebastian Sumpf
fd0e6685fc riscv: Use Qemu and update to ISA v1.10
- remove Spike/BBL support in favour of Qemu (>=4.2.1)
- add 'riscv_qemu' board, remove 'spike' board'
- update to privileged ISA v1.10 (from v1.9.1)
- use direct system calls for privileged core threads (they call into
  the kernel and don't use mode changing system calls, i.e. 'ecall',
  semantics)
- use 'OpenSBI' semtantics for SBI calls (to machine mode) instead of
  BBL

issue #4012
2021-02-23 12:02:44 +01:00
Norman Feske
493924a35e base-hw: coding style
Improve consistency with the other base repositories, in particular

- Indentation of class initializers
- Vertical whitespace around control-flow statements
- Preferably place control-flow statements (return, break, continue) at
  beginning of a line
- Placing the opening brace of a namespace at the end of line
- Placing the opening brace of a class at a new line
- Removing superfluous braces around single statements
- Two empty lines between methods/functions in implementation files
2021-02-23 12:02:41 +01:00
Norman Feske
8cc2662aac Remove support for the Muen separation kernel
Fixes #3995
Fixes #3994
2021-02-23 11:55:44 +01:00
Norman Feske
f57519397b Remove Pd_session::Native_pd definition from API
This type can be a forward declaration in the public API because its
definition is required only in kernel-specific code.

Fixes #3979
2021-01-25 12:51:54 +01:00
Stefan Kalkowski
7298b00013 base-hw: make ARMv7/v8 hypervisor smp ready
* Introduce hypervisor-stack per CPU
* Introduce host world context per CPU
* Mark EL2 translation table memory as inner shareable
* The VMID is not bound to a single VCPU, but to the Vm_session as a whole
* Set affinity of the VCPU accordingly
* Add VMPIDR to VM state

Ref #3926
2020-11-23 12:02:58 +01:00
Stefan Kalkowski
1d826a2c48 base-hw: do direct syscall when run/pause a VCPU
Instead of calling core to run/pause a VCPU, go directly to the kernel.
Apart from the performance win, it would otherwise involve a more complex
protocol, when a VCPU on another core has to be removed from the scheduler.
Core's entrypoint handling those request runs on the boot-cpu only.

Ref #3926
2020-11-23 12:02:58 +01:00
Stefan Kalkowski
941e918b46 vmm: unify armv7/v8 virtualization
Fix #3638
2020-04-17 12:52:02 +02:00
Norman Feske
0f3ac4cb9f base-hw: let upgrade_cap_slab reflect Out_of_caps
This patch reflects the Out_of_caps exception from core to the client,
in addition to the already covered Out_of_ram exception. It thereby
eliminates a potential abort in core, which I observed with the
tool_chain_auto.run script:

  Kernel: RPC upgrade_cap_slab
  Error: Uncaught exception of type 'Genode::Quota_guard<Genode::Cap_quota>::Limit_exceeded'
  Warning: abort called - thread: entrypoint

In addition to propagating the exception, the patch add the client-side
exception-handling code to the base library.

Fixes #3703
2020-03-26 11:38:59 +01:00
Stefan Kalkowski
6d48b5484d hw: correct the ARM cache maintainance operations
This commit fixes the following issues regarding cache maintainance
under ARM:

* read out I-, and D-cache line size at runtime and use the correct one
* remove 'update_data_region' call from unprivileged syscalls
* rename 'update_instr_region' syscall to 'cache_coherent_region' to
  reflect what it doing, namely make I-, and D-cache coherent
* restrict 'cache_coherent_region' syscall to one page at a time
* lookup the region given in a 'cache_coherent_region' syscall in the
  page-table of the PD to prevent machine exceptions in the kernel
* only clean D-cache lines, do not invalidate them when pages where
  added on Cortex-A8 and ARMv6 (MMU sees phys. memory here)
* remove unused code relicts of cache maintainance

In addition it introduces per architecture memory clearance functions
used by core, when preparing new dataspaces. Thereby, it optimizes:

* on ARMv7 using per-word assignments
* on ARMv8 using cacheline zeroing
* on x86_64 using 'rept stosq' assembler instruction

Fix #3685
2020-03-26 11:38:55 +01:00
Stefan Kalkowski
af29dcf557 hw: introduce virtualization support for ARMv8
Ref #3553
2019-11-21 14:29:36 +01:00
Stefan Kalkowski
90d07741aa hw: support for ARM64 Raspberry Pi 3
Restriction: enables only cpu core 0 and the timer interrupt by now.

Fix #3405
2019-07-09 08:55:22 +02:00
Stefan Kalkowski
13fb51eecf hw: remove implicit SoC-specific include path
Fix #3336
2019-05-16 13:11:02 +02:00
Stefan Kalkowski
8f28f884ee hw: name vm_state header explicitely
Ref #3251
2019-04-01 19:33:49 +02:00
Stefan Kalkowski
330692350e hw: introduce non-blocking signal checking
* Introduces pending_signal syscall to check for new signals for the
  calling thread without blocking
* Implements pending_signal in the base-library specific for hw to use the
  new syscall

Fix #3217
2019-03-18 15:56:24 +01:00
Stefan Kalkowski
80fa23da5e hw: increase timing accuracy of kernel (fix #3081)
* Introduce 64-bit tick counter
* Let the timer always count when possible, also if it already fired
* Simplify the kernel syscall API to have one current time call,
  which returns the elapsed microseconds since boot
2019-03-18 15:56:23 +01:00
Alexander Boettcher
0c24e1efdc vm_session: extensions
- support to create multiple vCPUs
- support to implement Vm_session methods client side within base library
- adjust muen specific virtualbox4 version to compile/link

Issue #3111
2019-02-19 11:08:17 +01:00
Alexander Boettcher
9a2bdf8798 vm_session: move from base-hw to base
Issue #3111
2019-01-30 13:35:28 +01:00
Stefan Kalkowski
d7fa4cfb8b hw: enable eager FPU context switch for ARM
* Add an ieee754 FPU test
* Remove simple fpu test

Fix #2822
2018-11-29 11:54:31 +01:00
Reto Buerki
810f59b555 muen: Update sinfo to variant resources API 2018-04-19 12:38:25 +02:00
Norman Feske
eba9c15746 Follow practices suggested by "Effective C++"
The patch adjust the code of the base, base-<kernel>, and os repository.
To adapt existing components to fix violations of the best practices
suggested by "Effective C++" as reported by the -Weffc++ compiler
argument. The changes follow the patterns outlined below:

* A class with virtual functions can no longer publicly inherit base
  classed without a vtable. The inherited object may either be moved
  to a member variable, or inherited privately. The latter would be
  used for classes that inherit 'List::Element' or 'Avl_node'. In order
  to enable the 'List' and 'Avl_tree' to access the meta data, the
  'List' must become a friend.

* Instead of adding a virtual destructor to abstract base classes,
  we inherit the new 'Interface' class, which contains a virtual
  destructor. This way, single-line abstract base classes can stay
  as compact as they are now. The 'Interface' utility resides in
  base/include/util/interface.h.

* With the new warnings enabled, all member variables must be explicitly
  initialized. Basic types may be initialized with '='. All other types
  are initialized with braces '{ ... }' or as class initializers. If
  basic types and non-basic types appear in a row, it is nice to only
  use the brace syntax (also for basic types) and align the braces.

* If a class contains pointers as members, it must now also provide a
  copy constructor and assignment operator. In the most cases, one
  would make them private, effectively disallowing the objects to be
  copied. Unfortunately, this warning cannot be fixed be inheriting
  our existing 'Noncopyable' class (the compiler fails to detect that
  the inheriting class cannot be copied and still gives the error).
  For now, we have to manually add declarations for both the copy
  constructor and assignment operator as private class members. Those
  declarations should be prepended with a comment like this:

        /*
         * Noncopyable
         */
        Thread(Thread const &);
        Thread &operator = (Thread const &);

  In the future, we should revisit these places and try to replace
  the pointers with references. In the presence of at least one
  reference member, the compiler would no longer implicitly generate
  a copy constructor. So we could remove the manual declaration.

Issue #465
2018-01-17 12:14:35 +01:00
Stefan Kalkowski
a004462096 hw: fix capability accounting of kernel/core
The recently implemented capability resource trading scheme unfortunately
broke the automated capability memory upgrade mechanism needed by base-hw
kernel/core. This commit splits the capability memory upgrade mechanism
from the PD session ram_quota upgrade, and moves that functionality
into a separate Pd_session::Native_pd interface.

Ref #2398
2017-06-19 12:35:55 +02:00
Martin Stein
c70fed29f7 os/timer: interpolate time via timestamps
Previously, the Genode::Timer::curr_time always used the
Timer_session::elapsed_ms RPC as back end.  Now, Genode::Timer reads
this remote time only in a periodic fashion independently from the calls
to Genode::Timer::curr_time. If now one calls Genode::Timer::curr_time,
the function takes the last read remote time value and adapts it using
the timestamp difference since the remote-time read. The conversion
factor from timestamps to time is estimated on every remote-time read
using the last read remote-time value and the timestamp difference since
the last remote time read.

This commit also re-works the timeout test. The test now has two stages.
In the first stage, it tests fast polling of the
Genode::Timer::curr_time. This stage checks the error between locally
interpolated and timer-driver time as well as wether the locally
interpolated time is monotone and sufficiently homogeneous. In the
second stage several periodic and one-shot timeouts are scheduled at
once. This stage checks if the timeouts trigger sufficiently precise.

This commit adds the new Kernel::time syscall to base-hw. The syscall is
solely used by the Genode::Timer on base-hw as substitute for the
timestamp. This is because on ARM, the timestamp function uses the ARM
performance counter that stops counting when the WFI (wait for
interrupt) instruction is active. This instruction, however is used by
the base-hw idle contexts that get active when no user thread needs to
be scheduled.  Thus, the ARM performance counter is not a good choice for
time interpolation and we use the kernel internal time instead.

With this commit, the timeout library becomes a basic library. That means
that it is linked against the LDSO which then provides it to the program it
serves. Furthermore, you can't use the timeout library anymore without the
LDSO because through the kernel-dependent LDSO make-files we can achieve a
kernel-dependent timeout implementation.

This commit introduces a structured Duration type that shall successively
replace the use of Microseconds, Milliseconds, and integer types for duration
values.

Open issues:

* The timeout test fails on Raspberry PI because of precision errors in the
  first stage. However, this does not render the framework unusable in general
  on the RPI but merely is an issue when speaking of microseconds precision.

* If we run on ARM with another Kernel than HW the timestamp speed may
  continuously vary from almost 0 up to CPU speed. The Timer, however,
  only uses interpolation if the timestamp speed remained stable (12.5%
  tolerance) for at least 3 observation periods. Currently, one period is
  100ms, so its 300ms. As long as this is not the case,
  Timer_session::elapsed_ms is called instead.

  Anyway, it might happen that the CPU load was stable for some time so
  interpolation becomes active and now the timestamp speed drops. In the
  worst case, we would now have 100ms of slowed down time. The bad thing
  about it would be, that this also affects the timeout of the period.
  Thus, it might "freeze" the local time for more than 100ms.

  On the other hand, if the timestamp speed suddenly raises after some
  stable time, interpolated time can get too fast. This would shorten the
  period but nonetheless may result in drifting away into the far future.
  Now we would have the problem that we can't deliver the real time
  anymore until it has caught up because the output of Timer::curr_time
  shall be monotone. So, effectively local time might "freeze" again for
  more than 100ms.

  It would be a solution to not use the Trace::timestamp on ARM w/o HW but
  a function whose return value causes the Timer to never use
  interpolation because of its stability policy.

Fixes #2400
2017-05-31 13:16:11 +02:00
Norman Feske
c1b981ede4 Annotate session interfaces with CAP_QUOTA
The new 'CAP_QUOTA' enum value denotes the capability quota to be
transferred from the client to the server at session-creation time.

Issue #2398
2017-05-31 13:16:04 +02:00
Stefan Kalkowski
6106e64aac base: remove include/spec/* other than ISA
This commit moves the headers residing in `repos/base/include/spec/*/drivers`
to `repos/base/include/drivers/defs` or repos/base/include/drivers/uart`
respectively. The first one contains definitions about board-specific MMIO
iand RAM addresses, or IRQ lines. While the latter contains device driver
code for UART devices. Those definitions are used by driver implementations
in `repos/base-hw`, `repos/os`, and `repos/dde-linux`, which now need to
include them more explicitely.

This work is a step in the direction of reducing 'SPEC' identifiers overall.

Ref #2403
2017-05-31 13:16:01 +02:00
Stefan Kalkowski
96eb82574a hw: fix race in core's pager code (fix #2301)
* Acknowledge receive of page-fault signal with ack_signal,
  but restart thread execution separately
* use kill_signal_context when disolving a pager_object to prevent race
* Remove bureaucracy in form of Thread_event and Signal_ack_handler
* remove dead code in riscv, namely Thread_base definition
* translation_table_insertions function for ARM drops out,
  which was overcautious
2017-03-15 12:24:41 +01:00
Adrian-Ken Rueegsegger
c7454dfb08 hw_x86_64_muen: Use scheduling info region
Return scheduling start and end values from scheduling info page.
2017-02-28 13:00:43 +01:00
Adrian-Ken Rueegsegger
86a3e0b8b3 hw_x86_64_muen: Add support for subject name to sinfo 2017-02-28 13:00:43 +01:00
Reto Buerki
c16aa05f19 hw_x86_64_muen: Add support for mem content to sinfo 2017-02-28 13:00:42 +01:00
Martin Stein
56cafb3b57 hw: fix race in signal dispatching
There was a race when the component entrypoint wanted to do
'wait_and_dispatch_one_signal'. In this function it raises a flag for
the signal proxy thread to notice that the entrypoint also wants to
block for signals. When the flag is set and the signal proxy wakes up
with a new signal, it tried to cancel the blocking of the entrypoint.
However, if the entrypoint had not reached the signal blocking at this
point, the cancel blocking failed without a solution. Now, the new
Kernel::cancel_next_signal_blocking call solves the problem by storing a
request to cancel the next signal blocking of a thread immediately
without blocking itself.

Ref #2284
2017-02-28 13:00:41 +01:00