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base-hw: coding style

Browse Source 
Improve consistency with the other base repositories, in particular

- Indentation of class initializers
- Vertical whitespace around control-flow statements
- Preferably place control-flow statements (return, break, continue) at
  beginning of a line
- Placing the opening brace of a namespace at the end of line
- Placing the opening brace of a class at a new line
- Removing superfluous braces around single statements
- Two empty lines between methods/functions in implementation files
This commit is contained in:
Norman Feske 2021-02-01 15:44:16 +01:00
parent cbae9bc1c8
commit 493924a35e
232 changed files with 1311 additions and 731 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
repos/base-hw/include/drivers/defs/imx53_trustzone.h
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@ -17,8 +17,8 @@
/* Genode includes */
#include <drivers/defs/imx53.h>
namespace Trustzone
{
namespace Trustzone {
enum {
/**
* Currently, we limit secure RAM to 256 MB only,

1
repos/base-hw/include/hw_native_pd/hw_native_pd.h
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@ -17,6 +17,7 @@
#include <base/rpc.h>
#include <pd_session/pd_session.h>
struct Genode::Pd_session::Native_pd : Interface
{
virtual void upgrade_cap_slab() = 0;

4
repos/base-hw/include/kernel/interface.h
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@ -18,8 +18,8 @@
#include <kernel/types.h>
#include <kernel/interface_support.h>
namespace Kernel
{
namespace Kernel {
/**
* Kernel names of the kernel calls
*/

4
repos/base-hw/include/kernel/types.h
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@ -18,8 +18,8 @@
#include <kernel/types.h>
#include <kernel/interface_support.h>
namespace Kernel
{
namespace Kernel {
using addr_t = Genode::addr_t;
using size_t = Genode::size_t;
using capid_t = Genode::uint16_t;

5
repos/base-hw/include/spec/arm/cpu/vm_state_trustzone.h
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@ -18,14 +18,15 @@
/* Genode includes */
#include <cpu/cpu_state.h>
namespace Genode
{
namespace Genode {
/**
* CPU context of a virtual machine
*/
struct Vm_state;
}
struct Genode::Vm_state : Genode::Cpu_state_modes
{
Genode::addr_t dfar;

8
repos/base-hw/include/spec/arm/cpu/vm_state_virtualization.h
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@ -17,14 +17,15 @@
/* Genode includes */
#include <cpu/cpu_state.h>
namespace Genode
{
namespace Genode {
/**
* CPU context of a virtual machine
*/
struct Vm_state;
}
struct Genode::Vm_state : Genode::Cpu_state_modes
{
Genode::uint64_t vttbr { 0 };
@ -61,7 +62,8 @@ struct Genode::Vm_state : Genode::Cpu_state_modes
/**
* Timer related registers
*/
struct Timer {
struct Timer
{
Genode::uint64_t offset { 0 };
Genode::uint64_t compare { 0 };
Genode::uint32_t control { 0 };

3
repos/base-hw/include/spec/arm/kernel/interface_support.h
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@ -17,8 +17,7 @@
/* Genode includes */
#include <base/stdint.h>
namespace Kernel
{
namespace Kernel {
typedef Genode::uint32_t Call_arg;
typedef Genode::uint32_t Call_ret;
typedef Genode::uint64_t Call_ret_64;

5
repos/base-hw/include/spec/arm_64/cpu/vm_state_virtualization.h
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@ -17,8 +17,8 @@
/* Genode includes */
#include <cpu/cpu_state.h>
namespace Genode
{
namespace Genode {
/**
* CPU context of a virtual machine
*/
@ -27,6 +27,7 @@ namespace Genode
using uint128_t = __uint128_t;
}
struct Genode::Vm_state : Genode::Cpu_state
{
Genode::uint64_t pstate { 0 };

3
repos/base-hw/include/spec/arm_64/kernel/interface_support.h
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@ -17,8 +17,7 @@
/* Genode includes */
#include <base/stdint.h>
namespace Kernel
{
namespace Kernel {
typedef Genode::uint64_t Call_arg;
typedef Genode::uint64_t Call_ret;
typedef Genode::uint64_t Call_ret_64;

1
repos/base-hw/include/spec/riscv/cpu/cpu_state.h
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@ -19,6 +19,7 @@
namespace Genode { struct Cpu_state; }
struct Genode::Cpu_state
{
enum Cpu_exception {

3
repos/base-hw/include/spec/riscv/kernel/interface_support.h
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@ -17,8 +17,7 @@
/* Genode includes */
#include <base/stdint.h>
namespace Kernel
{
namespace Kernel {
typedef Genode::uint64_t Call_arg;
typedef Genode::uint64_t Call_ret;
typedef Genode::uint64_t Call_ret_64;

3
repos/base-hw/include/spec/x86_64/kernel/interface_support.h
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@ -17,8 +17,7 @@
/* Genode includes */
#include <base/stdint.h>
namespace Kernel
{
namespace Kernel {
typedef Genode::uint64_t Call_arg;
typedef Genode::uint64_t Call_ret;
typedef Genode::uint64_t Call_ret_64;

1
repos/base-hw/src/bootstrap/board/imx53_qsb/board.h
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@ -21,6 +21,7 @@
#include <spec/arm/cpu.h>
namespace Board {
using namespace Hw::Imx53_qsb_board;
using Hw::Pic;

11
repos/base-hw/src/bootstrap/board/imx53_qsb/platform.cc
View File

@ -20,11 +20,12 @@ bool Board::secure_irq(unsigned) { return true; }
Bootstrap::Platform::Board::Board()
: early_ram_regions(Memory_region { RAM0_BASE, RAM0_SIZE },
Memory_region { RAM1_BASE, RAM1_SIZE }),
core_mmio(Memory_region { UART_1_MMIO_BASE, UART_1_MMIO_SIZE },
Memory_region { EPIT_1_MMIO_BASE, EPIT_1_MMIO_SIZE },
Memory_region { IRQ_CONTROLLER_BASE, IRQ_CONTROLLER_SIZE })
:
early_ram_regions(Memory_region { RAM0_BASE, RAM0_SIZE },
Memory_region { RAM1_BASE, RAM1_SIZE }),
core_mmio(Memory_region { UART_1_MMIO_BASE, UART_1_MMIO_SIZE },
Memory_region { EPIT_1_MMIO_BASE, EPIT_1_MMIO_SIZE },
Memory_region { IRQ_CONTROLLER_BASE, IRQ_CONTROLLER_SIZE })
{
Aipstz aipstz_1(AIPS_1_MMIO_BASE);
Aipstz aipstz_2(AIPS_2_MMIO_BASE);

14
repos/base-hw/src/bootstrap/board/imx53_qsb/platform_trustzone.cc
View File

@ -18,6 +18,7 @@
using namespace Board;
bool Board::secure_irq(unsigned i)
{
if (i == EPIT_1_IRQ) return true;
@ -33,12 +34,13 @@ bool Board::secure_irq(unsigned i)
Bootstrap::Platform::Board::Board()
: early_ram_regions(Memory_region { Trustzone::SECURE_RAM_BASE,
Trustzone::SECURE_RAM_SIZE }),
core_mmio(Memory_region { UART_1_MMIO_BASE, UART_1_MMIO_SIZE },
Memory_region { EPIT_1_MMIO_BASE, EPIT_1_MMIO_SIZE },
Memory_region { IRQ_CONTROLLER_BASE, IRQ_CONTROLLER_SIZE },
Memory_region { CSU_BASE, CSU_SIZE })
:
early_ram_regions(Memory_region { Trustzone::SECURE_RAM_BASE,
Trustzone::SECURE_RAM_SIZE }),
core_mmio(Memory_region { UART_1_MMIO_BASE, UART_1_MMIO_SIZE },
Memory_region { EPIT_1_MMIO_BASE, EPIT_1_MMIO_SIZE },
Memory_region { IRQ_CONTROLLER_BASE, IRQ_CONTROLLER_SIZE },
Memory_region { CSU_BASE, CSU_SIZE })
{
Aipstz aipstz_1(AIPS_1_MMIO_BASE);
Aipstz aipstz_2(AIPS_2_MMIO_BASE);

2
repos/base-hw/src/bootstrap/board/imx6q_sabrelite/board.h
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@ -21,6 +21,7 @@
#include <hw/spec/arm/gicv2.h>
namespace Board {
using namespace Hw::Imx6q_sabrelite_board;
using Pic = Hw::Gicv2;
struct L2_cache;
@ -170,6 +171,7 @@ namespace Board {
};
}
struct Board::L2_cache : Hw::Pl310
{
L2_cache(Genode::addr_t mmio) : Hw::Pl310(mmio)

1
repos/base-hw/src/bootstrap/board/imx7d_sabre/board.h
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@ -20,6 +20,7 @@
#include <hw/spec/arm/gicv2.h>
namespace Board {
using namespace Hw::Imx7d_sabre_board;
using Pic = Hw::Gicv2;
static constexpr bool NON_SECURE = true;

8
repos/base-hw/src/bootstrap/board/imx7d_sabre/platform.cc
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@ -20,10 +20,12 @@ extern "C" void * _start_setup_stack; /* entrypoint for non-boot CPUs */
using namespace Board;
Bootstrap::Platform::Board::Board()
: early_ram_regions(Memory_region { RAM_0_BASE, RAM_0_SIZE }),
core_mmio(Memory_region { IRQ_CONTROLLER_BASE, IRQ_CONTROLLER_SIZE },
Memory_region { UART_1_MMIO_BASE, UART_1_MMIO_SIZE })
:
early_ram_regions(Memory_region { RAM_0_BASE, RAM_0_SIZE }),
core_mmio(Memory_region { IRQ_CONTROLLER_BASE, IRQ_CONTROLLER_SIZE },
Memory_region { UART_1_MMIO_BASE, UART_1_MMIO_SIZE })
{
Aipstz aipstz_1(AIPS_1_MMIO_BASE);
Aipstz aipstz_2(AIPS_2_MMIO_BASE);

1
repos/base-hw/src/bootstrap/board/imx8q_evk/board.h
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@ -20,6 +20,7 @@
#include <hw/spec/arm/lpae.h>
namespace Board {
using namespace Hw::Imx8q_evk_board;
struct Cpu : Hw::Arm_64_cpu

15
repos/base-hw/src/bootstrap/board/imx8q_evk/platform.cc
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@ -19,13 +19,14 @@
* some code does not feel happy with addresses being zero
*/
Bootstrap::Platform::Board::Board()
: early_ram_regions(Memory_region { ::Board::RAM_BASE, ::Board::RAM_SIZE }),
late_ram_regions(Memory_region { }),
core_mmio(Memory_region { ::Board::UART_BASE, ::Board::UART_SIZE },
Memory_region { ::Board::Cpu_mmio::IRQ_CONTROLLER_DISTR_BASE,
::Board::Cpu_mmio::IRQ_CONTROLLER_DISTR_SIZE },
Memory_region { ::Board::Cpu_mmio::IRQ_CONTROLLER_REDIST_BASE,
::Board::Cpu_mmio::IRQ_CONTROLLER_REDIST_SIZE })
:
early_ram_regions(Memory_region { ::Board::RAM_BASE, ::Board::RAM_SIZE }),
late_ram_regions(Memory_region { }),
core_mmio(Memory_region { ::Board::UART_BASE, ::Board::UART_SIZE },
Memory_region { ::Board::Cpu_mmio::IRQ_CONTROLLER_DISTR_BASE,
::Board::Cpu_mmio::IRQ_CONTROLLER_DISTR_SIZE },
Memory_region { ::Board::Cpu_mmio::IRQ_CONTROLLER_REDIST_BASE,
::Board::Cpu_mmio::IRQ_CONTROLLER_REDIST_SIZE })
{
::Board::Pic pic {};

2
repos/base-hw/src/bootstrap/board/nit6_solox/board.h
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@ -21,6 +21,7 @@
#include <hw/spec/arm/gicv2.h>
namespace Board {
using namespace Hw::Nit6_solox_board;
using Pic = Hw::Gicv2;
struct L2_cache;
@ -231,6 +232,7 @@ namespace Board {
};
}
struct Board::L2_cache : Hw::Pl310
{
L2_cache(Genode::addr_t mmio) : Hw::Pl310(mmio)

1
repos/base-hw/src/bootstrap/board/pbxa9/board.h
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@ -22,6 +22,7 @@
#include <hw/spec/arm/gicv2.h>
namespace Board {
using namespace Hw::Pbxa9_board;
using Pic = Hw::Gicv2;

18
repos/base-hw/src/bootstrap/board/pbxa9/platform.cc
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@ -17,14 +17,16 @@
using namespace Board;
Bootstrap::Platform::Board::Board()
: early_ram_regions(Memory_region { RAM_0_BASE, RAM_0_SIZE },
Memory_region { RAM_1_BASE, RAM_1_SIZE }),
core_mmio(Memory_region { CORTEX_A9_PRIVATE_MEM_BASE,
CORTEX_A9_PRIVATE_MEM_SIZE },
Memory_region { PL011_0_MMIO_BASE,
PL011_0_MMIO_SIZE },
Memory_region { PL310_MMIO_BASE,
PL310_MMIO_SIZE }) { }
:
early_ram_regions(Memory_region { RAM_0_BASE, RAM_0_SIZE },
Memory_region { RAM_1_BASE, RAM_1_SIZE }),
core_mmio(Memory_region { CORTEX_A9_PRIVATE_MEM_BASE,
CORTEX_A9_PRIVATE_MEM_SIZE },
Memory_region { PL011_0_MMIO_BASE,
PL011_0_MMIO_SIZE },
Memory_region { PL310_MMIO_BASE,
PL310_MMIO_SIZE })
{ }
bool Board::Cpu::errata(Board::Cpu::Errata) { return false; }

3
repos/base-hw/src/bootstrap/board/rpi/board.h
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@ -21,8 +21,7 @@
namespace Board { using namespace Hw::Rpi_board; }
constexpr unsigned Hw::Page_table::Descriptor_base::_device_tex() {
return 0; }
constexpr unsigned Hw::Page_table::Descriptor_base::_device_tex() { return 0; }
constexpr bool Hw::Page_table::Descriptor_base::_smp() { return false; }

28
repos/base-hw/src/bootstrap/board/rpi/platform.cc
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@ -17,22 +17,25 @@
using namespace Rpi;
/**
* Leave out the first page (being 0x0) from bootstraps RAM allocator,
* some code does not feel happy with addresses being zero
*/
Bootstrap::Platform::Board::Board()
: early_ram_regions(Memory_region { RAM_0_BASE + 0x1000,
RAM_0_SIZE - 0x1000 }),
late_ram_regions(Memory_region { RAM_0_BASE, 0x1000 }),
core_mmio(Memory_region { PL011_0_MMIO_BASE,
PL011_0_MMIO_SIZE },
Memory_region { SYSTEM_TIMER_MMIO_BASE,
SYSTEM_TIMER_MMIO_SIZE },
Memory_region { IRQ_CONTROLLER_BASE,
IRQ_CONTROLLER_SIZE },
Memory_region { USB_DWC_OTG_BASE,
USB_DWC_OTG_SIZE }) {}
:
early_ram_regions(Memory_region { RAM_0_BASE + 0x1000,
RAM_0_SIZE - 0x1000 }),
late_ram_regions(Memory_region { RAM_0_BASE, 0x1000 }),
core_mmio(Memory_region { PL011_0_MMIO_BASE,
PL011_0_MMIO_SIZE },
Memory_region { SYSTEM_TIMER_MMIO_BASE,
SYSTEM_TIMER_MMIO_SIZE },
Memory_region { IRQ_CONTROLLER_BASE,
IRQ_CONTROLLER_SIZE },
Memory_region { USB_DWC_OTG_BASE,
USB_DWC_OTG_SIZE })
{ }
unsigned Bootstrap::Platform::enable_mmu()
@ -43,7 +46,8 @@ unsigned Bootstrap::Platform::enable_mmu()
Cpu::Cpsr::init();
struct Ctr : Cpu::Ctr {
struct Ctr : Cpu::Ctr
{
struct P : Bitfield<23, 1> { }; /* page mapping restriction on */
};

1
repos/base-hw/src/bootstrap/board/rpi3/board.h
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@ -19,6 +19,7 @@
#include <hw/spec/arm/lpae.h>
namespace Board {
using namespace Hw::Rpi3_board;
struct Cpu : Hw::Arm_64_cpu

19
repos/base-hw/src/bootstrap/board/rpi3/platform.cc
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@ -18,18 +18,21 @@
* some code does not feel happy with addresses being zero
*/
Bootstrap::Platform::Board::Board()
: early_ram_regions(Memory_region { ::Board::RAM_BASE + 0x1000,
::Board::RAM_SIZE - 0x1000 }),
late_ram_regions(Memory_region { ::Board::RAM_BASE, 0x1000 }),
core_mmio(Memory_region { ::Board::UART_BASE, ::Board::UART_SIZE },
Memory_region { ::Board::LOCAL_IRQ_CONTROLLER_BASE,
::Board::LOCAL_IRQ_CONTROLLER_SIZE },
Memory_region { ::Board::IRQ_CONTROLLER_BASE,
::Board::IRQ_CONTROLLER_SIZE }) {}
:
early_ram_regions(Memory_region { ::Board::RAM_BASE + 0x1000,
::Board::RAM_SIZE - 0x1000 }),
late_ram_regions(Memory_region { ::Board::RAM_BASE, 0x1000 }),
core_mmio(Memory_region { ::Board::UART_BASE, ::Board::UART_SIZE },
Memory_region { ::Board::LOCAL_IRQ_CONTROLLER_BASE,
::Board::LOCAL_IRQ_CONTROLLER_SIZE },
Memory_region { ::Board::IRQ_CONTROLLER_BASE,
::Board::IRQ_CONTROLLER_SIZE })
{ }
extern unsigned int _crt0_qemu_start_secondary_cpus;
void Board::Cpu::wake_up_all_cpus(void * ip)
{
/* start when in qemu */

1
repos/base-hw/src/bootstrap/board/usb_armory/board.h
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@ -21,6 +21,7 @@
#include <spec/arm/cpu.h>
namespace Board {
using namespace Hw::Usb_armory_board;
using Hw::Pic;

14
repos/base-hw/src/bootstrap/board/usb_armory/platform.cc
View File

@ -18,6 +18,7 @@
using namespace Board;
bool Board::secure_irq(unsigned i)
{
if (i == EPIT_1_IRQ) return true;
@ -28,12 +29,13 @@ bool Board::secure_irq(unsigned i)
Bootstrap::Platform::Board::Board()
: early_ram_regions(Memory_region { Trustzone::SECURE_RAM_BASE,
Trustzone::SECURE_RAM_SIZE }),
core_mmio(Memory_region { UART_1_MMIO_BASE, UART_1_MMIO_SIZE },
Memory_region { EPIT_1_MMIO_BASE, EPIT_1_MMIO_SIZE },
Memory_region { IRQ_CONTROLLER_BASE, IRQ_CONTROLLER_SIZE },
Memory_region { CSU_BASE, CSU_SIZE })
:
early_ram_regions(Memory_region { Trustzone::SECURE_RAM_BASE,
Trustzone::SECURE_RAM_SIZE }),
core_mmio(Memory_region { UART_1_MMIO_BASE, UART_1_MMIO_SIZE },
Memory_region { EPIT_1_MMIO_BASE, EPIT_1_MMIO_SIZE },
Memory_region { IRQ_CONTROLLER_BASE, IRQ_CONTROLLER_SIZE },
Memory_region { CSU_BASE, CSU_SIZE })
{
Aipstz aipstz_1(AIPS_1_MMIO_BASE);
Aipstz aipstz_2(AIPS_2_MMIO_BASE);

1
repos/base-hw/src/bootstrap/board/virt_qemu/board.h
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@ -21,6 +21,7 @@
#include <spec/arm/cpu.h>
namespace Board {
using namespace Hw::Virt_qemu_board;
using Psci = Hw::Psci<Hw::Psci_smc_functor>;

21
repos/base-hw/src/bootstrap/board/virt_qemu/platform.cc
View File

@ -18,16 +18,19 @@ extern "C" void * _start_setup_stack; /* entrypoint for non-boot CPUs */
using namespace Board;
Bootstrap::Platform::Board::Board()
: early_ram_regions(Memory_region { RAM_BASE, RAM_SIZE }),
late_ram_regions(Memory_region { }),
core_mmio(Memory_region { UART_BASE, UART_SIZE },
Memory_region { Cpu_mmio::IRQ_CONTROLLER_DISTR_BASE,
Cpu_mmio::IRQ_CONTROLLER_DISTR_SIZE },
Memory_region { Cpu_mmio::IRQ_CONTROLLER_CPU_BASE,
Cpu_mmio::IRQ_CONTROLLER_CPU_SIZE },
Memory_region { Cpu_mmio::IRQ_CONTROLLER_VT_CTRL_BASE,
Cpu_mmio::IRQ_CONTROLLER_VT_CTRL_SIZE }) {}
:
early_ram_regions(Memory_region { RAM_BASE, RAM_SIZE }),
late_ram_regions(Memory_region { }),
core_mmio(Memory_region { UART_BASE, UART_SIZE },
Memory_region { Cpu_mmio::IRQ_CONTROLLER_DISTR_BASE,
Cpu_mmio::IRQ_CONTROLLER_DISTR_SIZE },
Memory_region { Cpu_mmio::IRQ_CONTROLLER_CPU_BASE,
Cpu_mmio::IRQ_CONTROLLER_CPU_SIZE },
Memory_region { Cpu_mmio::IRQ_CONTROLLER_VT_CTRL_BASE,
Cpu_mmio::IRQ_CONTROLLER_VT_CTRL_SIZE })
{ }
static inline void switch_to_supervisor_mode(unsigned cpu_id)

1
repos/base-hw/src/bootstrap/board/virt_qemu_64/board.h
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@ -21,6 +21,7 @@
#include <hw/spec/arm_64/psci_call.h>
namespace Board {
using namespace Hw::Virt_qemu_board;
using Psci = Hw::Psci<Hw::Psci_smc_functor>;

16
repos/base-hw/src/bootstrap/board/virt_qemu_64/platform.cc
View File

@ -13,14 +13,16 @@
#include <platform.h>
Bootstrap::Platform::Board::Board()
: early_ram_regions(Memory_region { ::Board::RAM_BASE, ::Board::RAM_SIZE }),
late_ram_regions(Memory_region { }),
core_mmio(Memory_region { ::Board::UART_BASE, ::Board::UART_SIZE },
Memory_region { ::Board::Cpu_mmio::IRQ_CONTROLLER_DISTR_BASE,
::Board::Cpu_mmio::IRQ_CONTROLLER_DISTR_SIZE },
Memory_region { ::Board::Cpu_mmio::IRQ_CONTROLLER_REDIST_BASE,
::Board::Cpu_mmio::IRQ_CONTROLLER_REDIST_SIZE })
:
early_ram_regions(Memory_region { ::Board::RAM_BASE, ::Board::RAM_SIZE }),
late_ram_regions(Memory_region { }),
core_mmio(Memory_region { ::Board::UART_BASE, ::Board::UART_SIZE },
Memory_region { ::Board::Cpu_mmio::IRQ_CONTROLLER_DISTR_BASE,
::Board::Cpu_mmio::IRQ_CONTROLLER_DISTR_SIZE },
Memory_region { ::Board::Cpu_mmio::IRQ_CONTROLLER_REDIST_BASE,
::Board::Cpu_mmio::IRQ_CONTROLLER_REDIST_SIZE })
{
::Board::Pic pic {};
}

2
repos/base-hw/src/bootstrap/board/wand_quad/board.h
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@ -21,6 +21,7 @@
#include <hw/spec/arm/gicv2.h>
namespace Board {
using namespace Hw::Wand_quad_board;
using Pic = Hw::Gicv2;
@ -206,6 +207,7 @@ namespace Board {
};
}
struct Board::L2_cache : Hw::Pl310
{
L2_cache(Genode::addr_t mmio) : Hw::Pl310(mmio)

1
repos/base-hw/src/bootstrap/board/zynq_qemu/board.h
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@ -21,6 +21,7 @@
#include <hw/spec/arm/gicv2.h>
namespace Board {
using namespace Hw::Zynq_qemu_board;
using Pic = Hw::Gicv2;
static constexpr bool NON_SECURE = false;

28
repos/base-hw/src/bootstrap/board/zynq_qemu/platform.cc
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@ -17,22 +17,26 @@
using namespace Board;
Bootstrap::Platform::Board::Board()
: early_ram_regions(Memory_region { RAM_0_BASE + 0x1000,
RAM_0_SIZE - 0x1000 }),
late_ram_regions(Memory_region { RAM_0_BASE, 0x1000 }),
core_mmio(Memory_region { CORTEX_A9_PRIVATE_MEM_BASE,
CORTEX_A9_PRIVATE_MEM_SIZE },
Memory_region { UART_BASE,
UART_SIZE },
Memory_region { PL310_MMIO_BASE,
PL310_MMIO_SIZE }) { }
:
early_ram_regions(Memory_region { RAM_0_BASE + 0x1000,
RAM_0_SIZE - 0x1000 }),
late_ram_regions(Memory_region { RAM_0_BASE, 0x1000 }),
core_mmio(Memory_region { CORTEX_A9_PRIVATE_MEM_BASE,
CORTEX_A9_PRIVATE_MEM_SIZE },
Memory_region { UART_BASE,
UART_SIZE },
Memory_region { PL310_MMIO_BASE,
PL310_MMIO_SIZE })
{ }
bool Cpu::errata(Board::Cpu::Errata) {
return false; }
bool Cpu::errata(Board::Cpu::Errata) { return false; }
void Cpu::wake_up_all_cpus(void* ip) {
void Cpu::wake_up_all_cpus(void* ip)
{
struct Wakeup_generator : Genode::Mmio
{
struct Core1_boot_addr : Register<0x0, 32> { };

3
repos/base-hw/src/bootstrap/init.cc
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@ -18,11 +18,14 @@
#include <base/internal/globals.h>
#include <base/internal/unmanaged_singleton.h>
Bootstrap::Platform & Bootstrap::platform() {
return *unmanaged_singleton<Bootstrap::Platform>(); }
extern "C" void init() __attribute__ ((noreturn));
extern "C" void init()
{
Bootstrap::Platform & p = Bootstrap::platform();

2
repos/base-hw/src/bootstrap/lock.cc
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@ -32,11 +32,13 @@ void Genode::Lock::lock()
_state = LOCKED;
}
void Genode::Mutex::acquire()
{
_lock.lock();
}
void Genode::Mutex::release()
{
_lock.unlock();

3
repos/base-hw/src/bootstrap/log.cc
View File

@ -55,8 +55,7 @@ struct Buffer
};
Genode::Log &Genode::Log::log() {
return unmanaged_singleton<Buffer>()->log; }
Genode::Log &Genode::Log::log() { return unmanaged_singleton<Buffer>()->log; }
void Genode::raw_write_string(char const *str) { log(str); }

26
repos/base-hw/src/bootstrap/platform.cc
View File

@ -19,8 +19,10 @@
using namespace Bootstrap;
extern unsigned _bss_end;
/*****************************
** Platform::Ram_allocator **
*****************************/
@ -57,10 +59,11 @@ void Platform::Ram_allocator::remove(Memory_region const & region) {
******************/
Platform::Pd::Pd(Platform::Ram_allocator & alloc)
: table_base(alloc.alloc_aligned(sizeof(Table), Table::ALIGNM_LOG2)),
array_base(alloc.alloc_aligned(sizeof(Table_array), Table::ALIGNM_LOG2)),
table(*Genode::construct_at<Table>(table_base)),
array(*Genode::construct_at<Table_array>(array_base))
:
table_base(alloc.alloc_aligned(sizeof(Table), Table::ALIGNM_LOG2)),
array_base(alloc.alloc_aligned(sizeof(Table_array), Table::ALIGNM_LOG2)),
table(*Genode::construct_at<Table>(table_base)),
array(*Genode::construct_at<Table_array>(array_base))
{
using namespace Genode;
addr_t const table_virt_base = Hw::Mm::core_page_tables().base;
@ -156,15 +159,18 @@ void Platform::start_core(unsigned cpu_id)
}
static constexpr Genode::Boot_modules_header & header() {
return *((Genode::Boot_modules_header*) &_boot_modules_headers_begin); }
static constexpr Genode::Boot_modules_header & header()
{
return *((Genode::Boot_modules_header*) &_boot_modules_headers_begin);
}
Platform::Platform()
: bootstrap_region((addr_t)&_prog_img_beg,
((addr_t)&_prog_img_end - (addr_t)&_prog_img_beg)),
core_elf_addr(header().base),
core_elf(core_elf_addr)
:
bootstrap_region((addr_t)&_prog_img_beg,
((addr_t)&_prog_img_end - (addr_t)&_prog_img_beg)),
core_elf_addr(header().base),
core_elf(core_elf_addr)
{
using namespace Genode;

7
repos/base-hw/src/bootstrap/platform.h
View File

@ -36,6 +36,7 @@ namespace Bootstrap {
extern Platform & platform();
}
class Bootstrap::Platform
{
private:
@ -66,8 +67,10 @@ class Bootstrap::Platform
public:
Ram_allocator()
: Genode::Allocator_avl_base(&_slab, sizeof(Base::Block)),
_slab(this, (Block *)&_first_slab) {}
:
Genode::Allocator_avl_base(&_slab, sizeof(Base::Block)),
_slab(this, (Block *)&_first_slab)
{ }
void * alloc_aligned(size_t size, unsigned align);
bool alloc(size_t size, void **out_addr) override;

1
repos/base-hw/src/bootstrap/spec/arm/arm_v6_cpu.cc
View File

@ -15,6 +15,7 @@
#include <spec/arm/cpu.h>
void Board::Cpu::invalidate_data_cache() {
asm volatile ("mcr p15, 0, %[rd], c7, c6, 0" :: [rd]"r"(0) : ); }

3
repos/base-hw/src/bootstrap/spec/arm/cortex_a8_page_table.h
View File

@ -16,11 +16,14 @@
#include <hw/spec/arm/page_table.h>
constexpr unsigned Hw::Page_table::Descriptor_base::_device_tex() {
return 2; }
constexpr bool Hw::Page_table::Descriptor_base::_smp() { return false; }
void Hw::Page_table::_table_changed(unsigned long, unsigned long) { }
#endif /* _SRC__BOOTSTRAP__SPEC__ARM__CORTEX_A8_PAGE_TABLE_H_ */

1
repos/base-hw/src/bootstrap/spec/arm/cortex_a9_actlr.h
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@ -18,6 +18,7 @@
namespace Bootstrap { struct Actlr; }
struct Bootstrap::Actlr : Board::Cpu::Actlr
{
struct Fw : Bitfield<0, 1> { };

3
repos/base-hw/src/bootstrap/spec/arm/cortex_a9_page_table.h
View File

@ -16,11 +16,14 @@
#include <hw/spec/arm/page_table.h>
constexpr unsigned Hw::Page_table::Descriptor_base::_device_tex() {
return 2; }
constexpr bool Hw::Page_table::Descriptor_base::_smp() { return true; }
void Hw::Page_table::_table_changed(unsigned long, unsigned long) { }
#endif /* _SRC__BOOTSTRAP__SPEC__ARM__CORTEX_A9_PAGE_TABLE_H_ */

1
repos/base-hw/src/bootstrap/spec/arm/cpu.h
View File

@ -18,6 +18,7 @@
namespace Board { struct Cpu; }
struct Board::Cpu : Hw::Arm_cpu
{
struct Sctlr : Hw::Arm_cpu::Sctlr

9
repos/base-hw/src/bootstrap/spec/arm/gicv2.cc
View File

@ -14,10 +14,11 @@
#include <board.h>
Hw::Gicv2::Gicv2()
: _distr(Board::Cpu_mmio::IRQ_CONTROLLER_DISTR_BASE),
_cpui (Board::Cpu_mmio::IRQ_CONTROLLER_CPU_BASE),
_last_iar(Cpu_interface::Iar::Irq_id::bits(spurious_id)),
_max_irq(_distr.max_irq())
:
_distr(Board::Cpu_mmio::IRQ_CONTROLLER_DISTR_BASE),
_cpui (Board::Cpu_mmio::IRQ_CONTROLLER_CPU_BASE),
_last_iar(Cpu_interface::Iar::Irq_id::bits(spurious_id)),
_max_irq(_distr.max_irq())
{
static bool distributor_initialized = false;
bool use_group_1 = Board::NON_SECURE &&

11
repos/base-hw/src/bootstrap/spec/arm/gicv3.cc
View File

@ -14,11 +14,12 @@
#include <platform.h>
Hw::Pic::Pic()
: _distr(Board::Cpu_mmio::IRQ_CONTROLLER_DISTR_BASE),
_redistr(Board::Cpu_mmio::IRQ_CONTROLLER_REDIST_BASE),
_redistr_sgi(Board::Cpu_mmio::IRQ_CONTROLLER_REDIST_BASE +
Board::Cpu_mmio::IRQ_CONTROLLER_REDIST_SIZE / 2),
_max_irq(_distr.max_irq())
:
_distr(Board::Cpu_mmio::IRQ_CONTROLLER_DISTR_BASE),
_redistr(Board::Cpu_mmio::IRQ_CONTROLLER_REDIST_BASE),
_redistr_sgi(Board::Cpu_mmio::IRQ_CONTROLLER_REDIST_BASE +
Board::Cpu_mmio::IRQ_CONTROLLER_REDIST_SIZE / 2),
_max_irq(_distr.max_irq())
{
/* disable device */
_distr.write<Distributor::Ctlr>(0);

15
repos/base-hw/src/bootstrap/spec/arm/imx6_platform.cc
View File

@ -19,13 +19,14 @@
using namespace Board;
Bootstrap::Platform::Board::Board()
: early_ram_regions(Memory_region { RAM_BASE, RAM_SIZE }),
core_mmio(Memory_region { UART_BASE,
UART_SIZE },
Memory_region { CORTEX_A9_PRIVATE_MEM_BASE,
CORTEX_A9_PRIVATE_MEM_SIZE },
Memory_region { PL310_MMIO_BASE,
PL310_MMIO_SIZE })
:
early_ram_regions(Memory_region { RAM_BASE, RAM_SIZE }),
core_mmio(Memory_region { UART_BASE,
UART_SIZE },
Memory_region { CORTEX_A9_PRIVATE_MEM_BASE,
CORTEX_A9_PRIVATE_MEM_SIZE },
Memory_region { PL310_MMIO_BASE,
PL310_MMIO_SIZE })
{
Aipstz aipstz_1(AIPS_1_MMIO_BASE);
Aipstz aipstz_2(AIPS_2_MMIO_BASE);

5
repos/base-hw/src/bootstrap/spec/arm/imx_aipstz.h
View File

@ -17,8 +17,8 @@
#include <util/mmio.h>
namespace Bootstrap
{
namespace Bootstrap {
/**
* AHB to IP Bridge
*
@ -28,6 +28,7 @@ namespace Bootstrap
class Aipstz;
}
class Bootstrap::Aipstz : public Genode::Mmio
{
private:

2
repos/base-hw/src/bootstrap/spec/arm/imx_csu.h
View File

@ -19,6 +19,7 @@
namespace Bootstrap { struct Csu; }
struct Bootstrap::Csu : Genode::Mmio
{
template <Genode::off_t OFF>
@ -33,6 +34,7 @@ struct Bootstrap::Csu : Genode::Mmio
struct Slave_b : Register<OFF, 32>::template Bitfield<16, 9> { };
};
struct Master : public Register<0x218, 32>
{
enum {

4
repos/base-hw/src/bootstrap/spec/arm/imx_tzic.cc
View File

@ -13,7 +13,9 @@
#include <board.h>
Hw::Pic::Pic() : Genode::Mmio(Board::IRQ_CONTROLLER_BASE)
Hw::Pic::Pic()
:
Genode::Mmio(Board::IRQ_CONTROLLER_BASE)
{
for (unsigned i = 0; i < NR_OF_IRQ; i++) {
write<Intsec::Nonsecure>(!Board::secure_irq(i), i);

6
repos/base-hw/src/bootstrap/spec/riscv/platform.cc
View File

@ -16,8 +16,12 @@
using namespace Board;
Bootstrap::Platform::Board::Board()
: early_ram_regions(Memory_region { RAM_0_BASE, RAM_0_SIZE } ), core_mmio() {}
:
early_ram_regions(Memory_region { RAM_0_BASE, RAM_0_SIZE } ),
core_mmio()
{ }
unsigned Bootstrap::Platform::enable_mmu()

11
repos/base-hw/src/bootstrap/spec/x86_64/multiboot.h
View File

@ -20,11 +20,13 @@
namespace Genode { class Multiboot_info; }
class Genode::Multiboot_info : Mmio
{
private:
struct Flags : Register<0x00, 32> {
struct Flags : Register<0x00, 32>
{
struct Mem_map : Bitfield<6, 1> { };
};
@ -40,7 +42,8 @@ class Genode::Multiboot_info : Mmio
Multiboot_info(addr_t mbi) : Mmio(mbi) { }
Multiboot_info(addr_t mbi, bool strip);
struct Mmap : Genode::Mmio {
struct Mmap : Genode::Mmio
{
struct Size : Register <0x00, 32> { };
struct Addr : Register <0x04, 64> { };
struct Length : Register <0x0c, 64> { };
@ -52,8 +55,8 @@ class Genode::Multiboot_info : Mmio
/**
* Physical ram regions
*/
addr_t phys_ram_mmap_base(unsigned i, bool solely_within_4k_base = true) {
addr_t phys_ram_mmap_base(unsigned i, bool solely_within_4k_base = true)
{
if (!read<Flags::Mem_map>())
return 0;

6
repos/base-hw/src/bootstrap/spec/x86_64/multiboot2.h
View File

@ -25,7 +25,8 @@ class Genode::Multiboot2_info : Mmio
struct Size : Register <0x0, 32> { };
struct Tag : Genode::Mmio {
struct Tag : Genode::Mmio
{
enum { LOG2_SIZE = 3 };
struct Type : Register <0x00, 32>
@ -55,7 +56,8 @@ class Genode::Multiboot2_info : Mmio
enum { MAGIC = 0x36d76289UL };
struct Memory : Genode::Mmio {
struct Memory : Genode::Mmio
{
enum { SIZE = 3 * 8 };
struct Addr : Register <0x00, 64> { };

38
repos/base-hw/src/bootstrap/spec/x86_64/platform.cc
View File

@ -23,8 +23,10 @@
using namespace Genode;
/* contains Multiboot MAGIC value (either version 1 or 2) */
extern "C" Genode::addr_t __initial_ax;
/* contains physical pointer to multiboot */
extern "C" Genode::addr_t __initial_bx;
@ -44,6 +46,7 @@ enum { AP_BOOT_CODE_PAGE = 0x1000 };
extern "C" void * _start;
extern "C" void * _ap;
static Hw::Acpi_rsdp search_rsdp(addr_t area, addr_t area_size)
{
if (area && area_size && area < area + area_size) {
@ -62,12 +65,13 @@ static Hw::Acpi_rsdp search_rsdp(addr_t area, addr_t area_size)
Bootstrap::Platform::Board::Board()
: core_mmio(Memory_region { 0, 0x1000 },
Memory_region { Hw::Cpu_memory_map::lapic_phys_base(), 0x1000 },
Memory_region { Hw::Cpu_memory_map::MMIO_IOAPIC_BASE,
Hw::Cpu_memory_map::MMIO_IOAPIC_SIZE },
Memory_region { __initial_bx & ~0xFFFUL,
get_page_size() })
:
core_mmio(Memory_region { 0, 0x1000 },
Memory_region { Hw::Cpu_memory_map::lapic_phys_base(), 0x1000 },
Memory_region { Hw::Cpu_memory_map::MMIO_IOAPIC_BASE,
Hw::Cpu_memory_map::MMIO_IOAPIC_SIZE },
Memory_region { __initial_bx & ~0xFFFUL,
get_page_size() })
{
Hw::Acpi_rsdp & acpi_rsdp = info.acpi_rsdp;
static constexpr size_t initial_map_max = 1024 * 1024 * 1024;
@ -219,33 +223,40 @@ Bootstrap::Platform::Board::Board()
addr_t ap_code_size = (addr_t)&_start - (addr_t)&_ap;
memcpy((void *)AP_BOOT_CODE_PAGE, &_ap, ap_code_size);
}
}
struct Lapic : Mmio
{
struct Svr : Register<0x0f0, 32>
{
struct APIC_enable : Bitfield<8, 1> { };
};
struct Icr_low : Register<0x300, 32> {
struct Icr_low : Register<0x300, 32>
{
struct Vector : Bitfield< 0, 8> { };
struct Delivery_mode : Bitfield< 8, 3> {
struct Delivery_mode : Bitfield< 8, 3>
{
enum Mode { INIT = 5, SIPI = 6 };
};
struct Delivery_status : Bitfield<12, 1> { };
struct Level_assert : Bitfield<14, 1> { };
struct Dest_shorthand : Bitfield<18, 2> {
struct Dest_shorthand : Bitfield<18, 2>
{
enum { ALL_OTHERS = 3 };
};
};
struct Icr_high : Register<0x310, 32> {
struct Icr_high : Register<0x310, 32>
{
struct Destination : Bitfield<24, 8> { };
};
Lapic(addr_t const addr) : Mmio(addr) { }
};
static inline void ipi_to_all(Lapic &lapic, unsigned const boot_frame,
Lapic::Icr_low::Delivery_mode::Mode const mode)
{
@ -268,6 +279,7 @@ static inline void ipi_to_all(Lapic &lapic, unsigned const boot_frame,
lapic.write<Lapic::Icr_low>(icr_low);
}
unsigned Bootstrap::Platform::enable_mmu()
{
using ::Board::Cpu;
@ -325,4 +337,6 @@ addr_t Bios_data_area::_mmio_base_virt() { return 0x1ff000; }
Board::Serial::Serial(addr_t, size_t, unsigned baudrate)
:X86_uart(Bios_data_area::singleton()->serial_port(), 0, baudrate) {}
:
X86_uart(Bios_data_area::singleton()->serial_port(), 0, baudrate)
{ }

1
repos/base-hw/src/core/board/imx7d_sabre/board.h
View File

@ -21,6 +21,7 @@
#include <spec/arm/virtualization/board.h>
namespace Board {
using namespace Hw::Imx7d_sabre_board;
struct Virtual_local_pic {};

1
repos/base-hw/src/core/board/imx8q_evk/board.h
View File

@ -21,6 +21,7 @@
#include <spec/arm/virtualization/board.h>
namespace Board {
using namespace Hw::Imx8q_evk_board;
enum {

1
repos/base-hw/src/core/board/nit6_solox/board.h
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@ -19,6 +19,7 @@
#include <spec/arm/cortex_a9_private_timer.h>
namespace Board {
using namespace Hw::Nit6_solox_board;
using Pic = Hw::Gicv2;

1
repos/base-hw/src/core/board/pbxa9/board.h
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@ -19,6 +19,7 @@
#include <spec/arm/cortex_a9_private_timer.h>
namespace Board {
using namespace Hw::Pbxa9_board;
using Pic = Hw::Gicv2;

4
repos/base-hw/src/core/board/rpi/board.h
View File

@ -19,8 +19,6 @@
#include <spec/arm/bcm2835_pic.h>
#include <spec/arm/bcm2835_system_timer.h>
namespace Board {
using namespace Hw::Rpi_board;
};
namespace Board { using namespace Hw::Rpi_board; };
#endif /* _CORE__SPEC__RPI__BOARD_H_ */

1
repos/base-hw/src/core/board/rpi3/board.h
View File

@ -19,6 +19,7 @@
#include <spec/arm/generic_timer.h>
namespace Board {
using namespace Hw::Rpi3_board;
enum { TIMER_IRQ = 1 };

1
repos/base-hw/src/core/board/virt_qemu/board.h
View File

@ -23,6 +23,7 @@
namespace Kernel { class Cpu; }
namespace Board {
using namespace Hw::Virt_qemu_board;
struct Virtual_local_pic {};

7
repos/base-hw/src/core/board/virt_qemu_64/board.h
View File

@ -15,7 +15,6 @@
#define _SRC__CORE__SPEC__VIRT_QEMU_64_H_
#include <hw/spec/arm/virt_qemu_board.h>
//#include <hw/spec/arm/gicv3.h>
#include <spec/arm/generic_timer.h>
#include <spec/arm/virtualization/gicv3.h>
#include <spec/arm_64/cpu/vm_state_virtualization.h>
@ -24,6 +23,7 @@
#include <kernel/irq.h>
namespace Board {
using namespace Hw::Virt_qemu_board;
enum {
@ -42,11 +42,13 @@ namespace Board {
using Vm_state = Genode::Vm_state;
};
namespace Kernel {
class Cpu;
class Vm;
};
struct Board::Vcpu_context
{
struct Vm_irq : Kernel::Irq
@ -77,8 +79,7 @@ struct Board::Vcpu_context
void disable();
};
Vcpu_context(Kernel::Cpu & cpu)
: pic_irq(cpu), vtimer_irq(cpu) {}
Vcpu_context(Kernel::Cpu & cpu) : pic_irq(cpu), vtimer_irq(cpu) { }
Pic::Virtual_context pic {};
Pic_maintainance_irq pic_irq;

1
repos/base-hw/src/core/board/wand_quad/board.h
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@ -20,6 +20,7 @@
#include <spec/arm/cortex_a9_private_timer.h>
namespace Board {
using namespace Hw::Wand_quad_board;
using L2_cache = Hw::Pl310;

1
repos/base-hw/src/core/board/zynq_qemu/board.h
View File

@ -21,6 +21,7 @@
#include <spec/arm/cortex_a9_private_timer.h>
namespace Board {
using namespace Hw::Zynq_qemu_board;
using Pic = Hw::Gicv2;

7
repos/base-hw/src/core/core_log_out.cc
View File

@ -23,5 +23,8 @@
void Genode::Core_log::out(char const c) { Kernel::log(c); }
void Genode::raw_write_string(char const *str) {
while (char c = *str++) Kernel::log(c); }
void Genode::raw_write_string(char const *str)
{
while (char c = *str++)
Kernel::log(c);
}

1
repos/base-hw/src/core/core_region_map.cc
View File

@ -23,6 +23,7 @@
using namespace Genode;
Region_map::Local_addr
Core_region_map::attach(Dataspace_capability ds_cap, size_t size,
off_t offset, bool use_local_addr,

74
repos/base-hw/src/core/cpu_thread_allocator.h
View File

@ -21,54 +21,54 @@
/* core includes */
#include <assertion.h>
namespace Genode
namespace Genode { class Cpu_thread_allocator; }
/**
* Thread allocator for cores CPU service
*
* Normally one would use a SLAB for threads because usually they
* are tiny objects, but in 'base-hw' they contain the whole kernel
* object in addition. Thus we use the given allocator directly.
*/
class Genode::Cpu_thread_allocator : public Allocator
{
/**
* Thread allocator for cores CPU service
*
* Normally one would use a SLAB for threads because usually they
* are tiny objects, but in 'base-hw' they contain the whole kernel
* object in addition. Thus we use the given allocator directly.
*/
class Cpu_thread_allocator : public Allocator
{
private:
private:
/*
* Noncopyable
*/
Cpu_thread_allocator(Cpu_thread_allocator const &);
Cpu_thread_allocator &operator = (Cpu_thread_allocator const &);
/*
* Noncopyable
*/
Cpu_thread_allocator(Cpu_thread_allocator const &);
Cpu_thread_allocator &operator = (Cpu_thread_allocator const &);
Allocator &_alloc;
Allocator &_alloc;
public:
public:
/**
* Constructor
*
* \param alloc allocator backend
*/
Cpu_thread_allocator(Allocator &alloc) : _alloc(alloc) { }
/**
* Constructor
*
* \param alloc allocator backend
*/
Cpu_thread_allocator(Allocator &alloc) : _alloc(alloc) { }
/*************************
** Allocator interface **
*************************/
/*************************
** Allocator interface **
*************************/
bool alloc(size_t size, void **out_addr) override {
return _alloc.alloc(size, out_addr); }
bool alloc(size_t size, void **out_addr) override {
return _alloc.alloc(size, out_addr); }
void free(void *addr, size_t size) override {
_alloc.free(addr, size); }
void free(void *addr, size_t size) override {
_alloc.free(addr, size); }
size_t consumed() const override { ASSERT_NEVER_CALLED; }
size_t consumed() const override { ASSERT_NEVER_CALLED; }
size_t overhead(size_t) const override { ASSERT_NEVER_CALLED; }
size_t overhead(size_t) const override { ASSERT_NEVER_CALLED; }
bool need_size_for_free() const override {
return _alloc.need_size_for_free(); }
};
}
bool need_size_for_free() const override {
return _alloc.need_size_for_free(); }
};
#endif /* _CORE__CPU_THREAD_ALLOCATOR_H_ */

1
repos/base-hw/src/core/env.cc
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@ -16,4 +16,5 @@
using namespace Genode;
void Genode::upgrade_capability_slab() { ASSERT_NEVER_CALLED; }

9
repos/base-hw/src/core/irq_session_component.cc
View File

@ -63,12 +63,11 @@ Irq_session_component::~Irq_session_component()
Irq_session_component::Irq_session_component(Range_allocator &irq_alloc,
const char * const args)
: _irq_args(args),
_irq_number(Platform::irq(_irq_args.irq_number())),
_irq_alloc(irq_alloc),
_kobj(), _is_msi(false), _address(0), _value(0)
:
_irq_args(args), _irq_number(Platform::irq(_irq_args.irq_number())),
_irq_alloc(irq_alloc), _kobj(), _is_msi(false), _address(0), _value(0)
{
const long mmconf =
long const mmconf =
Arg_string::find_arg(args, "device_config_phys").long_value(0);
if (mmconf) {

4
repos/base-hw/src/core/kernel/configuration.h
View File

@ -16,8 +16,8 @@
#include <kernel/interface.h>
namespace Kernel
{
namespace Kernel {
enum {
DEFAULT_STACK_SIZE = 16 * 1024,
DEFAULT_TRANSLATION_TABLE_MAX = 128,

4
repos/base-hw/src/core/kernel/core_interface.h
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@ -22,8 +22,8 @@
namespace Genode { class Native_utcb; }
namespace Kernel
{
namespace Kernel {
class Pd;
class Thread;
class Signal_receiver;

49
repos/base-hw/src/core/kernel/cpu.cc
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@ -27,6 +27,7 @@
using namespace Kernel;
Kernel::Cpu_pool &Kernel::cpu_pool() { return *unmanaged_singleton<Cpu_pool>(); }
@ -80,19 +81,24 @@ void Cpu_job::affinity(Cpu &cpu)
void Cpu_job::quota(unsigned const q)
{
if (_cpu) { _cpu->scheduler().quota(*this, q); }
else { Cpu_share::quota(q); }
if (_cpu)
_cpu->scheduler().quota(*this, q);
else
Cpu_share::quota(q);
}
Cpu_job::Cpu_job(Cpu_priority const p, unsigned const q)
:
Cpu_share(p, q), _cpu(0) { }
Cpu_share(p, q), _cpu(0)
{ }
Cpu_job::~Cpu_job()
{
if (!_cpu) { return; }
if (!_cpu)
return;
_cpu->scheduler().remove(*this);
}
@ -103,8 +109,10 @@ Cpu_job::~Cpu_job()
extern "C" void idle_thread_main(void);
Cpu::Idle_thread::Idle_thread(Cpu &cpu)
: Thread("idle")
:
Thread("idle")
{
regs->ip = (addr_t)&idle_thread_main;
@ -115,12 +123,13 @@ Cpu::Idle_thread::Idle_thread(Cpu &cpu)
void Cpu::schedule(Job * const job)
{
if (_id == executing_id()) { _scheduler.ready(job->share()); }
if (_id == executing_id())
_scheduler.ready(job->share());
else {
_scheduler.ready_check(job->share());
if (_scheduler.need_to_schedule()) {
if (_scheduler.need_to_schedule())
trigger_ip_interrupt();
}
}
}
@ -128,7 +137,10 @@ void Cpu::schedule(Job * const job)
bool Cpu::interrupt(unsigned const irq_id)
{
Irq * const irq = object(irq_id);
if (!irq) return false;
if (!irq)
return false;
irq->occurred();
return true;
}
@ -159,18 +171,21 @@ Genode::uint8_t kernel_stack[NR_OF_CPUS][Cpu::KERNEL_STACK_SIZE]
__attribute__((aligned(Genode::get_page_size())));
addr_t Cpu::stack_start() {
return (addr_t)&kernel_stack + KERNEL_STACK_SIZE * (_id+1); }
addr_t Cpu::stack_start()
{
return (addr_t)&kernel_stack + KERNEL_STACK_SIZE * (_id + 1);
}
Cpu::Cpu(unsigned const id,
Inter_processor_work_list & global_work_list)
Cpu::Cpu(unsigned const id, Inter_processor_work_list & global_work_list)
:
_id(id), _timer(*this),
_scheduler(_idle, _quota(), _fill()), _idle(*this),
_ipi_irq(*this),
_global_work_list(global_work_list)
{ _arch_init(); }
{
_arch_init();
}
/**************
@ -193,5 +208,9 @@ Cpu & Cpu_pool::cpu(unsigned const id)
using Boot_info = Hw::Boot_info<Board::Boot_info>;
Cpu_pool::Cpu_pool()
: _count(reinterpret_cast<Boot_info*>(Hw::Mm::boot_info().base)->cpus) { }
:
_count(reinterpret_cast<Boot_info*>(Hw::Mm::boot_info().base)->cpus)
{ }

4
repos/base-hw/src/core/kernel/cpu.h
View File

@ -24,8 +24,8 @@
#include <kernel/inter_processor_work.h>
#include <kernel/thread.h>
namespace Kernel
{
namespace Kernel {
/**
* Class for kernel data that is needed to manage a specific CPU
*/

5
repos/base-hw/src/core/kernel/cpu_context.h
View File

@ -19,8 +19,8 @@
#include <kernel/cpu_scheduler.h>
#include <kernel/timer.h>
namespace Kernel
{
namespace Kernel {
class Cpu;
/**
@ -29,6 +29,7 @@ namespace Kernel
class Cpu_job;
}
class Kernel::Cpu_job : private Cpu_share
{
private:

11
repos/base-hw/src/core/kernel/cpu_mp.cc
View File

@ -15,6 +15,7 @@
using namespace Kernel;
void Cpu::Ipi::occurred()
{
/* lambda to iterate over a work-list and execute all work items */
@ -39,7 +40,8 @@ void Cpu::Ipi::occurred()
void Cpu::trigger_ip_interrupt()
{
/* check whether there is still an IPI send */
if (_ipi_irq.pending) return;
if (_ipi_irq.pending)
return;
_pic.send_ipi(_id);
_ipi_irq.pending = true;
@ -47,5 +49,8 @@ void Cpu::trigger_ip_interrupt()
Cpu::Ipi::Ipi(Cpu & cpu)
: Irq(Board::Pic::IPI, cpu), cpu(cpu) {
cpu.pic().unmask(Board::Pic::IPI, cpu.id()); }
:
Irq(Board::Pic::IPI, cpu), cpu(cpu)
{
cpu.pic().unmask(Board::Pic::IPI, cpu.id());
}

144
repos/base-hw/src/core/kernel/cpu_scheduler.cc
View File

@ -40,8 +40,10 @@ void Cpu_scheduler::_next_round()
void Cpu_scheduler::_consumed(unsigned const q)
{
if (_residual > q) { _residual -= q; }
else { _next_round(); }
if (_residual > q)
_residual -= q;
else
_next_round();
}
@ -62,18 +64,27 @@ void Cpu_scheduler::_next_fill()
void Cpu_scheduler::_head_claimed(unsigned const r)
{
if (!_head->_quota) { return; }
if (!_head->_quota)
return;
_head->_claim = r > _head->_quota ? _head->_quota : r;
if (_head->_claim || !_head->_ready) { return; }
if (_head->_claim || !_head->_ready)
return;
_rcl[_head->_prio].to_tail(&_head->_claim_item);
}
void Cpu_scheduler::_head_filled(unsigned const r)
{
if (_fills.head() != &_head->_fill_item) { return; }
if (r) { _head->_fill = r; }
else { _next_fill(); }
if (_fills.head() != &_head->_fill_item)
return;
if (r)
_head->_fill = r;
else
_next_fill();
}
@ -81,9 +92,15 @@ bool Cpu_scheduler::_claim_for_head()
{
for (signed p = Prio::MAX; p > Prio::MIN - 1; p--) {
Double_list_item<Cpu_share> *const item { _rcl[p].head() };
if (!item) { continue; }
if (!item)
continue;
Cpu_share &share { item->payload() };
if (!share._claim) { continue; }
if (!share._claim)
continue;
_set_head(share, share._claim, 1);
return 1;
}
@ -94,9 +111,9 @@ bool Cpu_scheduler::_claim_for_head()
bool Cpu_scheduler::_fill_for_head()
{
Double_list_item<Cpu_share> *const item { _fills.head() };
if (!item) {
if (!item)
return 0;
}
Share &share = item->payload();
_set_head(share, share._fill, 0);
return 1;
@ -106,7 +123,9 @@ bool Cpu_scheduler::_fill_for_head()
unsigned Cpu_scheduler::_trim_consumption(unsigned &q)
{
q = Genode::min(Genode::min(q, _head_quota), _residual);
if (!_head_yields) { return _head_quota - q; }
if (!_head_yields)
return _head_quota - q;
_head_yields = false;
return 0;
}
@ -114,22 +133,31 @@ unsigned Cpu_scheduler::_trim_consumption(unsigned &q)
void Cpu_scheduler::_quota_introduction(Share &s)
{
if (s._ready) { _rcl[s._prio].insert_tail(&s._claim_item); }
else { _ucl[s._prio].insert_tail(&s._claim_item); }
if (s._ready)
_rcl[s._prio].insert_tail(&s._claim_item);
else
_ucl[s._prio].insert_tail(&s._claim_item);
}
void Cpu_scheduler::_quota_revokation(Share &s)
{
if (s._ready) { _rcl[s._prio].remove(&s._claim_item); }
else { _ucl[s._prio].remove(&s._claim_item); }
if (s._ready)
_rcl[s._prio].remove(&s._claim_item);
else
_ucl[s._prio].remove(&s._claim_item);
}
void Cpu_scheduler::_quota_adaption(Share &s, unsigned const q)
{
if (q) { if (s._claim > q) { s._claim = q; } }
else { _quota_revokation(s); }
if (q) {
if (s._claim > q)
s._claim = q;
} else {
_quota_revokation(s);
}
}
@ -142,13 +170,21 @@ void Cpu_scheduler::update(time_t time)
/* do not detract the quota if the head context was removed even now */
if (_head) {
unsigned const r = _trim_consumption(duration);
if (_head_claims) { _head_claimed(r); }
else { _head_filled(r); }
if (_head_claims)
_head_claimed(r);
else
_head_filled(r);
_consumed(duration);
}
if (_claim_for_head()) { return; }
if (_fill_for_head()) { return; }
if (_claim_for_head())
return;
if (_fill_for_head())
return;
_set_head(_idle, _fill, 0);
}
@ -159,9 +195,9 @@ void Cpu_scheduler::ready_check(Share &s1)
ready(s1);
if (_need_to_schedule) {
if (_need_to_schedule)
return;
}
Share * s2 = _head;
if (!s1._claim) {
_need_to_schedule = s2 == &_idle;
@ -191,10 +227,16 @@ void Cpu_scheduler::ready(Share &s)
s._ready = 1;
s._fill = _fill;
_fills.insert_tail(&s._fill_item);
if (!s._quota) { return; }
if (!s._quota)
return;
_ucl[s._prio].remove(&s._claim_item);
if (s._claim) { _rcl[s._prio].insert_head(&s._claim_item); }
else { _rcl[s._prio].insert_tail(&s._claim_item); }
if (s._claim)
_rcl[s._prio].insert_head(&s._claim_item);
else
_rcl[s._prio].insert_tail(&s._claim_item);
}
@ -206,7 +248,10 @@ void Cpu_scheduler::unready(Share &s)
s._ready = 0;
_fills.remove(&s._fill_item);
if (!s._quota) { return; }
if (!s._quota)
return;
_rcl[s._prio].remove(&s._claim_item);
_ucl[s._prio].insert_tail(&s._claim_item);
}
@ -224,19 +269,32 @@ void Cpu_scheduler::remove(Share &s)
assert(&s != &_idle);
_need_to_schedule = true;
if (&s == _head) _head = nullptr;
if (s._ready) { _fills.remove(&s._fill_item); }
if (!s._quota) { return; }
if (s._ready) { _rcl[s._prio].remove(&s._claim_item); }
else { _ucl[s._prio].remove(&s._claim_item); }
if (&s == _head)
_head = nullptr;
if (s._ready)
_fills.remove(&s._fill_item);
if (!s._quota)
return;
if (s._ready)
_rcl[s._prio].remove(&s._claim_item);
else
_ucl[s._prio].remove(&s._claim_item);
}
void Cpu_scheduler::insert(Share &s)
{
assert(!s._ready);
_need_to_schedule = true;
if (!s._quota) { return; }
if (!s._quota)
return;
s._claim = s._quota;
_ucl[s._prio].insert_head(&s._claim_item);
}
@ -245,8 +303,12 @@ void Cpu_scheduler::insert(Share &s)
void Cpu_scheduler::quota(Share &s, unsigned const q)
{
assert(&s != &_idle);
if (s._quota) { _quota_adaption(s, q); }
else if (q) { _quota_introduction(s); }
if (s._quota)
_quota_adaption(s, q);
else if (q)
_quota_introduction(s);
s._quota = q;
}
@ -258,7 +320,9 @@ Cpu_share &Cpu_scheduler::head() const
}
Cpu_scheduler::Cpu_scheduler(Share &i, unsigned const q,
unsigned const f)
: _idle(i), _quota(q), _residual(q), _fill(f)
{ _set_head(i, f, 0); }
Cpu_scheduler::Cpu_scheduler(Share &i, unsigned const q, unsigned const f)
:
_idle(i), _quota(q), _residual(q), _fill(f)
{
_set_head(i, f, 0);
}

6
repos/base-hw/src/core/kernel/cpu_scheduler.h
View File

@ -20,8 +20,8 @@
#include <kernel/configuration.h>
#include <kernel/double_list.h>
namespace Kernel
{
namespace Kernel {
/**
* Priority of an unconsumed CPU claim versus other unconsumed CPU claims
*/
@ -38,6 +38,7 @@ namespace Kernel
class Cpu_scheduler;
}
class Kernel::Cpu_priority
{
private:
@ -69,6 +70,7 @@ class Kernel::Cpu_priority
operator signed() const { return _value; }
};
class Kernel::Cpu_share
{
friend class Cpu_scheduler;

10
repos/base-hw/src/core/kernel/double_list.h
View File

@ -14,8 +14,8 @@
#ifndef _CORE__KERNEL__DOUBLE_LIST_H_
#define _CORE__KERNEL__DOUBLE_LIST_H_
namespace Kernel
{
namespace Kernel {
/**
* Ability to be an item in a double connected list
*/
@ -29,6 +29,7 @@ namespace Kernel
class Double_list;
}
template <typename T>
class Kernel::Double_list_item
{
@ -47,6 +48,7 @@ class Kernel::Double_list_item
T &payload() { return _payload; }
};
template <typename T>
class Kernel::Double_list
{
@ -129,7 +131,9 @@ class Kernel::Double_list
*/
void head_to_tail()
{
if (!_head || _head == _tail) { return; }
if (!_head || _head == _tail)
return;
_head->_prev = _tail;
_tail->_next = _head;
_head = _head->_next;

2
repos/base-hw/src/core/kernel/init.cc
View File

@ -26,9 +26,11 @@
using namespace Kernel;
static_assert(sizeof(Genode::sizet_arithm_t) >= 2 * sizeof(size_t),
"Bad result type for size_t arithmetics.");
Pd &Kernel::core_pd() {
return unmanaged_singleton<Genode::Core_platform_pd>()->kernel_pd(); }

20
repos/base-hw/src/core/kernel/ipc_node.cc
View File

@ -85,14 +85,17 @@ void Ipc_node::_cancel_inbuf_request()
void Ipc_node::_announced_request_cancelled(Ipc_node &node)
{
if (_caller == &node) _caller = nullptr;
else _request_queue.remove(node._request_queue_item);
if (_caller == &node)
_caller = nullptr;
else
_request_queue.remove(node._request_queue_item);
}
void Ipc_node::_outbuf_request_cancelled()
{
if (_callee == nullptr) return;
if (_callee == nullptr)
return;
_callee = nullptr;
_state = INACTIVE;
@ -100,7 +103,10 @@ void Ipc_node::_outbuf_request_cancelled()
}
bool Ipc_node::_helps_outbuf_dst() { return (_state == AWAIT_REPLY) && _help; }
bool Ipc_node::_helps_outbuf_dst()
{
return (_state == AWAIT_REPLY) && _help;
}
bool Ipc_node::can_send_request()
@ -122,8 +128,10 @@ void Ipc_node::send_request(Ipc_node &callee, bool help)
}
Thread &Ipc_node::helping_sink() {
return _helps_outbuf_dst() ? _callee->helping_sink() : _thread; }
Thread &Ipc_node::helping_sink()
{
return _helps_outbuf_dst() ? _callee->helping_sink() : _thread;
}
bool Ipc_node::can_await_request()

11
repos/base-hw/src/core/kernel/ipc_node.h
View File

@ -18,8 +18,8 @@
/* Genode includes */
#include <util/fifo.h>
namespace Kernel
{
namespace Kernel {
class Thread;
/**
@ -138,12 +138,15 @@ class Kernel::Ipc_node
template <typename F> void for_each_helper(F f)
{
/* if we have a helper in the receive buffer, call 'f' for it */
if (_caller && _caller->_help) f(_caller->_thread);
if (_caller && _caller->_help)
f(_caller->_thread);
/* call 'f' for each helper in our request queue */
_request_queue.for_each([f] (Queue_item &item) {
Ipc_node &node { item.object() };
if (node._help) f(node._thread);
if (node._help)
f(node._thread);
});
}

15
repos/base-hw/src/core/kernel/irq.cc
View File

@ -17,12 +17,16 @@
#include <kernel/irq.h>
void Kernel::Irq::disable() const {
cpu_pool().executing_cpu().pic().mask(_irq_nr); }
void Kernel::Irq::disable() const
{
cpu_pool().executing_cpu().pic().mask(_irq_nr);
}
void Kernel::Irq::enable() const {
cpu_pool().executing_cpu().pic().unmask(_irq_nr, Cpu::executing_id()); }
void Kernel::Irq::enable() const
{
cpu_pool().executing_cpu().pic().unmask(_irq_nr, Cpu::executing_id());
}
Kernel::Irq::Pool &Kernel::User_irq::_pool()
@ -36,7 +40,8 @@ Kernel::User_irq::User_irq(unsigned const irq,
Genode::Irq_session::Trigger trigger,
Genode::Irq_session::Polarity polarity,
Signal_context & context)
: Irq(irq, _pool()), _context(context)
:
Irq(irq, _pool()), _context(context)
{
disable();
cpu_pool().executing_cpu().pic().irq_mode(_irq_nr, trigger, polarity);

15
repos/base-hw/src/core/kernel/irq.h
View File

@ -25,8 +25,8 @@
/* core includes */
#include <kernel/signal_receiver.h>
namespace Kernel
{
namespace Kernel {
/**
* Kernel back-end interface of an interrupt
*/
@ -38,8 +38,9 @@ namespace Kernel
class User_irq;
}
namespace Genode
{
namespace Genode {
/**
* Core front-end of a user interrupt
*/
@ -78,7 +79,11 @@ class Kernel::Irq : Genode::Avl_node<Irq>
* \param pool pool this interrupt shall belong to
*/
Irq(unsigned const irq, Pool &pool)
: _irq_nr(irq), _pool(pool) { _pool.insert(this); }
:
_irq_nr(irq), _pool(pool)
{
_pool.insert(this);
}
virtual ~Irq() { _pool.remove(this); }

4
repos/base-hw/src/core/kernel/lock.h
View File

@ -15,8 +15,8 @@
#ifndef _CORE__SPEC__SMP__KERNEL__LOCK_H_
#define _CORE__SPEC__SMP__KERNEL__LOCK_H_
namespace Kernel
{
namespace Kernel {
class Lock;
Lock & data_lock();

73
repos/base-hw/src/core/kernel/object.cc
View File

@ -17,88 +17,95 @@ Object::Object(Thread &obj)
_obj { (void *)&obj }
{ }
Object::Object(Irq &obj)
:
_type { IRQ },
_obj { (void *)&obj }
{ }
Object::Object(Signal_receiver &obj)
:
_type { SIGNAL_RECEIVER },
_obj { (void *)&obj }
{ }
Object::Object(Signal_context &obj)
:
_type { SIGNAL_CONTEXT },
_obj { (void *)&obj }
{ }
Object::Object(Pd &obj)
:
_type { PD },
_obj { (void *)&obj }
{ }
Object::Object(Vm &obj)
:
_type { VM },
_obj { (void *)&obj }
{ }
Object::~Object()
{
for (Object_identity * oi = first(); oi; oi = first())
oi->invalidate();
}
namespace Kernel {
template <> Pd *Object::obj<Pd>() const
{
if (_type != PD) {
return nullptr; }
if (_type != PD)
return nullptr;
return reinterpret_cast<Pd *>(_obj);
}
template <> Irq *Object::obj<Irq>() const
{
if (_type != IRQ) {
return nullptr; }
if (_type != IRQ)
return nullptr;
return reinterpret_cast<Irq *>(_obj);
}
template <> Signal_receiver *Object::obj<Signal_receiver>() const
{
if (_type != SIGNAL_RECEIVER) {
return nullptr; }
if (_type != SIGNAL_RECEIVER)
return nullptr;
return reinterpret_cast<Signal_receiver *>(_obj);
}
template <> Signal_context *Object::obj<Signal_context>() const
{
if (_type != SIGNAL_CONTEXT) {
return nullptr; }
if (_type != SIGNAL_CONTEXT)
return nullptr;
return reinterpret_cast<Signal_context *>(_obj);
}
template <> Thread *Object::obj<Thread>() const
{
if (_type != THREAD) {
return nullptr; }
if (_type != THREAD)
return nullptr;
return reinterpret_cast<Thread *>(_obj);
}
template <> Vm *Object::obj<Vm>() const
{
if (_type != VM) {
return nullptr; }
if (_type != VM)
return nullptr;
return reinterpret_cast<Vm *>(_obj);
}
@ -122,7 +129,11 @@ void Object_identity::invalidate()
Object_identity::Object_identity(Object & object)
: _object(&object) { _object->insert(this); }
:
_object(&object)
{
_object->insert(this);
}
Object_identity::~Object_identity() { invalidate(); }
@ -135,11 +146,16 @@ Object_identity::~Object_identity() { invalidate(); }
Object_identity_reference *
Object_identity_reference::find(Pd &pd)
{
if (!_identity) return nullptr;
if (!_identity)
return nullptr;
for (Object_identity_reference * oir = _identity->first();
oir; oir = oir->next())
if (&pd == &(oir->_pd)) return oir;
oir; oir = oir->next()) {
if (&pd == &(oir->_pd))
return oir;
}
return nullptr;
}
@ -149,9 +165,12 @@ Object_identity_reference::find(capid_t capid)
{
using Avl_node_base = Genode::Avl_node<Object_identity_reference>;
if (capid == _capid) return this;
if (capid == _capid)
return this;
Object_identity_reference * subtree =
Avl_node_base::child(capid > _capid);
return (subtree) ? subtree->find(capid) : nullptr;
}
@ -165,17 +184,23 @@ Object_identity_reference * Object_identity_reference::factory(void * dst,
}
void Object_identity_reference::invalidate() {
if (_identity) _identity->remove(this);
void Object_identity_reference::invalidate()
{
if (_identity)
_identity->remove(this);
_identity = nullptr;
}
Object_identity_reference::Object_identity_reference(Object_identity *oi,
Pd &pd)
: _capid(pd.capid_alloc().alloc()), _identity(oi), _pd(pd), _in_utcbs(0)
:
_capid(pd.capid_alloc().alloc()), _identity(oi), _pd(pd), _in_utcbs(0)
{
if (_identity) _identity->insert(this);
if (_identity)
_identity->insert(this);
_pd.cap_tree().insert(this);
}
@ -188,5 +213,7 @@ Object_identity_reference::~Object_identity_reference()
}
Object_identity_reference * Object_identity_reference_tree::find(capid_t id) {
return (first()) ? first()->find(id) : nullptr; }
Object_identity_reference * Object_identity_reference_tree::find(capid_t id)
{
return (first()) ? first()->find(id) : nullptr;
}

23
repos/base-hw/src/core/kernel/object.h
View File

@ -25,8 +25,8 @@
#include <kernel/interface.h>
#include <kernel/kernel.h>
namespace Kernel
{
namespace Kernel {
/*
* Forward declarations
*/
@ -118,9 +118,8 @@ class Kernel::Object : private Object_identity_list
};
class Kernel::Object_identity
: public Object_identity_list::Element,
public Kernel::Object_identity_reference_list
class Kernel::Object_identity : public Object_identity_list::Element,
public Kernel::Object_identity_reference_list
{
private:
@ -145,8 +144,9 @@ class Kernel::Object_identity
class Kernel::Object_identity_reference
: public Genode::Avl_node<Kernel::Object_identity_reference>,
public Genode::List<Kernel::Object_identity_reference>::Element
:
public Genode::Avl_node<Kernel::Object_identity_reference>,
public Genode::List<Kernel::Object_identity_reference>::Element
{
private:
@ -171,8 +171,10 @@ class Kernel::Object_identity_reference
***************/
template <typename KOBJECT>
KOBJECT * object() {
return _identity ? _identity->object<KOBJECT>() : nullptr; }
KOBJECT * object()
{
return _identity ? _identity->object<KOBJECT>() : nullptr;
}
Object_identity_reference * factory(void * dst, Pd &pd);
@ -204,7 +206,8 @@ class Kernel::Object_identity_reference
class Kernel::Object_identity_reference_tree
: public Genode::Avl_tree<Kernel::Object_identity_reference>
:
public Genode::Avl_tree<Kernel::Object_identity_reference>
{
public:

25
repos/base-hw/src/core/kernel/pd.h
View File

@ -24,12 +24,11 @@
#include <util/reconstructible.h>
namespace Genode {
class Platform_pd;
}
namespace Genode { class Platform_pd; }
namespace Kernel {
namespace Kernel
{
class Cpu;
/**
@ -68,8 +67,8 @@ class Kernel::Pd
*/
Pd(Hw::Page_table &table,
Genode::Platform_pd &platform_pd)
: _table(table), _platform_pd(platform_pd),
mmu_regs((addr_t)&table)
:
_table(table), _platform_pd(platform_pd), mmu_regs((addr_t)&table)
{
capid_t invalid = _capid_alloc.alloc();
assert(invalid == cap_id_invalid());
@ -87,9 +86,9 @@ class Kernel::Pd
oir->~Object_identity_reference();
}
static capid_t syscall_create(Genode::Kernel_object<Pd> & p,
Hw::Page_table & tt,
Genode::Platform_pd & pd)
static capid_t syscall_create(Genode::Kernel_object<Pd> &p,
Hw::Page_table &tt,
Genode::Platform_pd &pd)
{
return call(call_id_new_pd(), (Call_arg)&p,
(Call_arg)&tt, (Call_arg)&pd);
@ -120,7 +119,9 @@ class Kernel::Pd
template<>
inline Kernel::Core_object_identity<Kernel::Pd>::Core_object_identity(Kernel::Pd & pd)
: Object_identity(pd.kernel_object()),
Object_identity_reference(this, pd.core_pd() ? pd : core_pd()) { }
:
Object_identity(pd.kernel_object()),
Object_identity_reference(this, pd.core_pd() ? pd : core_pd())
{ }
#endif /* _CORE__KERNEL__PD_H_ */

4
repos/base-hw/src/core/kernel/perf_counter.h
View File

@ -14,8 +14,8 @@
#ifndef _CORE__KERNEL__PERF_COUNTER_H_
#define _CORE__KERNEL__PERF_COUNTER_H_
namespace Kernel
{
namespace Kernel {
/**
* Performance counter
*/

62
repos/base-hw/src/core/kernel/signal_receiver.cc
View File

@ -33,6 +33,7 @@ void Signal_handler::cancel_waiting()
Signal_handler::Signal_handler(Thread &thread) : _thread { thread } { }
Signal_handler::~Signal_handler() { cancel_waiting(); }
@ -42,7 +43,8 @@ Signal_handler::~Signal_handler() { cancel_waiting(); }
void Signal_context_killer::cancel_waiting()
{
if (_context) { _context->_killer_cancelled(); }
if (_context)
_context->_killer_cancelled();
}
@ -61,7 +63,8 @@ Signal_context_killer::~Signal_context_killer() { cancel_waiting(); }
void Signal_context::_deliverable()
{
if (_submits) { _receiver._add_deliverable(*this); }
if (_submits)
_receiver._add_deliverable(*this);
}
@ -77,27 +80,36 @@ void Signal_context::_killer_cancelled() { _killer = 0; }
bool Signal_context::can_submit(unsigned const n) const
{
if (_killed || _submits >= (unsigned)~0 - n) { return false; }
if (_killed || _submits >= (unsigned)~0 - n)
return false;
return true;
}
void Signal_context::submit(unsigned const n)
{
if (_killed || _submits >= (unsigned)~0 - n) { return; }
if (_killed || _submits >= (unsigned)~0 - n)
return;
_submits += n;
if (_ack) { _deliverable(); }
if (_ack)
_deliverable();
}
void Signal_context::ack()
{
if (_ack) { return; }
if (_ack)
return;
if (!_killed) {
_ack = 1;
_deliverable();
return;
}
if (_killer) {
_killer->_context = 0;
_killer->_thread.signal_context_kill_done();
@ -110,7 +122,9 @@ bool Signal_context::can_kill() const
{
/* check if in a kill operation or already killed */
if (_killed) {
if (_ack) { return true; }
if (_ack)
return true;
return false;
}
return true;
@ -120,14 +134,15 @@ bool Signal_context::can_kill() const
void Signal_context::kill(Signal_context_killer &k)
{
/* check if in a kill operation or already killed */
if (_killed) {
if (_killed)
return;
}
/* kill directly if there is no unacknowledged delivery */
if (_ack) {
_killed = 1;
return;
}
/* wait for delivery acknowledgement */
_killer = &k;
_killed = 1;
@ -138,14 +153,17 @@ void Signal_context::kill(Signal_context_killer &k)
Signal_context::~Signal_context()
{
if (_killer) { _killer->_thread.signal_context_kill_failed(); }
if (_killer)
_killer->_thread.signal_context_kill_failed();
_receiver._context_destructed(*this);
}
Signal_context::Signal_context(Signal_receiver & r, addr_t const imprint)
: _receiver(r),
_imprint(imprint)
:
_receiver(r),
_imprint(imprint)
{
r._add_context(*this);
}
@ -157,9 +175,9 @@ Signal_context::Signal_context(Signal_receiver & r, addr_t const imprint)
void Signal_receiver::_add_deliverable(Signal_context &c)
{
if (!c._deliver_fe.enqueued()) {
if (!c._deliver_fe.enqueued())
_deliver.enqueue(c._deliver_fe);
}
_listen();
}
@ -169,7 +187,8 @@ void Signal_receiver::_listen()
while (1)
{
/* check for deliverable signals and waiting handlers */
if (_deliver.empty() || _handlers.empty()) { return; }
if (_deliver.empty() || _handlers.empty())
return;
/* create a signal data-object */
typedef Genode::Signal_context * Signal_imprint;
@ -196,7 +215,10 @@ void Signal_receiver::_listen()
void Signal_receiver::_context_destructed(Signal_context &c)
{
_contexts.remove(c._contexts_fe);
if (!c._deliver_fe.enqueued()) { return; }
if (!c._deliver_fe.enqueued())
return;
_deliver.remove(c._deliver_fe);
}
@ -211,14 +233,18 @@ void Signal_receiver::_add_context(Signal_context &c) {
bool Signal_receiver::can_add_handler(Signal_handler const &h) const
{
if (h._receiver) { return false; }
if (h._receiver)
return false;
return true;
}
void Signal_receiver::add_handler(Signal_handler &h)
{
if (h._receiver) { return; }
if (h._receiver)
return;
_handlers.enqueue(h._handlers_fe);
h._receiver = this;
h._thread.signal_wait_for_signal();

7
repos/base-hw/src/core/kernel/signal_receiver.h
View File

@ -21,8 +21,8 @@
#include <kernel/core_interface.h>
#include <object.h>
namespace Kernel
{
namespace Kernel {
class Thread;
/**
@ -77,6 +77,7 @@ class Kernel::Signal_handler
void cancel_waiting();
};
class Kernel::Signal_context_killer
{
friend class Signal_context;
@ -104,6 +105,7 @@ class Kernel::Signal_context_killer
void cancel_waiting();
};
class Kernel::Signal_context
{
friend class Signal_receiver;
@ -216,6 +218,7 @@ class Kernel::Signal_context
Object &kernel_object() { return _kernel_object; }
};
class Kernel::Signal_receiver
{
friend class Signal_context;

14
repos/base-hw/src/core/kernel/thread.cc
View File

@ -114,7 +114,8 @@ void Thread::ipc_copy_msg(Thread &sender)
Thread::Tlb_invalidation::Tlb_invalidation(Thread & caller, Pd & pd,
addr_t addr, size_t size,
unsigned cnt)
: caller(caller), pd(pd), addr(addr), size(size), cnt(cnt)
:
caller(caller), pd(pd), addr(addr), size(size), cnt(cnt)
{
cpu_pool().work_list().insert(&_le);
caller._become_inactive(AWAITS_RESTART);
@ -122,7 +123,8 @@ Thread::Tlb_invalidation::Tlb_invalidation(Thread & caller, Pd & pd,
Thread::Destroy::Destroy(Thread & caller, Genode::Kernel_object<Thread> & to_delete)
: caller(caller), thread_to_destroy(to_delete)
:
caller(caller), thread_to_destroy(to_delete)
{
thread_to_destroy->_cpu->work_list().insert(&_le);
caller._become_inactive(AWAITS_RESTART);
@ -229,6 +231,7 @@ void Thread::_deactivate_used_shares()
thread._deactivate_used_shares(); });
}
void Thread::_activate_used_shares()
{
Cpu_job::_activate_own_share();
@ -236,6 +239,7 @@ void Thread::_activate_used_shares()
thread._activate_used_shares(); });
}
void Thread::_become_active()
{
if (_state != ACTIVE && !_paused) { _activate_used_shares(); }
@ -820,7 +824,8 @@ Thread::Thread(unsigned const priority, unsigned const quota,
:
Kernel::Object { *this },
Cpu_job(priority, quota), _ipc_node(*this), _state(AWAITS_START),
_label(label), _core(core), regs(core) { }
_label(label), _core(core), regs(core)
{ }
Thread::~Thread() { _ipc_free_recv_caps(); }
@ -842,7 +847,8 @@ Genode::uint8_t __initial_stack_base[DEFAULT_STACK_SIZE];
*****************/
Core_thread::Core_thread()
: Core_object<Thread>("core")
:
Core_object<Thread>("core")
{
using namespace Genode;

7
repos/base-hw/src/core/kernel/thread.h
View File

@ -32,9 +32,7 @@
/* base-local includes */
#include <base/internal/native_utcb.h>
namespace Kernel
{
namespace Kernel {
struct Thread_fault;
class Thread;
class Core_thread;
@ -114,8 +112,7 @@ class Kernel::Thread : private Kernel::Object, public Cpu_job, private Timeout
enum { START_VERBOSE = 0 };
enum State
{
enum State {
ACTIVE = 1,
AWAITS_START = 2,
AWAITS_IPC = 3,

23
repos/base-hw/src/core/kernel/timer.cc
View File

@ -24,7 +24,9 @@ void Timer::Irq::occurred() { _cpu.scheduler().timeout(); }
Timer::Irq::Irq(unsigned id, Cpu &cpu)
: Kernel::Irq(id, cpu.irq_pool()), _cpu(cpu) {}
:
Kernel::Irq(id, cpu.irq_pool()), _cpu(cpu)
{ }
time_t Timer::timeout_max_us() const
@ -39,10 +41,10 @@ void Timer::set_timeout(Timeout * const timeout, time_t const duration)
* Remove timeout if it is already in use. Timeouts may get overridden as
* result of an update.
*/
if (timeout->_listed) {
if (timeout->_listed)
_timeout_list.remove(timeout);
} else {
timeout->_listed = true; }
else
timeout->_listed = true;
/* set timeout parameters */
timeout->_end = time() + duration;
@ -84,8 +86,12 @@ void Timer::process_timeouts()
time_t t = time();
while (true) {
Timeout * const timeout = _timeout_list.first();
if (!timeout) { break; }
if (timeout->_end > t) { break; }
if (!timeout)
break;
if (timeout->_end > t)
break;
_timeout_list.remove(timeout);
timeout->_listed = false;
timeout->timeout_triggered();
@ -94,8 +100,9 @@ void Timer::process_timeouts()
Timer::Timer(Cpu & cpu)
: _device(cpu.id()), _irq(interrupt_id(), cpu),
_last_timeout_duration(_max_value())
:
_device(cpu.id()), _irq(interrupt_id(), cpu),
_last_timeout_duration(_max_value())
{
/*
* The timer frequency should allow a good accuracy on the smallest

5
repos/base-hw/src/core/kernel/timer.h
View File

@ -23,13 +23,13 @@
#include <board.h>
namespace Kernel
{
namespace Kernel {
class Cpu;
class Timeout;
class Timer;
}
/**
* A timeout causes a kernel pass and the call of a timeout specific handle
*/
@ -53,6 +53,7 @@ class Kernel::Timeout : Genode::List<Timeout>::Element
virtual ~Timeout() { }
};
/**
* A timer manages a continuous time and timeouts on it
*/

8
repos/base-hw/src/core/kernel/vm.h
View File

@ -24,8 +24,8 @@ namespace Genode { class Vm_state; }
#include <board.h>
namespace Kernel
{
namespace Kernel {
/**
* Kernel backend for a virtual machine
*/
@ -128,7 +128,9 @@ class Kernel::Vm : private Kernel::Object, public Cpu_job
void pause()
{
if (_scheduled != INACTIVE) Cpu_job::_deactivate_own_share();
if (_scheduled != INACTIVE)
Cpu_job::_deactivate_own_share();
_scheduled = INACTIVE;
}

5
repos/base-hw/src/core/kernel_log.cc
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@ -32,6 +32,9 @@ void Kernel::log(char const c)
static Serial serial { Genode::Platform::mmio_to_virt(UART_BASE),
UART_CLOCK, BAUD_RATE };
if (c == ASCII_LINE_FEED) serial.put_char(ASCII_CARRIAGE_RETURN);
if (c == ASCII_LINE_FEED)
serial.put_char(ASCII_CARRIAGE_RETURN);
serial.put_char(c);
}

16
repos/base-hw/src/core/native_pd_component.cc
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@ -16,14 +16,22 @@
using namespace Genode;
void Native_pd_component::upgrade_cap_slab() {
void Native_pd_component::upgrade_cap_slab()
{
_pd_session._pd->upgrade_slab(_pd_session._sliced_heap);
//throw Out_of_ram();
}
Native_pd_component::Native_pd_component(Pd_session_component &pd, char const *)
: _pd_session(pd) { _pd_session._ep.manage(this); }
:
_pd_session(pd)
{
_pd_session._ep.manage(this);
}
Native_pd_component::~Native_pd_component() { _pd_session._ep.dissolve(this); }
Native_pd_component::~Native_pd_component()
{
_pd_session._ep.dissolve(this);
}

1
repos/base-hw/src/core/native_utcb.cc
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@ -16,6 +16,7 @@
#include <hw/memory_map.h>
Genode::Native_utcb * Genode::utcb_main_thread() {
return (Genode::Native_utcb*) Hw::Mm::core_utcb_main_thread().base; }

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