Commit Graph

748 Commits

Author SHA1 Message Date
Alexander Boettcher
e87d60ddf7 core: use Mutex/Blockade
Issue #3612
2020-04-17 12:40:12 +02:00
Stefan Kalkowski
f051065582 Retire OMAP4 support
Fix #2850
2020-04-17 12:39:32 +02:00
Piotr Tworek
585c4b8c69 hw: Add support for Qemu virt arm platforms.
This patch adds support for booting base-hw kernel on qemu-arm virt
machines. The arm_virt machine has 2GB of RAM, 2 Cortex A15 cores and
uses GICv2 interrupt controller. The arm_64_virt machine also has 2GB of
RAM, but has 4 Cortex A53 cores and uses GICv3. Both machines use PSCI
to boot additional CPU cores.

Fixes #3673
2020-04-17 12:39:32 +02:00
Piotr Tworek
dad1de1865 hw: Add interface for making basic ARM PSCI calls.
So far this only exposes two functions allowing the code to turn on
additional CPUs. There is much more functionality defined by PSCI spec
but so far its not needed by Genode.

Fixes #3672
2020-04-17 12:39:32 +02:00
Norman Feske
46fa8197a2 depot: update recipe hashes 2020-03-26 11:39:02 +01:00
Stefan Kalkowski
256b2fa3e1 hw: cortex a9 diagnostic register fixup
This is a follow-up fix for commit 202333c881.
It checks for the diagnostic registers being already setup correctly.
Otherwise on platforms with secure firmware, like Pandaboard it will stuck.

Ref #3639
2020-03-26 11:39:02 +01:00
Norman Feske
0f3ac4cb9f base-hw: let upgrade_cap_slab reflect Out_of_caps
This patch reflects the Out_of_caps exception from core to the client,
in addition to the already covered Out_of_ram exception. It thereby
eliminates a potential abort in core, which I observed with the
tool_chain_auto.run script:

  Kernel: RPC upgrade_cap_slab
  Error: Uncaught exception of type 'Genode::Quota_guard<Genode::Cap_quota>::Limit_exceeded'
  Warning: abort called - thread: entrypoint

In addition to propagating the exception, the patch add the client-side
exception-handling code to the base library.

Fixes #3703
2020-03-26 11:38:59 +01:00
Stefan Kalkowski
6d48b5484d hw: correct the ARM cache maintainance operations
This commit fixes the following issues regarding cache maintainance
under ARM:

* read out I-, and D-cache line size at runtime and use the correct one
* remove 'update_data_region' call from unprivileged syscalls
* rename 'update_instr_region' syscall to 'cache_coherent_region' to
  reflect what it doing, namely make I-, and D-cache coherent
* restrict 'cache_coherent_region' syscall to one page at a time
* lookup the region given in a 'cache_coherent_region' syscall in the
  page-table of the PD to prevent machine exceptions in the kernel
* only clean D-cache lines, do not invalidate them when pages where
  added on Cortex-A8 and ARMv6 (MMU sees phys. memory here)
* remove unused code relicts of cache maintainance

In addition it introduces per architecture memory clearance functions
used by core, when preparing new dataspaces. Thereby, it optimizes:

* on ARMv7 using per-word assignments
* on ARMv8 using cacheline zeroing
* on x86_64 using 'rept stosq' assembler instruction

Fix #3685
2020-03-26 11:38:55 +01:00
Alexander Boettcher
e096202b1f hw/x86: use PAT for write combining support
Fixes #3623
2020-03-26 11:38:54 +01:00
Alexander Boettcher
44ace04b95 hw/x86: add cpuid register macro
Issue #3623
2020-03-26 11:38:54 +01:00
Alexander Boettcher
507a34b3d0 hw/x86: implement wrmsr in macro
Issue #3623
2020-03-26 11:38:54 +01:00
Christian Helmuth
5affd51250 depot: update recipe hashes 2020-02-28 08:59:43 +01:00
Stefan Thöni
a7a9855493 base: lay groundwork for base-linux caps change
Include the necessary hooks to introduce file descriptor
based capabilities in base linux.

Issue #3581
2020-02-27 14:46:58 +01:00
Christian Helmuth
4cccf74664 depot: update recipe hashes 2020-02-20 12:11:23 +01:00
Stefan Kalkowski
8cc48d5688 hw: be more accurate in synchronizing ASID/Pages
Fix #3651
2020-02-20 12:11:23 +01:00
Alexander Boettcher
5440cd4b50 base: use blockade in thread
Issue #3612
2020-02-20 12:11:22 +01:00
Alexander Boettcher
00f69bc70d base: add mutex as derivate of lock
The mutex class is more restrictive in usage compared to
Genode::Lock.

- At initialiation time it is ever unlocked.
- No thread is permitted to lock twice. Warn about it
  in case it happens.
- Only the lock onwer is permitted to unlock the mutex.
  Warn about it and don't unlock the mutex in case it happens.

Issue #3612
2020-02-20 12:11:22 +01:00
Stefan Kalkowski
725d16e18e hw: optimize ipc capability allocation
In preparation of ipc receive, by now a bunch of capabilities got
allocated to be ready iin case of capability receiption. After that
unuse slots were freed again. This overhead of senseless (de-)allocations
is replaced in this commit by just restock capability slots that got
used by the last receive.

Fix #3640
2020-02-20 12:11:22 +01:00
Martin Stein
e42a205a51 base-hw: Ada-compliant scheduler method signatures
Ref #3308
2020-02-20 12:11:22 +01:00
Martin Stein
0d5f185267 base-hw: no pointers in scheduler interface
Ref #3308
2020-02-20 12:11:22 +01:00
Martin Stein
c146a215fb base-hw: cpu scheduler without inheritance
Ref #3308
2020-02-20 12:11:21 +01:00
Martin Stein
eef7b5e168 base-hw: double list without inheritance
Ref #3308
2020-02-20 12:11:21 +01:00
Martin Stein
a753b6ce46 base-hw: fix run scripts
Ref #3308
2020-02-20 12:11:21 +01:00
Martin Stein
793e12f8f3 base-hw: no error return codes in signaling
Error return codes are used with non-const functions in the signaling modules.
This would have been impractical for the in-place translation of the module to
Ada in the context of the Spunky project. Besides, it is easy to get rid of
them and it makes the execution flow more clear.

Ref #3308
2020-02-20 12:11:21 +01:00
Martin Stein
751e6430fa base-hw: obsolete Kernel::Thread::_signal_receiver
Ref #3308
2020-02-20 12:11:21 +01:00
Martin Stein
9eb20c2be7 base-hw: no pointer arguments in signaling
Besides reducing the use of pointers in base-hw, this prepares for the in-place
translation of the signaling module to Ada in the context of the Spunky
project.

Ref #3308
2020-02-20 12:11:21 +01:00
Martin Stein
5e460394d2 base-hw: do not inherit Kernel::Object
This prevents the use of Kernel::Object as base class for the specific kernel
objects and instead makes it a member of the kernel objects. Besides
simplifying inheritance hierarchies in base-hw, this prepares for the in-place
translation of the signaling module (and others) to Ada in the context of the
Spunky project.

Ref #3308
2020-02-20 12:11:21 +01:00
Martin Stein
88043e144a base-hw: no virtual functions in signaling
Besides simplifying the execution flow in the signaling module, this prepares
for the in-place translation of the signaling module to Ada in the context of
the Spunky project.

Ref #3308
2020-02-20 12:11:21 +01:00
Martin Stein
3cc7774fe4 base-hw: Ada/SPARK-friendly Ipc_node interface
This prevents the use of C++ features in the public method interface of the
synchronous-IPC module that would be impractical for the in-place
translation of the module into Ada in the context of the Spunky project.

* Get rid of thread accessor.
* Get rid of non-const functions with return values.
* Get rid of pointer return-values.

Ref #3308
2020-02-20 12:11:21 +01:00
Martin Stein
a04243aaf4 base-hw: remove unused Ipc_node accessor methods
Ref #3308
2020-02-20 12:11:21 +01:00
Martin Stein
5a95183c3e base-hw: avoid that Ipc_node inherits
Besides simplifying inheritance hierarchies in base-hw, this prepares for the
in-place translation of the synchronous-IPC module to Ada in the context of the
Spunky project.

Ref #3308
2020-02-20 12:11:21 +01:00
Martin Stein
6a5aa18a7b base-hw: no PD code / virt methods in Ipc_node
This is a simplication of the asyncronous-IPC module of the base-hw kernel.
Besides structuring the code in a cleaner way, it prepares for the in-place
translation of the module into Ada in the context of the Spunky project.

* Get rid of virtual methods in Ipc_node.
* Move all stuff related to protection domains, capabilities, and UTCBs to
  the Thread class. this code might later be moved to a dedicated module, but
  for now it's just fine to have it done by the thread module.

Ref #3308
2020-02-20 12:11:21 +01:00
Stefan Kalkowski
79fba6c2ac core: add kernel-specific UTCB quota bookkeeping
Fix #859
2020-02-20 12:11:21 +01:00
Tomasz Gajewski
4f217b19a9 hw: add CPU wake up code for rpi3
Moved code waking up processors for Cortex A53 before changing privilege
level because sending events to higher privilege levels is not allowed.

Fixed enable_mmu for Cortex A53 to properly return cpu id.

Fixed starting code for secondary cores to properly initialize stacks.

Added code to wake up secondary cores on rpi3.

Ref #3573
2020-02-20 12:08:17 +01:00
Stefan Kalkowski
202333c881 hw: cortex a9 diagnostic register initialization
We cannot count on the correct initialization of the diagnostic register
of the secondary cores. But the boot core gets initialized by the bootchain,
so we can copy over those values.

Fix #3639
2020-02-20 12:08:17 +01:00
Norman Feske
57ea1dbdd3 depot: update recipe hashes 2020-02-10 14:29:06 +01:00
Stefan Kalkowski
56ef7ca9e7 hw: enable ARMv8 performance counter
Fix #3618
2020-02-04 16:05:01 +01:00
Christian Helmuth
90535a1401 depot: update recipe hashes 2020-02-04 15:51:10 +01:00
Alexander Boettcher
7b964fa700 base: add affinity space info to platform info
Issue #3599
2020-02-04 15:51:10 +01:00
Sebastian Sumpf
1902d1a06b hw: do not map boot modules in bootstrap
This commit safes virtual address space.
2020-02-04 15:51:08 +01:00
Norman Feske
beb8bf498c base-hw: add explicit array-bounds check
This patch rules out out-of-bounds array accesses without inspecting the
caller. It is not a bug fix but adds clarity.
2020-02-04 15:51:08 +01:00
Norman Feske
de764d8490 base-hw/muen: add explicit array-bounds check 2020-02-04 15:51:08 +01:00
Norman Feske
5635c1318c base-hw: explicit bounds check in store_apic_id
Avoid relying on the caller regarding the CPU index argument to ease the
reasoning about the code.
2020-02-04 15:51:08 +01:00
Christian Helmuth
b931b67cba depot: update recipe hashes 2019-12-19 17:01:43 +01:00
Alexander Boettcher
e54ff599ca base-hw: trace execution time of core threads
Fixes #3572
2019-12-19 17:01:43 +01:00
Sebastian Sumpf
04969b6be0 base-hw: add trace execution time support
This enables the 'top' program on base-hw for debugging issue #3247 on
rpi.

Fixes #3572
2019-12-19 17:01:42 +01:00
Emery Hemingway
648382db74 Align after template expansion
Clang Cannot align template structs. Also, cannot cast void* to addr_t
in constexpr function.

Issue #3564
2019-12-19 16:59:03 +01:00
Emery Hemingway
2c510bb7f9 Remove unused lamba capture to fix clang warning
Issue #3564
2019-12-19 16:59:03 +01:00
Christian Helmuth
11ef8e1ff2 depot: update recipe hashes 2019-11-28 09:06:39 +01:00
Stefan Kalkowski
4800bcf5a0 hw: correct the i.MX6 Sabrelite timer settings
Fix #3561
2019-11-25 15:43:59 +01:00