MAC address retrieval was switched to more generic upstream (5.13) NVMEM
based solution in commit 06bb4a5018 ("ramips: convert mtd-mac-address
to nvmem implementation") , but NVMEM subsystem wasn't enabled in the
kernel, so fix it now.
References: https://github.com/openwrt/openwrt/pull/4041#issuecomment-883322801
Fixes: 06bb4a5018 ("ramips: convert mtd-mac-address to nvmem implementation")
Signed-off-by: David Bauer <mail@david-bauer.net>
Signed-off-by: Petr Štetiar <ynezz@true.cz> [commit message]
Define nvmem-cells and convert mtd-mac-address to nvmem implementation.
The conversion is done with an automated script.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Rework patch 681-NET-add-mtd-mac-address-support to implement
only the function to read the mac-address from mtd.
Generalize mtd-mac-address-increment function so it can be applied
to any source of of_get_mac_address.
Rename any mtd-mac-address-increment to mac-address-increment.
Rename any mtd-mac-address-increment-byte to mac-address-increment-byte.
This should make simplify the conversion of target to nvmem implementation.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Commands in 10_fix_wifi_mac were not properly concatenated, so
this was also triggered for the second phy without giving a
MAC address as argument.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Specifications:
* SoC: MT7621AT
* RAM: 256MB
* Flash: 128MB NAND flash
* WiFi: MT7615DN (2.4GHz+5Ghz) with DBDC
* LAN: 5x1000M
* Firmware layout is Uboot with extra 96 bytes in header
* Base PCB is DIR-1360 REV1.0
* LEDs Power Blue+Orange,Wan Blue+Orange,WPS Blue,"2.4G"Blue, "5G" Blue,
USB Blue
* Buttons Reset,WPS, Wifi
MAC addresses on OEM firmware:
lan factory 0xe000 f4:*:*:a8:*:65 (label)
wan factory 0xe006 f4:*:*:a8:*:68
2.4 GHz [not on flash] f6:*:*:c8:*:66
5.0 GHz factory 0x4 f4:*:*:a8:*:66
The increment of the 4th byte for the 2.4g address appears to vary.
Reported cases:
5g 2.4g increment
f4:XX:XX:a8:XX:66 f6:XX:XX:c8:XX:66 +0x20
x0:xx:xx:68:xx:xx x2:xx:xx:48:xx:xx -0x20
x4:xx:xx:6a:xx:xx x6:xx:xx:4a:xx:xx -0x20
Since increment is inconsistent and there is no obvious pattern
in swapping bytes, and the 2.4g address has local bit set anyway,
it seems safer to use the LAN address with flipped byte here in
order to prevent collisions between OpenWrt devices and OEM devices
for this interface. This way we at least use an address as base
that is definitely owned by the device at hand.
Flashing instruction:
The Dlink "Emergency Room" cannot be accessed through the reset
button on this device. You can either use console or use the
encrypted factory image availble in the openwrt forum.
Once the encrypted image is flashed throuh the stock Dlink web
interface, the sysupgrade images can be used.
Header pins needs to be soldered near the WPS and Wifi buttons.
The layout for the pins is (VCC,RX,TX,GND). No need to connect the VCC.
the settings are:
Bps/Par/Bits : 57600 8N1
Hardware Flow Control : No
Software Flow Control : No
Connect your client computer to LAN1 of the device
Set your client IP address manually to 192.168.0.101 / 255.255.255.0.
Call the recovery page or tftp for the device at http://192.168.0.1
Use the provided emergency web GUI to upload and flash a new firmware to
the device
At the time of adding support the wireless config needs to be set up by
editing the wireless config file:
* Setting the country code is mandatory, otherwise the router loses
connectivity at the next reboot. This is mandatory and can be done
from luci. After setting the country code the router boots correctly.
A reset with the reset button will fix the issue and the user has to
reconfigure.
* This is minor since the 5g interface does not come up online although
it is not set as disabled. 2 options here:
1- Either run the "wifi" command. Can be added from LUCI in system -
startup - local startup and just add wifi above "exit 0".
2- Or add the serialize option in the wireless config file as shown
below. This one would work and bring both interfaces automatically
at every boot:
config wifi-device 'radio0'
option serialize '1'
config wifi-device 'radio1'
option serialize '1'
Signed-off-by: Karim Dehouche <karimdplay@gmail.com>
[rebase, improve MAC table, update wireless config comment, fix
2.4g macaddr setup]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Specifications:
- SoC: MT7621AT
- RAM: 256MB
- Flash: 128MB NAND
- Ethernet: 5 Gigabit ports
- WiFi: 2.4G/5G MT7615N
- USB: 1 USB 3.0, 1 USB 2.0
This device is very similar to the EA7300 v1/v2, EA7500 v2, and EA8100 v1.
Installation:
Upload the generated factory image through the factory web interface.
(following part taken from EA7300 v2 commit message:)
This might fail due to the A/B nature of this device. When flashing, OEM
firmware writes over the non-booted partition. If booted from 'A',
flashing over 'B' won't work. To get around this, you should flash the
OEM image over itself. This will then boot the router from 'B' and
allow you to flash OpenWRT without problems.
Reverting to factory firmware:
Hard-reset the router three times to force it to boot from 'B.' This is
where the stock firmware resides. To remove any traces of OpenWRT from
your router simply flash the OEM image at this point.
With thanks to Tom Wizetek (@wizetek) for testing.
Signed-off-by: Tee Hao Wei <angelsl@in04.sg>
This PR adds support for router D-Link DIR-853-R1
Specifications:
SoC: MT7621AT
RAM: 128MB
Flash: 16MB SPI
WiFi: MT7615DN (2.4GHz+5Ghz) with DBDC (This mode allows this
single chip act as an 2x2 11n radio and an 2x2 11ac radio at the
same time)
LAN: 5x1000M
LEDs Power Blue+Orange,Wan Blue+Orange,WPS Blue,"2.4G"Blue, "5G" Blue
USB Blue
Buttons Reset,WPS, Wifi
MAC addresses:
|Interface | MAC | Factory |Comment
|------------|-----------------|-------------|----------------
|WAN sticker |C4:XX:XX:6E:XX:2A| |Sticker
|LAN |C4:XX:XX:6E:XX:2B| |
|Wifi (5g) |C4:XX:XX:6E:XX:2C|0x4 |
|Wifi (2.4g) |C6:XX:XX:7E:XX:2C| |
| | | |
| |C4:XX:XX:6E:XX:2E|0x8004 0xe000|
| |C4:XX:XX:6E:XX:2F|0xe006 |
The increment of the 4th byte for the 2.4g address appears to vary.
Reported cases:
5g 2.4g increment
C4:XX:XX:6E:XX:2C C6:XX:XX:7E:XX:2C 0x10
f4:XX:XX:16:XX:32 f6:XX:XX:36:XX:32 0x20
F4:XX:XX:A6:XX:E3 F6:XX:XX:B6:XX:E3 0x10
Since increment is inconsistent and there is no obvious pattern
in swapping bytes, and the 2.4g address has local bit set anyway,
it seems safer to use the LAN address with flipped byte here in
order to prevent collisions between OpenWrt devices and OEM devices
for this interface. This way we at least use an address as base
that is definitely owned by the device at hand.
Flashing instruction:
The Dlink "Emergency Room"
Connect your client computer to LAN1 of the device
Set your client IP address manually to 192.168.0.101 / 255.255.255.0.
Then, power down the router, press and hold the reset button, then
re-plug it. Keep the reset button pressed until the internet LED stops
flashing
Call the recovery page or tftp for the device at http://192.168.0.1
Use the provided emergency web GUI to upload and flash a new firmware to
the device.
Signed-off-by: Stas Fiduchi <fiduchi@protonmail.com>
[commit title/message improvements, use correct label MAC address,
calculate MAC addresses based on 0x4, minor DTS style fixes, add
uart2 to state_default, remove factory image, add 2.4g MAC address,
use partition DTSI, add macaddr comment in DTS]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
sysupgrade metadata is not flashed to the device, so check-size
should be called _before_ adding metadata to the image.
While at it, do some obvious wrapping improvements.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Acked-by: Paul Spooren <mail@aparcar.org>
The minew g1-c is a smart home gateway / BLE gateway.
A Nordic nRF52832 is available via USB UART (cp210x) to support BLE.
The LED ring is a ring of 24x ws2812b connect to a generic GPIO (unsupported).
There is a small LED which is only visible when the device is open which
will be used as LED until the ws2812b is supported.
The board has also a micro sdcard/tfcard slot (untested).
The Nordic nRF52832 exposes SWD over a 5pin header (GND, VCC, SWD, SWC, RST).
The vendor uses an older OpenWrt version, sysupgrade can be used via
serial or ssh.
CPU: MT7628AN / 580MHz
RAM: DDR2 128 MiB RAM
Flash: SPI NOR 16 MiB W25Q128
Ethernet: 1x 100 mbit (Port 0) (PoE in)
USB: USB hub, 2x external, 1x internal to USB UART
Power: via micro usb or PoE 802.11af
UART: 3.3V, 115200 8n1
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Hardware
--------
MediaTek MT7621 SoC
256M DDR3
16MB BoHong SPI-NOR
MediaTek MT7905+7975 2x2T2R DBDC bgnax / acax
RGB LED
WPS + RESET Button
UART on compute module (silkscreened / 115200n8)
The router itself is just a board with Power / USB / RJ-45 connectors
and DC/DC converters. The SoC and WiFi components are on a
daughterboard which connect using two M.2 connectors.
The compute module has the model number "T-CB1800K-DM2 V02" printed on
it. The main baord has "T-MB5EU V01" printed on it. This information
might be useful, as it's highly likely either of these two will be
reused in similar designs.
The router itself is sold as Tenbay T-MB5EU directly from the OEM as
well as "KuWFI AX1800 Smart WiFi 6 Eouter" on Amazon.de for ~50€ in a
slightly different case.
Installation
------------
A Tool for creating a factory image for the Vendor Web Interface can be
found here: https://github.com/blocktrron/t-mb5eu-v01-factory-creator/
As the OEM Firmware is just a modified LEDE 17.01, you can also access
failsafe mode via UART while the OS boots, by connecting to UART
and pressing "f" when prompted. The Router is reachable at
192.168.1.1 via root without password.
Transfer the OpenWrt sysupgrade image via scp and apply with sysupgrade
using the -n and -F flags.
Alternatively, the board can be flashed by attaching to the UART
console, interrupting the boot process by keeping "0" pressed while
attaching power.
Serve the OpenWrt initramfs using a TFTP server with address
192.168.1.66. Rename the initramfs to ax1800.bin.
Attach your TFTP server to one of the LAN ports. Execute the following
commands.
$ setenv ipaddr 192.168.1.67
$ setenv serverip 192.168.1.66
$ tftpboot 0x84000000 ax1800.bin
$ bootm
Wait for the device to boot. Then transfer the OpenWrt sysupgrade image
to the device using SCP and apply sysupgrade.
Signed-off-by: David Bauer <mail@david-bauer.net>
This adds a driver for the AW9523 I2C GPIO expander.
This driver is required to make LEDs as well as buttons on the Tenbay
T-MB5EU-V01 work.
This driver already had several upstream iterations. I'm working to
push this driver to mainline.
Ref: https://patchwork.ozlabs.org/project/linux-gpio/list/?series=226287
Signed-off-by: David Bauer <mail@david-bauer.net>
It was reported AR8033 did not work in fiber operation mode on the ER-X.
While the earlier attempt of fixing this mitigated the issue of 1000
Base-X link mode not being supported, it also switched to the copper
page, breaking fiber operation altogether.
Extend the hack adding fiber operation so it does not switch to the
copper page. Also remove the part where the supported link mode bit for
1000 Base-X is removed, as this is required for fiber operation.
Signed-off-by: David Bauer <mail@david-bauer.net>
Ensure the esw is initialized before the ethernet device is sending
packets. Further implement carrier detection similar to mt7620.
If any port has a link, the ethernet device will detect a carrier.
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
For rt3050 the switch needs to be initialized before the ethernet start sending
packets. Allow switch_init to return -EPROBE_DEFER.
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
The dts defines the reset fe for all architectures. However
the soc code used direct register access of the reset controller.
Replace the custom soc reset with a generic fe_reset_fe().
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
The fe_reset function direct access the reset controller instead
using the reset controller api. In preparation to use the
reset controller.
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
In the new kernel version 5.X,reboot will fail.
When SOC is reset, flash has not exited the 4-byte address mode,
which causes the operation mode mismatch of flash during boot.Add
broken-flash-reset to make flash exit 4-byte address mode before
SOC reset
Signed-off-by: Liu Yu <f78fk@live.com>
Without this definition ethernet led can work as usual, but it's better to
re-add it. Relying on default values may cause uncontrollable factors.
Fixes: 882a6116d3 ("ramips: improve pinctrl for Youku YK-L1")
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
These boards have AR8327 or QCA8337 external ethernet switch.
The SOC also has it's own internal switch
where VLAN is now enabled by default.
Changes to preinit caused all switches to have VLANs enabled by default
even if they are not configured with a topology in uci_defaults
(see commit f017f617ae)
When both internal and external switches have VLANs,
and the external switch has both LAN and WAN,
the TX traffic from the SOC cannot flow to the tagged port on the external switch
because the VLAN IDs are not matching.
So disable the internal switch VLANs by default on these boards.
Also, add a topology for the internal switch,
so that on LuCI there is not an "unknown topology" warning.
In theory, it may be possible to have LAN ports on both switches
through internal and external PHYs, but there are no known boards that have this.
Signed-off-by: Michael Pratt <mcpratt@pm.me>
Define and use some missing macros,
and use them instead of BIT() or numbers for more readable code.
Add comment for a bit change that seems unrelated to ethernet
but is actually needed (PCIe Root Complex mode).
Remove unknown and unused macro RST_CTRL_MCM
(probably from MT7621 / MT7622)
This is the last of a series of fixes, so bump version.
Signed-off-by: Michael Pratt <mcpratt@pm.me>
the register bits for TX delay and RX delay are opposites:
when TX delay bit is set, delay is enabled
when RX delay bit is set, delay is disabled
So, when both bits are unset, it is RX delay
and when both bits are set, it is TX delay
Note: TXID is the default RGMII mode of the SOC
Fixes: 5410a8e295 ("ramips: mt7620: add rgmii delays support")
Signed-off-by: Michael Pratt <mcpratt@pm.me>
Add back the register write to disable internal PHYs
as a separate option in the code that can be set using a DTS property.
Set the option to true by default
when an external mt7530 switch is identified.
This makes the driver more in sync with original SDK code
while keeping the lines separated into different options
to accommodate any board with any PHY layout.
Signed-off-by: Michael Pratt <mcpratt@pm.me>
The function mt7620_mdio_mode is only called once
and both the function and mdio_mode block have been named incorrectly,
leading to confusion and useless commits.
These lines in the mdio_mode block of mt7620_hw_init
are only intended for boards with an external mt7530 switch.
(see commit 194ca6127e)
Therefore, move lines from mdio_mode to the place in soc_mt7620.c
where the type of mt7530 switch is identified,
and move lines from mt7620_mdio_mode to a main function.
mt7620_mdio_mode was called from mt7620_gsw_init
where the priv struct is available,
so the lines must stay in mt7620_gsw_init function.
In order to keep things as simple as possible,
keep the DTS property related function calls together,
by moving them from mt7620_gsw_probe to init.
Remove the now useless DTS properties and extra phy nodes.
Fixes: 5a6229a93d ("ramips: remove superfluous & confusing DT binding")
Fixes: b85fe43ec8 ("ramips: mt7620: add force use of mdio-mode")
Signed-off-by: Michael Pratt <mcpratt@pm.me>
Set the PHY base address to 12 for mt7530 and 8 for others,
which is based on the default setting for some devices
from printing the register with the following command
after it is written to by uboot during the boot cycle.
`md 0x10117014 1`
PHY_BASE option only uses 5 bits of the register,
bits 16 to 20, so use 8-bit integer type.
Set the option using the DTS property mediatek,ephy-base
and create the gsw node if missing.
Also, added a kernel message to display the EPHY base address.
Note:
If anything is written to a PHY address that is greater than 1 hex char (greater than 0xf)
then there is adverse effects with Atheros switches.
Signed-off-by: Michael Pratt <mcpratt@pm.me>
When the new variable ephy_base was introduced,
it was not applied to the if block for mdio_mode.
The first line in the mdio_mode if block
sets the EPHY base address to 12 in the SOC by writing a register,
but the corresponding variable in the driver
was still set to the default of 0.
This causes subsequent lines that write registers with the function
_mt7620_mii_write
to write to PHY addresses 0 through 4
while internal PHYs have been moved to addresses 12 through 16.
All of these lines are intended only for PHYs on the SOC internal switch,
however, they are being written to external ethernet switches
if they exist at those PHY addresses 0 through 4.
This causes some ethernet ports to be broken on boards with AR8327 or QCA8337 switch.
Other suggested fixes move those lines to the else block of mdio_mode,
but removing the else block completely also fixes it.
Therefore, move the lines to the mt7620_hw_init function main block,
and have only one instance of the function mtk_switch_w32
for writing the register with the EPHY base address.
In theory, this also allows for boards that have both external switches
and internal PHYs that lead to ethernet ports to be supported.
Fixes: 391df37829 ("ramips: mt7620: add EPHY base mdio address changing possibility")
Signed-off-by: Michael Pratt <mcpratt@pm.me>
A workaround was added to the switch driver
to set SOC port 4 as an RGMII GMAC interface
based on the DTS property mediatek,port4-gmac.
(previously mediatek,port4)
However, the ethernet driver already does this,
but is being blocked by a return statement
whenever the phy-handle and fixed-link properties
are both missing from nodes that define the port properties.
Revert the workaround, so that both the switch driver
and ethernet driver are not doing the same thing
and move the phy-handle related lines down
so nothing is ending the function prematurely.
While at it, clean up kernel messages
and delete useless return statements.
Fixes: f6d81e2fa1 ("mt7620: gsw: make IntPHY and ExtPHY share mdio addr 4 possible")
Signed-off-by: Michael Pratt <mcpratt@pm.me>
These nodes are used for configuring a GMAC interface
and for defining external PHYs to be accessed with MDIO.
None of this is possible on MT7620N, only MT7620A,
so remove them from all MT7620N DTS.
When the mdio-bus node is missing, the driver returns -NODEV
which causes the internal switch to not initialize.
Replace that return so that everything works without the DTS node.
Also, an extra kernel message to indicate for all error conditions
that mdio-bus is disabled.
Fixes: d482356322 ("ramips: mt7620n: add mdio node and disable port4 by default")
Fixes: aa5014dd1a ("ramips: mt7620n: enable port 4 as EPHY by default")
Signed-off-by: Michael Pratt <mcpratt@pm.me>
There are only 2 options in the driver
for the function of mt7620 internal switch port 4:
EPHY mode (RJ-45, internal PHY)
GMAC mode (RGMII, external PHY)
Let the DTS property be boolean instead of string
where EPHY mode is the default.
Fix how the properties are written
for all DTS that use them,
and add missing nodes where applicable,
and remove useless nodes,
and minor DTS formatting.
Signed-off-by: Michael Pratt <mcpratt@pm.me>
* only add factory.bin when it's defined
* fix check-size vs. append-metadata
* whitespace/line break cleanup
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* Remove micro-DTSI mt7621_dlink_dir-882-x1.dtsi to ease reading
config without too much inheritance
* Use "separate" partitioning DTSIs so we can use the partitioning
without a complete match on the other settings (i.e. without the
former parent DTSI)
* Rename files to express the new organization
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This patch failed to apply, breaking builds for the ramips target.
Fixes commit c44cefceb3 ("generic: kernel 5.4: fix probe error for AR803x PHYs")
Signed-off-by: David Bauer <mail@david-bauer.net>
The patch adds support for the TP-Link Archer C6 v3 (FCC ID TE7A6V3)
The patch adds identification changes to the existing TP-Link Archer A6,
by Vinay Patil <post2vinay@gmail.com>, which has identical hardware.
Specification
-------------
MediaTek MT7621 SOC
RAM: 128MB DDR3
SPI Flash: W25Q128 (16MB)
Ethernet: MT7530 5x 1000Base-T
WiFi 5GHz: Mediatek MT7613BE
WiFi 2.4GHz: Mediatek MT7603E
UART/Serial: 115200 8n1
Device Configuration & Serial Port Pins
---------------------------------------
ETH Ports: LAN4 LAN3 LAN2 LAN1 WAN
_______________________
| |
Serial Pins: | VCC GND TXD RXD |
|_____________________|
LEDs: Power Wifi2G Wifi5G LAN WAN
Build Output
------------
The build will generate following set of files
[1] openwrt-ramips-mt7621-tplink_archer-c6-v3-initramfs-kernel.bin
[2] openwrt-ramips-mt7621-tplink_archer-c6-v3-squashfs-factory.bin
[3] openwrt-ramips-mt7621-tplink_archer-c6-v3-squashfs-sysupgrade.bin
How to Use - Flashing from TP-Link Web Interface
------------------------------------------------
* Go to "Advanced/System Tools/Firmware Update".
* Click "Browse" and upload the OpenWrt factory image: factory.bin[2]
* Click the "Upgrade" button, and select "Yes" when prompted.
TFTP Booting
------------
Setup a TFTP boot server with address 192.168.0.5.
While starting U-boot press '4' key to stop autoboot.
Copy the initramfs-kernel.bin[1] to TFTP server folder, rename as test.bin
From u-boot command prompt run tftpboot followed by bootm.
Recovery
--------
Archer A6 V3 has recovery page activated if SPI booting from flash fails.
Recovery page can be activated by powercycling the router four times
before the boot process is complete.
Note: TFTP boot can be activated only from u-boot serial console.
Device recovery address: 192.168.0.1
Signed-off-by: Amish Vishwakarma <vishwakarma.amish@gmail.com>
[fix indent]
Signed-off-by: David Bauer <mail@david-bauer.net>
The default trigger for the amber lights on lan1 and lan3 were
mistakenly swapped after the device's migration to DSA. This
caused activity on one port to trigger the amber light on the
other port. Swapping their default trigger in the DTS file
fixes that.
Signed-off-by: Adam Elyas <adamelyas@outlook.com>
[minor commit title adjustment, wrap commit message]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
At this moment kernel size in mt7620 snapshot builds is bigger than 2048k.
It should be disabled by default.
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Since few months multiple users reported problems with various JBoot
devices. [0][1][2][3] All of them was bricked.
On my Lava LR-25G001 it freezes with current snapshot:
CDW57CAM_003 Jboot B695
Giga Switch AR8327 init
AR8327/AR8337 id ==> 0x1302
JRecovery Version R1.2 2014/04/01 18:25
SPI FLASH: MX25l12805d 16M
.
.
(freeze)
The kernel size is >2048k.
I built current master with minimal config and it boots well:
CDW57CAM_003 Jboot B695
Giga Switch AR8327 init
AR8327/AR8337 id ==> 0x1302
JRecovery Version R1.2 2014/04/01 18:25
SPI FLASH: MX25l12805d 16M
.
...........................
Starting kernel @80000000...
[ 0.000000] Linux version 5.4.124
Kernel size is <2048k.
Jboot bootloader isn't open source, so it's impossible to find
solution in code. It looks, that some buffer for kernel have 2MB size.
To avoid bricked devices, this commit introduces 2048k limit kernel
size for all jboot routers.
[0] https://bugs.openwrt.org/index.php?do=details&task_id=3539
[1] https://eko.one.pl/forum/viewtopic.php?pid=254344
[2] https://eko.one.pl/forum/viewtopic.php?id=20930
[3] https://eko.one.pl/forum/viewtopic.php?pid=241376#p241376
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
[remove Fixes:]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Set the ethernet address from flash.
MAC addresses as verified by OEM firmware:
use interface source
2g wlan0 factory 0x04 (label)
LAN eth0.1 factory 0x28 (label+1)
WAN eth0.2 factory 0x2e (label+2)
Fixes: 671c9d16e3 ("ramips: add support for HILINK HLK-7628N")
Signed-off-by: Liu Yu <f78fk@live.com>
[drop old MAC address setup from 02_network, cut out state_default
changes, face-lift commit message, add Fixes:]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
The patch for adding the config_aneg function for the Atheros
AR8031/AR8033 PHY was formatted in a way it moved to different PHY
models while refreshing patches on kernel updates.
Move the diff directly below the PHY name so this won't happen in the
future.
Signed-off-by: David Bauer <mail@david-bauer.net>
This enables autonegotiation for all ephy ports on probe.
Some devices do not configure the ports, particularly port 4.
Signed-off-by: Gaspare Bruno <gaspare@anlix.io>
[replace magic values ; reword commit message]
Signed-off-by: David Bauer <mail@david-bauer.net>
The basic mode control register of the ESW PHYs is modified in this
codeblock. Use the respective macros to make this code more readable.
Signed-off-by: David Bauer <mail@david-bauer.net>
As patches for the AR8031/AR8033 copper page selection were merged
upstream, we can backport these patches.
This also fixes a PHY capabilities detection issue on the Ubiquiti
ER-X-SFP.
Signed-off-by: David Bauer <mail@david-bauer.net>
The SERCOMM NA502 is a smart home gateway manufactured by SERCOMM and sold
under different brands (among others, A1 Telekom Austria SmartHome
Gateway). It has multi-protocol radio support in addition to LAN and WiFi.
Note: BLE is currently unsupported.
Specifications
--------------
- MT7621ST 880MHz, Single-Core, Dual-Thread
- MT7603EN 2.4GHz WiFi
- MT7662EN 5GHz WiFi + BLE
- 128MiB NAND
- 256MiB DDR3 RAM
- SD3503 ZWave Controller
- EM357 Zigbee Coordinator
MAC address assignment
----------------------
LAN MAC is read from the config partition, WiFi 2.4GHz is LAN+2 and matches
the OEM firmware. WiFi 5GHz with LAN+1 is an educated guess since the
OEM firmware does not enable 5GHz WiFi.
Installation
------------
Attach serial console, then boot the initramfs image via TFTP.
Once inside OpenWrt, run sysupgrade -n with the sysupgrade file.
Attention: The device has a dual-firmware design. We overwrite kernel2,
since kernel1 contains an automatic recovery image.
If you get NAND ECC errors and are stuck with bad eraseblocks, try to
erase the mtd partition first with
mtd unlock ubi
mtd erase ubi
This should only be needed once.
Signed-off-by: Andreas Böhler <dev@aboehler.at>
[use kiB for IMAGE_SIZE]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
About the device
----------------
SoC: MediaTek MT7620a @ 580MHz
RAM: 64M
FLASH: 8MB
WiFi: SoC-integrated: MediaTek MT7620a bgn
WiFi: MediaTek MT7612EN nac
GbE: 2x (RTL8211F)
BTN: - WPS
- Reset
- Router/Repeater/AP (3-way slide-switch)
LED: - WPS (blue)
- 3-segment Wifi signal representation (blue)
- WiFi (blue)
- WAN (blue)
- LAN (blue)
- Power (blue)
UART: UART is present as Pads with through-holes on the PCB. They are
located next to the reset button and are labelled Vcc/TX/RX/GND as
appropriate. Use 3.3V, 57600-8N1.
Installation
------------
Using the webcmd interface
--------------------------
Warning: Do not update to the latest Wavlink firmware (version
20201201) as this removes the webcmd console and you will need to
use the serial port instead.
You will need to have built uboot/sqauashfs image for this device,
and you will need to provide an HTTP service where the image can
be downloaded from that is accessible by the device.
You cannot use the device manufacturers firmware upgrade interface
as it rejects the OpenWrt image.
1. Log into the device's admin portal. This is necessary to
authenticate you as a user in order to be able to access the
webcmd interface.
2. Navigate to http://<device-ip>/webcmd.shtml - you can access
the console directly through this page, or you may wish to
launch the installed `telnetd` and use telnet instead.
* Using telnet is recommended since it provides a more
convenient shell interface that the web form.
* Launch telnetd from the form with the command `telnetd`.
* Check the port that telnetd is running on using
`netstat -antp|grep telnetd`, it is likely to be 2323.
* Connect to the target using `telnet`. The username should
be `admin2860`, and the password is your admin password.
3. On the target use `curl` to download the image.
e.g. `curl -L -O http://<some-other-lan-ip>/openwrt-ramips-mt7620-\
wavlink_wl-wn579x3-squashfs-sysupgrade.bin`.
Check the hash using `md5sum`.
4. Use the mtd_write command to flash the image.
* The flash partition should be mtd4, but check
/sys/class/mtd/mtd4/name first. The partition should be
called 'Kernel'.
* To flash use the following command:
`mtd_write -r -e /dev/mtd<n> write <image-file> /dev/mtd<n>`
Where mtd<n> is the Kernel partition, and <image-file> is
the OpenWrt image previously downloaded.
* The command above will erase, flash and then reboot the
device. Once it reboots it will be running OpenWrt.
Connect via ssh to the device at 192.168.1.1 on the LAN port.
The WAN port will be configured via DHCP.
Using the serial port
---------------------
The device uses uboot like many other MT7260a based boards. To
use this interface, you will need to connect to the serial
interface, and provide a TFTP server. At boot follow the
bootloader menu and select option 2 to erase/flash the image.
Provide the address and filename details for the tftp server.
The bootloader will do the rest.
Once the image is flashed, the board will boot into OpenWrt. The
console is available over the serial port.
Signed-off-by: Ben Gainey <ba.gainey@googlemail.com>
