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ramips: ethernet: ralink: use the reset controller api for esw & ephy
Instead of writing direct into the reset registers. Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
This commit is contained in:
parent
3fa01db479
commit
694561ae60
@ -439,8 +439,8 @@
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compatible = "mediatek,mt7628-esw", "ralink,rt3050-esw";
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reg = <0x10110000 0x8000>;
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resets = <&rstctrl 23>;
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reset-names = "esw";
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resets = <&rstctrl 23 &rstctrl 24>;
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reset-names = "esw", "ephy";
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interrupt-parent = <&intc>;
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interrupts = <17>;
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@ -319,8 +319,8 @@
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compatible = "ralink,rt3050-esw";
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reg = <0x10110000 0x8000>;
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resets = <&rstctrl 23>;
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reset-names = "esw";
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resets = <&rstctrl 23 &rstctrl 24>;
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reset-names = "esw", "ephy";
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interrupt-parent = <&intc>;
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interrupts = <17>;
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@ -331,8 +331,8 @@
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compatible = "ralink,rt3352-esw", "ralink,rt3050-esw";
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reg = <0x10110000 0x8000>;
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resets = <&rstctrl 23>;
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reset-names = "esw";
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resets = <&rstctrl 23 &rstctrl 24>;
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reset-names = "esw", "ephy";
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interrupt-parent = <&intc>;
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interrupts = <17>;
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@ -356,8 +356,8 @@
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compatible = "ralink,rt5350-esw", "ralink,rt3050-esw";
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reg = <0x10110000 0x8000>;
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resets = <&rstctrl 23>;
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reset-names = "esw";
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resets = <&rstctrl 23 &rstctrl 24>;
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reset-names = "esw", "ephy";
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interrupt-parent = <&intc>;
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interrupts = <17>;
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@ -17,9 +17,11 @@
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <asm/mach-ralink/ralink_regs.h>
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#include <linux/of_device.h>
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#include <linux/of_irq.h>
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#include <linux/switch.h>
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#include <linux/reset.h>
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#include "mtk_eth_soc.h"
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@ -172,7 +174,6 @@
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#define RT5350_ESW_REG_PXTPC(_x) (0x150 + (4 * _x))
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#define RT5350_EWS_REG_LED_POLARITY 0x168
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#define RT5350_RESET_EPHY BIT(24)
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enum {
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/* Global attributes. */
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@ -232,6 +233,8 @@ struct rt305x_esw {
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int led_frequency;
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struct esw_vlan vlans[RT305X_ESW_NUM_VLANS];
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struct esw_port ports[RT305X_ESW_NUM_PORTS];
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struct reset_control *rst_esw;
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struct reset_control *rst_ephy;
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};
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@ -254,6 +257,29 @@ static inline void esw_rmw_raw(struct rt305x_esw *esw, unsigned reg,
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__raw_writel(t | val, esw->base + reg);
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}
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static void esw_reset(struct rt305x_esw *esw)
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{
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if (!esw->rst_esw)
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return;
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reset_control_assert(esw->rst_esw);
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usleep_range(60, 120);
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reset_control_deassert(esw->rst_esw);
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/* the esw takes long to reset otherwise the board hang */
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msleep(10);
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}
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static void esw_reset_ephy(struct rt305x_esw *esw)
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{
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if (!esw->rst_ephy)
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return;
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reset_control_assert(esw->rst_ephy);
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usleep_range(60, 120);
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reset_control_deassert(esw->rst_ephy);
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usleep_range(60, 120);
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}
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static void esw_rmw(struct rt305x_esw *esw, unsigned reg,
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unsigned long mask, unsigned long val)
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{
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@ -505,8 +531,7 @@ static void esw_hw_init(struct rt305x_esw *esw)
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esw->ports[i].disable = (port_disable & (1 << i)) != 0;
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if (ralink_soc == RT305X_SOC_RT3352) {
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/* reset EPHY */
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fe_reset(RT5350_RESET_EPHY);
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esw_reset_ephy(esw);
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rt305x_mii_write(esw, 0, 31, 0x8000);
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for (i = 0; i < 5; i++) {
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@ -556,8 +581,7 @@ static void esw_hw_init(struct rt305x_esw *esw)
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/* select local register */
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rt305x_mii_write(esw, 0, 31, 0x8000);
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} else if (ralink_soc == RT305X_SOC_RT5350) {
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/* reset EPHY */
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fe_reset(RT5350_RESET_EPHY);
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esw_reset_ephy(esw);
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/* set the led polarity */
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esw_w32(esw, esw->reg_led_polarity & 0x1F,
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@ -614,8 +638,7 @@ static void esw_hw_init(struct rt305x_esw *esw)
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} else if (ralink_soc == MT762X_SOC_MT7628AN || ralink_soc == MT762X_SOC_MT7688) {
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int i;
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/* reset EPHY */
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fe_reset(RT5350_RESET_EPHY);
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esw_reset_ephy(esw);
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/* set the led polarity */
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esw_w32(esw, esw->reg_led_polarity & 0x1F,
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@ -1385,6 +1408,13 @@ static int esw_probe(struct platform_device *pdev)
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if (reg_init)
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esw->reg_led_polarity = be32_to_cpu(*reg_init);
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esw->rst_esw = devm_reset_control_get(&pdev->dev, "esw");
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if (IS_ERR(esw->rst_esw))
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esw->rst_esw = NULL;
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esw->rst_ephy = devm_reset_control_get(&pdev->dev, "ephy");
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if (IS_ERR(esw->rst_ephy))
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esw->rst_ephy = NULL;
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swdev = &esw->swdev;
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swdev->of_node = pdev->dev.of_node;
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swdev->name = "rt305x-esw";
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