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ramips: mt7620: move mt7620_mdio_mode() to ethernet driver
The function mt7620_mdio_mode is only called once and both the function and mdio_mode block have been named incorrectly, leading to confusion and useless commits. These lines in the mdio_mode block of mt7620_hw_init are only intended for boards with an external mt7530 switch. (see commit 194ca6127ee18cd3a95da4d03f02e43b5428c0bb) Therefore, move lines from mdio_mode to the place in soc_mt7620.c where the type of mt7530 switch is identified, and move lines from mt7620_mdio_mode to a main function. mt7620_mdio_mode was called from mt7620_gsw_init where the priv struct is available, so the lines must stay in mt7620_gsw_init function. In order to keep things as simple as possible, keep the DTS property related function calls together, by moving them from mt7620_gsw_probe to init. Remove the now useless DTS properties and extra phy nodes. Fixes: 5a6229a93df8 ("ramips: remove superfluous & confusing DT binding") Fixes: b85fe43ec8c4 ("ramips: mt7620: add force use of mdio-mode") Signed-off-by: Michael Pratt <mcpratt@pm.me>
This commit is contained in:
parent
0976b6c426
commit
6972e498d3
@ -155,8 +155,6 @@
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mtd-mac-address = <&factory 0x4>;
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mediatek,mdio-mode = <1>;
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phy-reset-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
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phy-reset-duration = <30>;
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@ -144,7 +144,6 @@
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mdio-bus {
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status = "okay";
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mediatek,mdio-mode;
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ethernet-phy@0 {
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reg = <0>;
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@ -115,9 +115,8 @@
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mdio-bus {
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status = "okay";
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mediatek,mdio-mode = <1>;
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phy0: ethernet-phy@0 {
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ethernet-phy@0 {
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reg = <0>;
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phy-mode = "rgmii";
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qca,ar8327-initvals = <
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@ -127,26 +126,6 @@
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0x94 0x00000000 /* PORT6_STATUS */
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>;
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};
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phy1: ethernet-phy@1 {
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reg = <1>;
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phy-mode = "rgmii";
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};
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phy2: ethernet-phy@2 {
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reg = <2>;
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phy-mode = "rgmii";
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};
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phy3: ethernet-phy@3 {
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reg = <3>;
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phy-mode = "rgmii";
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};
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phy4: ethernet-phy@4 {
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reg = <4>;
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phy-mode = "rgmii";
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};
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};
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};
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@ -61,31 +61,7 @@ static irqreturn_t gsw_interrupt_mt7620(int irq, void *_priv)
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return IRQ_HANDLED;
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}
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static int mt7620_mdio_mode(struct device_node *eth_node)
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{
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struct device_node *phy_node, *mdiobus_node;
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const __be32 *id;
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int ret = 0;
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mdiobus_node = of_get_child_by_name(eth_node, "mdio-bus");
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if (mdiobus_node) {
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if (of_property_read_bool(mdiobus_node, "mediatek,mdio-mode"))
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ret = 1;
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for_each_child_of_node(mdiobus_node, phy_node) {
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id = of_get_property(phy_node, "reg", NULL);
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if (id && (be32_to_cpu(*id) == 0x1f))
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ret = 1;
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}
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of_node_put(mdiobus_node);
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}
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return ret;
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}
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static void mt7620_hw_init(struct mt7620_gsw *gsw, int mdio_mode)
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static void mt7620_hw_init(struct mt7620_gsw *gsw)
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{
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u32 i;
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u32 val;
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@ -97,20 +73,6 @@ static void mt7620_hw_init(struct mt7620_gsw *gsw, int mdio_mode)
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/* Enable MIB stats */
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mtk_switch_w32(gsw, mtk_switch_r32(gsw, GSW_REG_MIB_CNT_EN) | (1 << 1), GSW_REG_MIB_CNT_EN);
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if (mdio_mode) {
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/* set MT7530 central align */
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val = mt7530_mdio_r32(gsw, 0x7830);
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val &= ~BIT(0);
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val |= BIT(1);
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mt7530_mdio_w32(gsw, 0x7830, val);
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val = mt7530_mdio_r32(gsw, 0x7a40);
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val &= ~BIT(30);
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mt7530_mdio_w32(gsw, 0x7a40, val);
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mt7530_mdio_w32(gsw, 0x7a78, 0x855);
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}
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if (gsw->ephy_base) {
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mtk_switch_w32(gsw, mtk_switch_r32(gsw, GSW_REG_GPC1) |
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(gsw->ephy_base << 16),
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@ -215,9 +177,13 @@ MODULE_DEVICE_TABLE(of, mediatek_gsw_match);
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int mtk_gsw_init(struct fe_priv *priv)
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{
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struct device_node *eth_node = priv->dev->of_node;
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struct device_node *phy_node, *mdiobus_node;
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struct device_node *np = priv->switch_np;
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struct platform_device *pdev = of_find_device_by_node(np);
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struct mt7620_gsw *gsw;
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const __be32 *id;
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u8 val;
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if (!pdev)
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return -ENODEV;
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@ -228,7 +194,23 @@ int mtk_gsw_init(struct fe_priv *priv)
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gsw = platform_get_drvdata(pdev);
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priv->soc->swpriv = gsw;
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mt7620_hw_init(gsw, mt7620_mdio_mode(priv->dev->of_node));
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mdiobus_node = of_get_child_by_name(eth_node, "mdio-bus");
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if (mdiobus_node) {
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for_each_child_of_node(mdiobus_node, phy_node) {
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id = of_get_property(phy_node, "reg", NULL);
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if (id && (be32_to_cpu(*id) == 0x1f))
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of_node_put(mdiobus_node);
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}
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}
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gsw->port4_ephy = !of_property_read_bool(np, "mediatek,port4-gmac");
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if (of_property_read_u8(np, "mediatek,ephy-base", &val) == 0)
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gsw->ephy_base = val;
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else
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gsw->ephy_base = 0;
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mt7620_hw_init(gsw);
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if (gsw->irq) {
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request_irq(gsw->irq, gsw_interrupt_mt7620, 0,
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@ -243,8 +225,6 @@ static int mt7620_gsw_probe(struct platform_device *pdev)
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{
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struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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struct mt7620_gsw *gsw;
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struct device_node *np = pdev->dev.of_node;
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u8 val;
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gsw = devm_kzalloc(&pdev->dev, sizeof(struct mt7620_gsw), GFP_KERNEL);
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if (!gsw)
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@ -256,13 +236,6 @@ static int mt7620_gsw_probe(struct platform_device *pdev)
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gsw->dev = &pdev->dev;
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gsw->port4_ephy = !of_property_read_bool(np, "mediatek,port4-gmac");
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if (of_property_read_u8(np, "mediatek,ephy-base", &val) == 0)
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gsw->ephy_base = val;
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else
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gsw->ephy_base = 0;
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gsw->irq = platform_get_irq(pdev, 0);
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platform_set_drvdata(pdev, gsw);
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@ -82,11 +82,26 @@ static const u16 mt7620_reg_table[FE_REG_COUNT] = {
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static int mt7620_gsw_config(struct fe_priv *priv)
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{
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struct mt7620_gsw *gsw = (struct mt7620_gsw *) priv->soc->swpriv;
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u32 val;
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/* is the mt7530 internal or external */
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if (priv->mii_bus && mdiobus_get_phy(priv->mii_bus, 0x1f)) {
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mt7530_probe(priv->dev, gsw->base, NULL, 0);
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mt7530_probe(priv->dev, NULL, priv->mii_bus, 1);
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/* magic values from original SDK */
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val = mt7530_mdio_r32(gsw, 0x7830);
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val &= ~BIT(0);
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val |= BIT(1);
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mt7530_mdio_w32(gsw, 0x7830, val);
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val = mt7530_mdio_r32(gsw, 0x7a40);
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val &= ~BIT(30);
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mt7530_mdio_w32(gsw, 0x7a40, val);
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mt7530_mdio_w32(gsw, 0x7a78, 0x855);
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pr_info("mt7530: mdio central align\n");
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} else {
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mt7530_probe(priv->dev, gsw->base, NULL, 1);
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}
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