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ramips: mt7620: fix ethernet driver GMAC port init

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A workaround was added to the switch driver
to set SOC port 4 as an RGMII GMAC interface
based on the DTS property mediatek,port4-gmac.
(previously mediatek,port4)

However, the ethernet driver already does this,
but is being blocked by a return statement
whenever the phy-handle and fixed-link properties
are both missing from nodes that define the port properties.

Revert the workaround, so that both the switch driver
and ethernet driver are not doing the same thing
and move the phy-handle related lines down
so nothing is ending the function prematurely.

While at it, clean up kernel messages
and delete useless return statements.

Fixes: f6d81e2fa1 ("mt7620: gsw: make IntPHY and ExtPHY share mdio addr 4 possible")
Signed-off-by: Michael Pratt <mcpratt@pm.me>
This commit is contained in:
Michael Pratt 2021-06-01 23:01:26 -04:00 committed by Chuanhong Guo
parent a2acdf9607
commit afd60d650e
2 changed files with 9 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
target/linux/ramips/files/drivers/net/ethernet/ralink/gsw_mt7620.c
View File

@ -211,12 +211,6 @@ static void mt7620_hw_init(struct mt7620_gsw *gsw, int mdio_mode)
_mt7620_mii_write(gsw, gsw->ephy_base + 4, 4, 0x05e1);
_mt7620_mii_write(gsw, gsw->ephy_base + 4, 16, 0x1313);
pr_info("gsw: setting port4 to ephy mode\n");
} else if (!mdio_mode) {
u32 val = rt_sysc_r32(SYSC_REG_CFG1);
val &= ~(3 << 14);
rt_sysc_w32(val, SYSC_REG_CFG1);
pr_info("gsw: setting port4 to gmac mode\n");
}
}

18
target/linux/ramips/files/drivers/net/ethernet/ralink/soc_mt7620.c
View File

@ -163,7 +163,6 @@ static void mt7620_port_init(struct fe_priv *priv, struct device_node *np)
(size != (4 * sizeof(*priv->phy->phy_fixed[id])))) {
pr_err("%s: invalid fixed link property\n", np->name);
priv->phy->phy_fixed[id] = NULL;
return;
}
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)
@ -205,10 +204,6 @@ static void mt7620_port_init(struct fe_priv *priv, struct device_node *np)
return;
}
priv->phy->phy_node[id] = of_parse_phandle(np, "phy-handle", 0);
if (!priv->phy->phy_node[id] && !priv->phy->phy_fixed[id])
return;
val = rt_sysc_r32(SYSC_REG_CFG1);
val &= ~(3 << shift);
val |= mask << shift;
@ -249,8 +244,8 @@ static void mt7620_port_init(struct fe_priv *priv, struct device_node *np)
val = 2;
break;
default:
dev_err(priv->dev, "invalid link speed: %d\n",
priv->phy->speed[id]);
dev_err(priv->dev, "port %d - invalid link speed: %d\n",
id, priv->phy->speed[id]);
priv->phy->phy_fixed[id] = 0;
return;
}
@ -264,7 +259,13 @@ static void mt7620_port_init(struct fe_priv *priv, struct device_node *np)
if (priv->phy->duplex[id])
val |= PMCR_DUPLEX;
mtk_switch_w32(gsw, val, GSW_REG_PORT_PMCR(id));
dev_info(priv->dev, "using fixed link parameters\n");
dev_info(priv->dev, "port %d - using fixed link parameters\n", id);
return;
}
priv->phy->phy_node[id] = of_parse_phandle(np, "phy-handle", 0);
if (!priv->phy->phy_node[id]) {
dev_err(priv->dev, "port %d - missing phy handle\n", id);
return;
}
@ -277,7 +278,6 @@ static void mt7620_port_init(struct fe_priv *priv, struct device_node *np)
fe_connect_phy_node(priv, priv->phy->phy_node[id], id);
gsw->autopoll |= BIT(be32_to_cpup(phy_addr));
mt7620_auto_poll(gsw,id);
return;
}
}