This is a stripped-down version of RB912UAG-(2,5)HPnD, without USB,
miniPCIe and SIM sockets.
This board has been supported in the ar71xx.
Add support based on RB912UAG board, by splitting out the common part to
.dtsi, and creating separate device tree for the stripped-down version.
Links:
* https://mikrotik.com/product/RB911G-2HPnD
* https://mikrotik.com/product/RB911G-5HPnD
* https://openwrt.org/toh/hwdata/mikrotik/mikrotik_rb911g-5hpnd
Hardware:
* SoC: Atheros AR9342,
* RAM: DDR 64MB,
* SPI NOR: 64KB,
* NAND: 128MB,
* Ethernet: x1 10/100/1000 port with passive POE in,
* Wi-Fi: 802.11 a/b/g/n (depending on band variant)
* LEDs: 5 general purpose LEDs (led1..led5), power LED, user LED,
Ethernet phy LED,
* Button,
* Beeper.
Flashing:
* Use the RouterBOARD Reset button to enable TFTP netboot,
boot kernel and initramfs and then perform sysupgrade.
* From ar71xx OpenWrt firmware run:
$ sysupgrade -F /tmp/<sysupgrade.bin>
For more info see: https://openwrt.org/toh/mikrotik/common.
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Image for RB912UAG-2HPnD supports the 5GHz variant without
modifications. Add it as alternative name, so it can be found easier.
While at that, adjust board display name in device tree, to reflect
that.
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
MT7688 devices use the "mt7628an.dtsi" as the template. And RT3052
devices use the "rt3050.dtsi" as template. Therefore, we need to add
the corresponding system controller compatible strings to make them
work properly.
Fixes: 1f818b09f8 ("ramips: add proper system clock and reset driver support for legacy SoCs")
Fixes: #14305
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
Partially revert changes to verbose logging that break the 'check' target
dependencies and trigger many runtime warnings like:
/home/kodidev/openwrt-project/include/toplevel.mk:213: *** mixed implicit and normal rules: deprecated syntax
Fixes: e4a43cda0 ("build: allow var.% targets to bypass the prepare steps")
Signed-off-by: Tony Ambardar <itugrok@yahoo.com>
Currently, WiFi interfaces on WXR-5950AX12 / WXR-6000AX12 devices
come up with some MAC addresses inconsistent with vendor and Ethernet
addresses. This adds a hotplug override in order to make it consistent
with what is in u-boot env as well as OAM firmware where 1st radio MAC
is set at Ethernet MAC + 8, and 2nd radio mac at Ethernet MAC + 16.
fw_printenv | grep addr
ethaddr=68:e1:dc:xx:xx:d8
ipaddr=192.168.11.1
wlan0addr=68:e1:dc:xx:xx:e0
wlan1addr=68:e1:dc:xx:xx:e8
wlan2addr=00:00:00:00:00:00
For OEM bootlog and MAC assagnment check
https://openwrt.org/toh/buffalo/wxr-5950ax12#openwrt_uimage_tftp_bootlog
Tested-by: Samir Ibradžić <sibradzic@gmail.com> # Buffalo WXR-6000AX12P
Signed-off-by: Samir Ibradžić <sibradzic@gmail.com>
Add modules.builtin.modinfo to the kernel package, to support presence
testing using module aliases and printing module details with 'modinfo'.
With related kmodloader changes this adds ~2 KB to compressed image sizes.
root@OpenWrt:/# modinfo unix
name: unix
filename: (builtin)
alias: net-pf-1
license: GPL
root@OpenWrt:/# modprobe net-pf-1 && echo SUCCESS || echo FAIL
SUCCESS
Signed-off-by: Tony Ambardar <itugrok@yahoo.com>
Add modules.builtin to the kernel package for improved handling of loadable
and builtin modules. As with other distros, this allows 'modprobe <module>'
to consistently return success for both loaded/built-in modules, a useful
feature for presence-testing.
Given OpenWrt's few built-in modules, this change and related kmodloader
support add ~1 KB to the compressed image size.
Using sch_fq_codel (builtin) and sch_cake (loadable) for example:
root@OpenWrt:/# modprobe sch_fq_codel && echo SUCCESS || echo FAIL
SUCCESS
root@OpenWrt:/# modprobe sch_cake && echo SUCCESS || echo FAIL
SUCCESS
root@OpenWrt:/# rmmod sch_fq_codel
module is builtin
Signed-off-by: Tony Ambardar <itugrok@yahoo.com>
Linksys MX4200 is a 802.11ax Tri-band router/AP.
Specifications:
* CPU: Qualcomm IPQ8174 Quad core Cortex-A53 1.4GHz
* RAM: 512MB of DDR3
* Storage: 512Mb NAND
* Ethernet: 4x1G RJ45 ports (QCA8075)
* WLAN:
* 2.4GHz: Qualcomm QCN5024 2x2 802.11b/g/n/ax 574 Mbps PHY rate
* 5GHz: Qualcomm QCN5054 2x2@80MHz or 2x2@160MHz 802.11a/b/g/n/ac/ax 2402 PHY rate
* 5GHz: Qualcomm QCN5054 4x4@80MHz or 2x2@160MHz 802.11a/b/g/n/ac/ax 2402 PHY rate
* LED-s:
* RGB system led
* Buttons: 1x Soft reset 1x WPS
* Power: 12V DC Jack
Installation instructions:
Open Linksys Web UI - http://192.168.1.1/ca or http://10.65.1.1/ca depending on your setup.
Login with your admin password. The default password can be found on a sticker under the device.
To enter into the support mode, click on the “CA” link and the bottom of the page.
Open the “Connectivity” menu and upload the squash-factory image with the “Choose file” button.
Click start. Ignore all the prompts and warnings by click “yes” in all the popups.
The Wifi radios are turned off by default. To configure the router, you will need to connect your computer to the LAN port of the device.
Then you would need to write openwrt to the other partition for it to work
- First Check booted partition
fw_printenv -n boot_part
- Then install Openwrt to the other partition if booted in slot 1:
mtd -r -e alt_kernel -n write openwrt-qualcommax-ipq807x-linksys_mx4200v(X)-squashfs-factory.bin alt_kernel
- If in slot 2:
mtd -r -e kernel -n write openwrt-qualcommax-ipq807x-linksys_mx4200v(X)-squashfs-factory.bin kernel
Replace (X) with your model version either 1 or 2
Signed-off-by: Mohammad Sayful Islam <sayf.mohammad01@gmail.com>
Reviewed-by: Robert Marko <robimarko@gmail.com>
Use reset controller to reset mt7620 ethernet phy instead of directly
writing system control registers. The reset line of "ephy" is 24, so
the DTS resets properties have been updated to get the correct reset
signal.
Tested on HiWiFi HC5861.
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
Use reset controller to reset mt7620 frame engine instead of directly
writing system control registers.
Tested on HiWiFi HC5861.
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
Currently OpenWRT does not know how to properly reset the network switch. This would result in
a switch that seemed to come up properly but was unable to handle any traffic. Presumably something
earlier in the boot chain is configuring a part of the switch that gets wiped out when its reset.
For now comment out the reset GPIO entry in the device tree until the driver better supports
bringing up the switch after a reset.
Signed-off-by: Michael 'ASAP' Weinrich <michael@a5ap.net>
In order to pass a status message at runtime,
which is usually listing subtargets
of a Makefile target or an error message,
from a child invocation of Make (submake)
through the parent process to the terminal,
the file descriptors 8 and 9 are opened to be used
by the functions MESSAGE and ERROR_MESSAGE.
However, there are situations where those functions
can be called while not in a submake or a subshell
or a child process which results in a shell error:
/bin/bash: 8: Bad file descriptor
Commit aee3594ffc
("verbose.mk: print ERROR messages in non-verbose")
has exposed this issue to more cases, but it is not the root cause.
To solve this, use the exit code of the first printf attempt
to the alternative file descriptors in order to tell whether
the standard file descriptors need to be used instead.
In order to get rid of the "Bad file descriptor" error, stderr is
redirected to null after grouping the two printf alternatives
into one command to combine outputs.
For ERROR_MESSAGE, the real message is redirected to stderr
after redirecting the error from the attempted printing to null.
For MESSAGE, without redirection, the Make function "shell"
will absorb the actual message from stdout and input the value into the Makefile,
therefore the dummy variable "_NULL", previously used merely for causing
a call to the MESSAGE function to trigger without writing target rules,
now has and a real value when defined, so rename it to "_MESSAGE"
as a placeholder for the real message when the output should be stdout.
When "_MESSAGE" has a value, use Make function "info" to
finally bring it from the Makefile to the terminal.
This also fixes what is likely a typo, in that
while file descriptor 9 is meant to redirect to stderr
for use in error messages like in the function ERROR_MESSAGE,
that function has printf redirecting to file descriptor 8 instead.
Fixes: a4c8d4e37 ("build: make the color of the 'configuration out of sync' warning red")
Signed-off-by: Michael Pratt <mcpratt@pm.me>
Run the invocation of Make with verbosity in order to
prevent the printing of Makefile level and subtarget status.
e.g. make[3] -C target/linux val.DEFAULT_PACKAGES val.ARCH_PACKAGES
Remove piping of stderr, which is only useful when using
the "communicate" method over the "run" method,
and this script would not be written to handle a captured error anyway.
For error testing, stdout and stderr can be set to a file object
with the open() function like this:
out = open('json_out', 'w')
err = open('json_err', 'w')
...
...
stdout=out,
stderr=err,
Signed-off-by: Michael Pratt <mcpratt@pm.me>
These targets are used to input variable values from the Make
context into other things like python scripts, so log messages
should be silenced and build prerequisites should be skipped.
The same thing is done for the other variable print target "val.%".
While at it, combine identical target rules into one definition.
Signed-off-by: Michael Pratt <mcpratt@pm.me>
Avoids dtc warnings regarding two sections having the same numbers.
X: duplicate unit-address (also used in node Y)
Signed-off-by: Rosen Penev <rosenp@gmail.com>
pcie-controller was renamed to pcie since at least kernel 4.14. Match it
here to get rid of dtc warnings.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
There are broken devices in the wild that handle duplicate IP address
detection by sending out ARP requests for the IP that they received from a
DHCP server and refuse the address if they get a reply.
When proxyarp is enabled, they would go into a loop of requesting an address
and then NAKing it again.
Fixes: https://github.com/openwrt/openwrt/issues/14309
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Update the gdb package to 14.1
* mpfr is now required, remove the 'without' and add dependency
* remove mpc 'without' that is parsed wrongly, causing "-Lno/lib"
* refresh patches
Signed-off-by: Hannu Nyman <hannu.nyman@iki.fi>
Include a patch[1] under review to fix the modpost error due to
upstream changes:
...
ERROR: modpost: "cifs_arc4_crypt" [fs/ksmbd/ksmbd.ko] undefined!
ERROR: modpost: "cifs_arc4_setkey" [fs/ksmbd/ksmbd.ko] undefined!
scripts/Makefile.modpost:133: recipe for target 'modules-only.symvers' failed
1. https://lore.kernel.org/all/20231227102605.4766-2-linkinjeon@kernel.org/
Signed-off-by: John Audia <therealgraysky@proton.me>
The default strength is not enough to provide stable connection
under 3.3v LDO voltage.
Fixes: 32d5921b8b ("rockchip: add Orange Pi R1 Plus LTS support")
Fixes: #13117Fixes: #13759
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
fast-xmit must only be enabled after the sta has been uploaded to the driver,
otherwise it could end up passing the not-yet-uploaded sta via drv_tx calls
to the driver, leading to potential crashes because of uninitialized drv_priv
data.
Add a missing sta->uploaded check and re-check fast xmit after inserting a sta.
Signed-off-by: Felix Fietkau <nbd@nbd.name>
`ok` status is obsolete and thus `okay` should be used instead:
spi@78b9000: status:0: 'ok' is not one of ['okay', 'disabled', 'reserved']
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Flash: 16MB SPI NOR flash (Macronix MX25L12805D)
Based on the manufactured datasheet this chip is capable of 50MHz.
We dont enable fast-read as mt7621 are only capable of 44mhz in a read state.
Tested on this unit without any issues.
Signed-off-by: David Bentham <db260179@gmail.com>
The rt305x series SOC have two UART devices,
and the one at bus address 0x500 is disabled by default.
Some boards do not even have a pinout for the first one,
so use the same one that the kernel uses at 0xc00 instead.
This allows the lzma-loader printing to be visible
alongside the kernel log in the same console.
Tested-by: Lech Perczak <lech.perczak@gmail.com> # zte,mf283plus
Signed-off-by: Michael Pratt <mcpratt@pm.me>
Before this was reworked, in the file for mt7621 subtarget
(target/linux/ramips/image/lzma-loader/src/board-mt7621.c)
the "Transmitter shift register empty" bit TEMT was used instead of
the "Transmitter holding register empty" bit THRE,
but after the rework, this value was labeled as the THRE bit instead.
Functionally there is no difference, but this is confusing to read,
as it suggests that the subtargets have different bits for the same
register in UART when in reality they are exactly the same.
One can use either bit, or both, at user's descretion
in order to determine whether the UART TX buffer is ready.
The generic kernel early-printk uses both,
(arch/mips/kernel/early_printk_8250.c)
while the ralink-specific early-printk uses only THRE,
(arch/mips/ralink/early_printk.c).
Define both bits and rewrite macros for readability,
keep the same values, as changing which to use should be tested first.
Ref: c31319b66 ("ramips: lzma-loader: Refactor loader")
Signed-off-by: Michael Pratt <mcpratt@pm.me>
The native bus address for UART was entered for rt305x UART_BASE,
but the bootloaders have memory space remapped with the same
virtual memory map the kernel uses for program addressing at boot time.
In UBoot, the remapped address is often defined as TEXT_BASE.
In the kernel, for rt305x this remapped address is RT305X_SYSC_BASE.
(arch/mips/include/asm/mach-ralink/rt305x.h)
Because the ralink I/O busses begin at a low address of 0x10000000,
they are remapped using KSEG0 or KSEG1, which for all 32-bit MIPS SOCs
(arch/mips/include/asm/addrspace.h)
are offsets of 0x80000000 and 0xa0000000 respectively.
This is consistent with the other UART_BASE macros here
and with MIPS memory map documentation.
Before the recent rework of the lzma-loader for ramips,
the original board-$(PLATFORM).c files also did not
use KSEG1ADDR for UART_BASE despite being defined,
which made this mistake easier to occur.
Fix this by defining KSEG1ADDR again and actually use it.
Copy and paste from the kernel's macros for consistency.
Link: https://training.mips.com/basic_mips/PDF/Memory_Map.pdf
Fixes: c31319b66 ("ramips: lzma-loader: Refactor loader")
Reported-by: Lech Perczak <lech.perczak@gmail.com>
Signed-off-by: Michael Pratt <mcpratt@pm.me>
The ESW core needs to be reset together with FE core, so after the
relevant reset controller lines are moved under FE, drop rst_esw and all
related code, which would not execute anyway, because rst_esw would be
NULL. While at that, ensure that if reset line for EPHY cannot be
claimed, a proper error message is reported.
Fixes: 60fadae62b ("ramips: ethernet: ralink: move reset of the esw into the esw instead of fe")
Co-developed-by: Maxim Anisimov <maxim.anisimov.ua@gmail.com>
Signed-off-by: Maxim Anisimov <maxim.anisimov.ua@gmail.com>
[Split out of the bigger commit, provide commit mesage, refactor error
handling]
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Failing to do so will cause the DMA engine to not initialize properly
and fail to forward packets between them, and in some cases will cause
spurious transmission with size exceeding allowed packet size, causing a
kernel panic.
Fixes: 60fadae62b ("ramips: ethernet: ralink: move reset of the esw into the esw instead of fe")
Signed-off-by: Maxim Anisimov <maxim.anisimov.ua@gmail.com>
[Provide commit description, split into logical changes]
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Failing to do so will cause the DMA engine to not initialize properly
and fail to forward packets between them, and in some cases will cause
spurious transmission with size exceeding allowed packet size, causing a
kernel panic.
This is behaviour of downstream driver as well, however I
haven't observed bug reports about this SoC in the wild, so this
commit's purpose is to align this chip with all other SoC's - MT7620
were already using this arrangement.
Fixes: #9284
Fixes: 60fadae62b ("ramips: ethernet: ralink: move reset of the esw into the esw instead of fe")
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Failing to do so will cause the DMA engine to not initialize properly
and fail to forward packets between them, and in some cases will cause
spurious transmission with size exceeding allowed packet size, causing a
kernel panic.
This is behaviour of downstream driver as well, however I
haven't observed bug reports about this SoC in the wild, so this
commit's purpose is to align this chip with all other SoC's - MT7620
were already using this arrangement.
Fixes: 60fadae62b ("ramips: ethernet: ralink: move reset of the esw into the esw instead of fe")
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
