Refresh patches for Linux 6.1 which no longer apply cleanly after
adding patches to fix ethernet rx hang issue on MT7981/MT7986.
Fixes: ede34465de ("mediatek: fix ethernet rx hang issue on MT7981/MT7986")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
-+-------------------------+-
| Model | NIC |
-+-------------------------+-
| All | MT7603 + MT7615 |
-+-------------------------+-
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
Some MT7915 calibration data consists of two parts. The first part
"eeprom" size is 0xe00. The second part "precal" size is 0x19c10.
Though some devices may not have precal data, it's better to assume
that precal data exists as no users/developers confirm it. On the
other hand, some devices definitely do not contain precal data
because the EEPROM partition size is smaller than the precal NVMEM
cell size.
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
Innacomm W3400V6 is an xDSL B/G wireless router based on Broadcom
BCM6328 SoC.
SoC: Broadcom BCM6328
CPU: BMIPS4350 V8.0, 320 MHz, 1 core
Flash: SPI-NOR 8MB, MX25L6406E
RAM: 64 MB
Ethernet: 4x 10/100 Mbps
Switch: Integrated
Wireless: 802.11b/g, BCM4312
LEDs/Buttons: 9x / 2x
Flash instruction, web UI:
1. Set a static IP on your computer compatible with 192.168.1.1, i.e
192.168.1.100.
2. Connect the ethernet cable from your computer to the router.
3. Make sure the router is powered off.
4. Press the reset button, don't release it yet!
5. While pressing reset, power on the router.
6. Wait 10 seconds or more.
Note: The power LED is red at first then turns to solid green when
ready.
7. Release the reset button.
8. Browse to 192.168.1.1
9. Select .bin file.
10. Upgrade the image.
11. Wait for it to reboot.
Signed-off-by: Sieng-Piaw Liew <liew.s.piaw@gmail.com>
[Fix cfe nvmem-layout and pinctrl_leds indentation]
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
The original configuration might be copied from bcm2710 which uses
cortex A53 rather than A72 in BCM2711, without errata might be harmful
to system stability and security.
Signed-off-by: Yangyu Chen <cyy@cyyself.name>
Drop PSGMII PHY patch as it has been moved to generic in preparation for
the PHY driver to be also used for ipq807x SoC as the same PHY is also
used there.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Backport FIELD_PREP_CONST patch needed for at803x backport patches to
correctly compile and work.
This MACRO is needed to treat values derived from FIELD_PREP usage as
const to be used by switch case or other needed usage.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Part 1 of #13629 split.
* Sets the LAN 2 MAC address in the DTS by deriving it from LAN 1's
address. The factory OS derives this from the `eth1addr` u-boot env
variable, but the nvmem_u-boot-env driver doesn't support parsing MAC
addresses from fields other than `ethaddr`. But for all of the device
samples I've checked (~10) it derives the correct MAC.
* Updates 02_network to ensure that interfaces are assigned to roles
correctly and consistently.
Signed-off-by: Bryan Berg <bdb@north-eastham.org>
Initial backport of at803x PHY driver cleanup. This is in preparation
for split and addition of new PHY Family based on at803x needed for
ipq807x and other IPQ Series SoC.
Other affected patch are automatically refreshed with
make target/linux/refresh
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
The register constants were duplicated in net/dsa/rtl83xx/debugfs.c and asm
mach-rtl838x/mach-rtl83xx.h. This commit removes this duplication.
Signed-off-by: Peter Körner <git@mazdermind.de>
According to https://svanheule.net/realtek/maple/register/led_sw_ctrl and also
drivers/net/dsa/rtl83xx/debugfs.c LED_SW_CTRL on the RTL838X should be 0xa00c
not 0x0128. Please note, that is is 0x0128 on the RTL8390/cypress SOC family.
Signed-off-by: Peter Körner <git@mazdermind.de>
the given code-format did not correctly express the condition and made the code
harder to read then necessary.
Signed-off-by: Peter Körner <git@mazdermind.de>
Fine tuning PR: openwrt/openwrt#14355 Ref: 5a82bb909b
("mediatek: GL-MT6000: Add missing LED state definitions")
As the only LED is using white in the stock firmware when the device is
running and blue for the bootloader I suggest following changes:
- Using blue for the BL and preinit+failsafe
- White for normal operation (like the original FW) and sysupgrade
With this changes it's clear by looking to the LED in which operation
mode the device is and a possible BL stuck can be seen easily.
Tested with [GL-MT6000](https://openwrt.org/toh/gl.inet/gl-mt6000).
Signed-off-by: Thomas Schröder <tschroeder_github@outlook.com>
Tested-by: Hannu Nyman <hannu.nyman@iki.fi>
Enable LED driver LP5562 on HAZE device tree and include its kernel
module package on default package for HAZE.
Signed-off-by: CheWei Chien <chewei.chien@wnc.com.tw>
Some devices (MX42CF) have a wrong MAC address configuration. The correct one is located only on the devinfo partition.
Signed-off-by: Paweł Owoc <frut3k7@gmail.com>
The nvmem-cells is deprecated. Also simplify mac address settings.
Fixes: b4086f4 ("mediatek: add support for YunCore AX835")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
The mac address of the network port under the switch is
the same as the corresponding gmac by default, so there
is no need to repeat the setting. Compile test only.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
The GS110TUP v1 is a managed switch similar to the GS110TPP v1, but with
port 10 as SFP instead of RJ-45 and a total budget of 240 watts. Ports
1-4 support 60-watt 802.3bt PoE and ports 5-8 support 30-watt 802.3at.
The flash layout of the two switches are identical, and the U-Boot
configurations are the same except for having a different magic number,
so installation can be done via the same U-Boot method.
The following command will be needed to enable the port LEDs as per
https://forum.openwrt.org/t/72510/51 :
fw_setenv bootcmd "rtk network on; boota"
Additionally, port 9 (1000base-T from a separate QSGMII PHY) does not
function without this. Port 10 was not tested as no SFP module was
available.
Signed-off-by: Jacob Potter <jacob@j4cbo.com>
[rebase on merged flash layout]
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Flash layouts for GS108Tv3, GS110TPPv1, GS308Tv1 and GS310TPv1 are
almost identical, except for the uimage header magic.
Move the flash layout to the common dtsi, and only place the magic value
in the device dts files.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Read back the reset register in order to flush the cache. This fixes
spurious reboot hangs on TP-Link TL-WDR3600 and TL-WDR4300 with Zentel
DRAM chips.
This issue was fixed in the past, but switching to the reset-driver
specific implementation removed the cache barrier which was previously
implicitly added by reading back the register in question.
Link: https://github.com/freifunk-gluon/gluon/issues/2904
Link: https://github.com/openwrt/openwrt/issues/13043
Link: https://dev.archive.openwrt.org/ticket/17839
Link: f8a7bfe1cb2c ("MIPS: ath79: fix system restart")
Signed-off-by: David Bauer <mail@david-bauer.net>
TP-Link RE365 is a wireless range extender, hardware-wise resembles
RE305 with slight changes regarding buttons and LEDs.
Specification
SoC: MediaTek MT7628AN
RAM: 64 MiB DDR2
Flash: 8 MiB SPI NOR
WiFi: 2.4 GHz 2T2R integrated
5 GHz 2T2R MediaTek MT7612EN conncted to PCIe lanes
Ethernet: 1x 10/100 Mbps integrated
LEDs: 6x GPIO controlled
Buttons: 4x GPIO controlled
UART: row of 4 holes marked on PCB as J1, starting count from white
triangle
1. VCC (3.3V), 2. GND, 3. RX, 4. TX
baud: 57600, parity: none, flow control: none
Installation
1. Open web management interface.
2. Go to Settings > System Tools > Firmware upgrade.
3. Select "Browse" and select the OpenWrt image with factory.bin suffix.
4. After selecting "Upgrade" firmware writing process will start.
5. Wait till device reboots, power LED should stay solid when it's fully
booted, then it's ready for configuration through LAN port.
Additional information
With how device manufacturer patrtitioned the flash memory, it's possible
that with default packages set, initial factory.bin image won't be
created. In such case, try to reduce packages amount or use older release
for initial conversion to OpenWrt. Later You can use sysupgrade.bin
image with full set of packages because OpenWrt uses unpartitioned flash
memory space unused by vendor firmware.
Reverting to vendor firmware involves converting firmware using
tplink-safeloader with -z option (can be found in ImageBuilder or SDK)
and forcibly applying converted firmware as sysupgrade.
Known issues
WARNING: after removing casing of the device one is exposed to high
voltage and is in a risk of being electrocuted.
Caution when interfacing whith bootloader, saving its environment either
by issuing "saveenv" or selecting option "1: Load system code to SDRAM
via TFTP." in boot menu, any of those will lead to overwriting part of
kernel. This will lead to need of firmware recovery. The cause of this
issue is bootloader having environment offset on flash at 0x40000,
while kernel starts from 0x20000.
Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
[Wrap long line in DTS]
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Before, PVID is reset for all ports and goes out of bounds. Also, PVID
is later changed by dsa configuration by `ip link` and `bridge vlan`
commands, this does not change the CPU port PVID and CPU PVID stays 0.
It does not allow sending packets from OpenWrt to any connected devices
unless default configuration is changed
This change iterates up to and including cpu_port and sets default PVID
to 1. For lan* ports PVID can be configured with `ip link` and `bridge
vlan` commands
Acked-by: Simon Wunderlich <sw@simonwunderlich.de>
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Fix incorrect register value being set for VLAN_PORT_FWD
Before, the 0b1111 would be set for the register which means outgoing
packets would receive an extra tag, corresponding to the PVID of the
port.
On untagged ports, this meant outgoing packets with a single tag.
On tagged ports, this meant outgoing QinQ packets, where the inner tag
was either the PVID of the untagged ingress port, or the already
assigned original (single) tag.
Acked-by: Simon Wunderlich <sw@simonwunderlich.de>
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Without this, luci shows 10M full duplex when there is no link. So
explicitly set half duplex and unknown speed.
Acked-by: Simon Wunderlich <sw@simonwunderlich.de>
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Use led_setX to determine number of LEDs per port. Introduce macros to
calculate register value and shift for particular LED in a particular
set.
Problem with previous implementation is that it uses is10G status to
determine leds per port. However with usxgmii, driver sets 10g, 5g and
2.5g so even though there are only 2 leds per port it selects 4 leds per
port
This implementation relies on configured led_set node.
Acked-by: Simon Wunderlich <sw@simonwunderlich.de>
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Before driver code
- enabled egress filter for cpu and non-cpu ports
- enabled ingress filter for non-cpu ports
This patch explicitly enables ingress and egress filtering for non-cpu
ports and disables ingress and egress filtering for cpu port.
Acked-by: Simon Wunderlich <sw@simonwunderlich.de>
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Setting/clearing bits on the first byte of the mac address causes collisions
when using multiple SSIDs on both PHYs. Change the allocation to alter the
last byte instead.
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Hardware specification:
SoC: MediaTek MT7981B 2x A53
Flash: 16MB NOR
RAM: 256MB
Ethernet: 2x 10/100/1000 Mbps
Switch: MediaTek MT7531AE
WiFi: MediaTek MT7976C
Button: Reset
Power: DC 12V 1A, PoE 802.3af 48V
Flash instructions:
Option #1 - SSH
I was able to SSH into the stock firmware of my device.
1. Attach the router to the network
2. Use scp (-O) to copy the sysupgrade image
3. Connect using SSH and run `sysupgrade -n`
Option #2 - U-Boot
One way to use the bootloader for flashing is using TFTP:
1. Connect to the router using an ethernet cable
2 Spin up a TFTP server serving the sysupgrade file
3. Open the case and attach a UART
4. Attach power to the router and interrupt the countdown by pressing
any key
5. Select option #2 (Upgrade firmware)
6. Enter IP address information and image name
7. Wait patiently
Co-Authored-By: Enrique Rodríguez Valencia <enrique.rodriguez@galgus.net>
Co-Authored-By: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Leon M. Busch-George <leon@georgemail.eu>
Adjust LED names and provide the OpenWrt status indicator aliases
to actually use LEDs by the OpenWrt boot & sysupgrade processes.
* Name both LEDs clearly by the color
* Add the missing OpenWrt LED status indicator aliases and
remove the now unnecessary default status from blue LED
After this commit, the LEDs are used as:
* bootloader, really early Linux boot: blue LED is on
* preinit/failsafe: white LED blinks rapidly
* late boot: white LED blinks slowly
* boot completed, running normally: blue LED is on
* sysupgrade: white LED blinks
Signed-off-by: Hannu Nyman <hannu.nyman@iki.fi>
Hardware
--------
CPU: Qualcomm Atheros QCA9563
RAM: 128M DDR2
FLASH: 16MB SPI-NOR
WiFi: Qualcomm Atheros QCA9563 2x2:2 802.11n 2.4GHz
Qualcomm Atheros QCA9880 2x2:2 802.11ac 5GHz
Antennas
--------
The device features internal antennas as well as external antenna
connectors. By default, the internal antennas are used.
Two GPIOs are exported by name, which can be used to control the
antenna-path mux. Writing a logical 0 enables the external antenna
connectors.
Installation
------------
1. Download the OpenWrt sysupgrade image to the device. You can use scp
for this task. The default username and password are "ubnt" and the
device is reachable at 192.168.1.20.
$ scp -O openwrt-sysupgrade.bin ubnt@192.168.1.20:/tmp/firmware.bin
2. Connect to the device using SSH.
$ ssh ubnt@192.168.1.20
3. Disable the write-protect
$ echo "5edfacbf" > /proc/ubnthal/.uf
4. Verify kernel0 and kernel1 match mtd2 and mtd3
$ cat /proc/mtd
5. Write the sysupgrade image to kernel0 and kernel1
$ dd if=/tmp/firmware.bin of=/dev/mtdblock2
$ dd if=/tmp/firmware.bin of=/dev/mtdblock3
6. Write the bootselect flag to boot from kernel0
$ dd if=/dev/zero bs=1 count=1 of=/dev/mtd4
7. Reboot the device
$ reboot
Signed-off-by: David Bauer <mail@david-bauer.net>
This commit:
1. Removes deprecated "label" property from the dts leds subnnodes;
2. Updates buttons and leds dts description according to kernel docs
examples.
Scope: devices well known to me.
Run-tested: TP-Link ec330-g5u, WiFire S1500.nbn
Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com>
The MikroTik RouterBOARD 911G-5HPacD is a stripped-down version of
RB921GS-5HPacD, removing the SFP cage.
This ports the board from ar71xx, and is based on support for
RB921GS-5HPacD.
Disable mdio1 and eth1 nodes in routerboard-92x.dtsi, then re-enable
them in devices using that, so the newly-added device has the port
disabled properly.
See https://mikrotik.com/product/RB911G-5HPacD for more info.
Specifications:
- SoC: Qualcomm Atheros QCA9558 (720 MHz)
- RAM: 128 MB
- Storage: 128 MB NAND
- Wireless: external QCA9892 802.11a/ac 2x2:2
- Ethernet: 1x 1000/100/10 Mbps, integrated, via AR8031 PHY, passive PoE in
Working:
- NAND storage detection
- Ethernet
- Wireless
- 1x user LED (blinks during boot, sysupgrade)
- Reset button
- Sysupgrade
Installation:
- Boot initramfs image via TFTP and then flash sysupgrade image
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
LEDs 1 through 5 are used for RSSI monitoring on factory firmware.
Reflect that by creating appropriate rssileds configuration.
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
This is a stripped-down version of RB912UAG-(2,5)HPnD, without USB,
miniPCIe and SIM sockets.
This board has been supported in the ar71xx.
Add support based on RB912UAG board, by splitting out the common part to
.dtsi, and creating separate device tree for the stripped-down version.
Links:
* https://mikrotik.com/product/RB911G-2HPnD
* https://mikrotik.com/product/RB911G-5HPnD
* https://openwrt.org/toh/hwdata/mikrotik/mikrotik_rb911g-5hpnd
Hardware:
* SoC: Atheros AR9342,
* RAM: DDR 64MB,
* SPI NOR: 64KB,
* NAND: 128MB,
* Ethernet: x1 10/100/1000 port with passive POE in,
* Wi-Fi: 802.11 a/b/g/n (depending on band variant)
* LEDs: 5 general purpose LEDs (led1..led5), power LED, user LED,
Ethernet phy LED,
* Button,
* Beeper.
Flashing:
* Use the RouterBOARD Reset button to enable TFTP netboot,
boot kernel and initramfs and then perform sysupgrade.
* From ar71xx OpenWrt firmware run:
$ sysupgrade -F /tmp/<sysupgrade.bin>
For more info see: https://openwrt.org/toh/mikrotik/common.
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Image for RB912UAG-2HPnD supports the 5GHz variant without
modifications. Add it as alternative name, so it can be found easier.
While at that, adjust board display name in device tree, to reflect
that.
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
MT7688 devices use the "mt7628an.dtsi" as the template. And RT3052
devices use the "rt3050.dtsi" as template. Therefore, we need to add
the corresponding system controller compatible strings to make them
work properly.
Fixes: 1f818b09f8 ("ramips: add proper system clock and reset driver support for legacy SoCs")
Fixes: #14305
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
Currently, WiFi interfaces on WXR-5950AX12 / WXR-6000AX12 devices
come up with some MAC addresses inconsistent with vendor and Ethernet
addresses. This adds a hotplug override in order to make it consistent
with what is in u-boot env as well as OAM firmware where 1st radio MAC
is set at Ethernet MAC + 8, and 2nd radio mac at Ethernet MAC + 16.
fw_printenv | grep addr
ethaddr=68:e1:dc:xx:xx:d8
ipaddr=192.168.11.1
wlan0addr=68:e1:dc:xx:xx:e0
wlan1addr=68:e1:dc:xx:xx:e8
wlan2addr=00:00:00:00:00:00
For OEM bootlog and MAC assagnment check
https://openwrt.org/toh/buffalo/wxr-5950ax12#openwrt_uimage_tftp_bootlog
Tested-by: Samir Ibradžić <sibradzic@gmail.com> # Buffalo WXR-6000AX12P
Signed-off-by: Samir Ibradžić <sibradzic@gmail.com>
Linksys MX4200 is a 802.11ax Tri-band router/AP.
Specifications:
* CPU: Qualcomm IPQ8174 Quad core Cortex-A53 1.4GHz
* RAM: 512MB of DDR3
* Storage: 512Mb NAND
* Ethernet: 4x1G RJ45 ports (QCA8075)
* WLAN:
* 2.4GHz: Qualcomm QCN5024 2x2 802.11b/g/n/ax 574 Mbps PHY rate
* 5GHz: Qualcomm QCN5054 2x2@80MHz or 2x2@160MHz 802.11a/b/g/n/ac/ax 2402 PHY rate
* 5GHz: Qualcomm QCN5054 4x4@80MHz or 2x2@160MHz 802.11a/b/g/n/ac/ax 2402 PHY rate
* LED-s:
* RGB system led
* Buttons: 1x Soft reset 1x WPS
* Power: 12V DC Jack
Installation instructions:
Open Linksys Web UI - http://192.168.1.1/ca or http://10.65.1.1/ca depending on your setup.
Login with your admin password. The default password can be found on a sticker under the device.
To enter into the support mode, click on the “CA” link and the bottom of the page.
Open the “Connectivity” menu and upload the squash-factory image with the “Choose file” button.
Click start. Ignore all the prompts and warnings by click “yes” in all the popups.
The Wifi radios are turned off by default. To configure the router, you will need to connect your computer to the LAN port of the device.
Then you would need to write openwrt to the other partition for it to work
- First Check booted partition
fw_printenv -n boot_part
- Then install Openwrt to the other partition if booted in slot 1:
mtd -r -e alt_kernel -n write openwrt-qualcommax-ipq807x-linksys_mx4200v(X)-squashfs-factory.bin alt_kernel
- If in slot 2:
mtd -r -e kernel -n write openwrt-qualcommax-ipq807x-linksys_mx4200v(X)-squashfs-factory.bin kernel
Replace (X) with your model version either 1 or 2
Signed-off-by: Mohammad Sayful Islam <sayf.mohammad01@gmail.com>
Reviewed-by: Robert Marko <robimarko@gmail.com>
Use reset controller to reset mt7620 ethernet phy instead of directly
writing system control registers. The reset line of "ephy" is 24, so
the DTS resets properties have been updated to get the correct reset
signal.
Tested on HiWiFi HC5861.
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
Use reset controller to reset mt7620 frame engine instead of directly
writing system control registers.
Tested on HiWiFi HC5861.
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
Currently OpenWRT does not know how to properly reset the network switch. This would result in
a switch that seemed to come up properly but was unable to handle any traffic. Presumably something
earlier in the boot chain is configuring a part of the switch that gets wiped out when its reset.
For now comment out the reset GPIO entry in the device tree until the driver better supports
bringing up the switch after a reset.
Signed-off-by: Michael 'ASAP' Weinrich <michael@a5ap.net>
Avoids dtc warnings regarding two sections having the same numbers.
X: duplicate unit-address (also used in node Y)
Signed-off-by: Rosen Penev <rosenp@gmail.com>
pcie-controller was renamed to pcie since at least kernel 4.14. Match it
here to get rid of dtc warnings.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
There are broken devices in the wild that handle duplicate IP address
detection by sending out ARP requests for the IP that they received from a
DHCP server and refuse the address if they get a reply.
When proxyarp is enabled, they would go into a loop of requesting an address
and then NAKing it again.
Fixes: https://github.com/openwrt/openwrt/issues/14309
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Include a patch[1] under review to fix the modpost error due to
upstream changes:
...
ERROR: modpost: "cifs_arc4_crypt" [fs/ksmbd/ksmbd.ko] undefined!
ERROR: modpost: "cifs_arc4_setkey" [fs/ksmbd/ksmbd.ko] undefined!
scripts/Makefile.modpost:133: recipe for target 'modules-only.symvers' failed
1. https://lore.kernel.org/all/20231227102605.4766-2-linkinjeon@kernel.org/
Signed-off-by: John Audia <therealgraysky@proton.me>
The default strength is not enough to provide stable connection
under 3.3v LDO voltage.
Fixes: 32d5921b8b ("rockchip: add Orange Pi R1 Plus LTS support")
Fixes: #13117Fixes: #13759
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
`ok` status is obsolete and thus `okay` should be used instead:
spi@78b9000: status:0: 'ok' is not one of ['okay', 'disabled', 'reserved']
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Flash: 16MB SPI NOR flash (Macronix MX25L12805D)
Based on the manufactured datasheet this chip is capable of 50MHz.
We dont enable fast-read as mt7621 are only capable of 44mhz in a read state.
Tested on this unit without any issues.
Signed-off-by: David Bentham <db260179@gmail.com>
The rt305x series SOC have two UART devices,
and the one at bus address 0x500 is disabled by default.
Some boards do not even have a pinout for the first one,
so use the same one that the kernel uses at 0xc00 instead.
This allows the lzma-loader printing to be visible
alongside the kernel log in the same console.
Tested-by: Lech Perczak <lech.perczak@gmail.com> # zte,mf283plus
Signed-off-by: Michael Pratt <mcpratt@pm.me>
Before this was reworked, in the file for mt7621 subtarget
(target/linux/ramips/image/lzma-loader/src/board-mt7621.c)
the "Transmitter shift register empty" bit TEMT was used instead of
the "Transmitter holding register empty" bit THRE,
but after the rework, this value was labeled as the THRE bit instead.
Functionally there is no difference, but this is confusing to read,
as it suggests that the subtargets have different bits for the same
register in UART when in reality they are exactly the same.
One can use either bit, or both, at user's descretion
in order to determine whether the UART TX buffer is ready.
The generic kernel early-printk uses both,
(arch/mips/kernel/early_printk_8250.c)
while the ralink-specific early-printk uses only THRE,
(arch/mips/ralink/early_printk.c).
Define both bits and rewrite macros for readability,
keep the same values, as changing which to use should be tested first.
Ref: c31319b66 ("ramips: lzma-loader: Refactor loader")
Signed-off-by: Michael Pratt <mcpratt@pm.me>
The native bus address for UART was entered for rt305x UART_BASE,
but the bootloaders have memory space remapped with the same
virtual memory map the kernel uses for program addressing at boot time.
In UBoot, the remapped address is often defined as TEXT_BASE.
In the kernel, for rt305x this remapped address is RT305X_SYSC_BASE.
(arch/mips/include/asm/mach-ralink/rt305x.h)
Because the ralink I/O busses begin at a low address of 0x10000000,
they are remapped using KSEG0 or KSEG1, which for all 32-bit MIPS SOCs
(arch/mips/include/asm/addrspace.h)
are offsets of 0x80000000 and 0xa0000000 respectively.
This is consistent with the other UART_BASE macros here
and with MIPS memory map documentation.
Before the recent rework of the lzma-loader for ramips,
the original board-$(PLATFORM).c files also did not
use KSEG1ADDR for UART_BASE despite being defined,
which made this mistake easier to occur.
Fix this by defining KSEG1ADDR again and actually use it.
Copy and paste from the kernel's macros for consistency.
Link: https://training.mips.com/basic_mips/PDF/Memory_Map.pdf
Fixes: c31319b66 ("ramips: lzma-loader: Refactor loader")
Reported-by: Lech Perczak <lech.perczak@gmail.com>
Signed-off-by: Michael Pratt <mcpratt@pm.me>
The ESW core needs to be reset together with FE core, so after the
relevant reset controller lines are moved under FE, drop rst_esw and all
related code, which would not execute anyway, because rst_esw would be
NULL. While at that, ensure that if reset line for EPHY cannot be
claimed, a proper error message is reported.
Fixes: 60fadae62b ("ramips: ethernet: ralink: move reset of the esw into the esw instead of fe")
Co-developed-by: Maxim Anisimov <maxim.anisimov.ua@gmail.com>
Signed-off-by: Maxim Anisimov <maxim.anisimov.ua@gmail.com>
[Split out of the bigger commit, provide commit mesage, refactor error
handling]
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Failing to do so will cause the DMA engine to not initialize properly
and fail to forward packets between them, and in some cases will cause
spurious transmission with size exceeding allowed packet size, causing a
kernel panic.
Fixes: 60fadae62b ("ramips: ethernet: ralink: move reset of the esw into the esw instead of fe")
Signed-off-by: Maxim Anisimov <maxim.anisimov.ua@gmail.com>
[Provide commit description, split into logical changes]
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Failing to do so will cause the DMA engine to not initialize properly
and fail to forward packets between them, and in some cases will cause
spurious transmission with size exceeding allowed packet size, causing a
kernel panic.
This is behaviour of downstream driver as well, however I
haven't observed bug reports about this SoC in the wild, so this
commit's purpose is to align this chip with all other SoC's - MT7620
were already using this arrangement.
Fixes: #9284
Fixes: 60fadae62b ("ramips: ethernet: ralink: move reset of the esw into the esw instead of fe")
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Failing to do so will cause the DMA engine to not initialize properly
and fail to forward packets between them, and in some cases will cause
spurious transmission with size exceeding allowed packet size, causing a
kernel panic.
This is behaviour of downstream driver as well, however I
haven't observed bug reports about this SoC in the wild, so this
commit's purpose is to align this chip with all other SoC's - MT7620
were already using this arrangement.
Fixes: 60fadae62b ("ramips: ethernet: ralink: move reset of the esw into the esw instead of fe")
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Failing to do so will cause the DMA engine to not initialize properly
and fail to forward packets between them, and in some cases will cause
spurious transmission with size exceeding allowed packet size, causing a
kernel panic.
Fixes: 60fadae62b ("ramips: ethernet: ralink: move reset of the esw into the esw instead of fe")
Signed-off-by: Maxim Anisimov <maxim.anisimov.ua@gmail.com>
[Provide commit description, split into logical changes]
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Enabling the FE core too early causes the system to hang during boot
uncondtionally, after the reset is released. Increate it to 1-1.2ms
range.
Fixes: 60fadae62b ("ramips: ethernet: ralink: move reset of the esw into the esw instead of fe")
Signed-off-by: Maxim Anisimov <maxim.anisimov.ua@gmail.com>
[Split previous commit, provide rationale]
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Use devm_reset_control_array_get_exclusive to register multiple
reset lines in FE driver. This is required to reattach ESW reset to FE
driver again, based on device tree bindings.
While at that, remove unused fe_priv.rst_ppe field, and add error
message if getting the reset fails.
Fixes: 60fadae62b ("ramips: ethernet: ralink: move reset of the esw into the esw instead of fe")
Co-developed-by: Maxim Anisimov <maxim.anisimov.ua@gmail.com>
Signed-off-by: Maxim Anisimov <maxim.anisimov.ua@gmail.com>
[Split out of the bigger commit, provide commit mesage, refactor error
handling]
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
R32 is like the M32 part of the EAGLE PRO AI series from D-Link.
Specification:
- MT7622BV SoC with 2.4GHz wifi
- MT7975AN + MT7915AN for 5GHz
- MT7531BE Switch
- 512MB RAM
- 128 MB flash
- 2 LEDs (Status and Internet, both can be either orange or white)
- 2 buttons (WPS and Reset)
Compared to M32, the R32 has the following differences:
- 4 LAN ports instead of 2
- The recory image starts with DLK6E6015001 instaed of DLK6E6010001
- Individual LEDs for power and internet
- MAC address is stored at another offset in the ODM partition
MAC addresses:
- WAN MAC is stored in partition "Odm" at offset 0x81
- LAN (as printed on the device) is WAN MAC + 1
- WLAN MAC (2.4 GHz) is WAN MAC + 2
- WLAN MAC (5GHz) is WAN MAC + 3
Flashing via Recovery Web Interface:
- Set your IP address to 192.168.0.10, subnetmask 255.255.255.0
- Press the reset button while powering on the deivce
- Keep the reset button pressed until the internet LED blinks fast
- Open a Chromium based and goto http://192.168.0.1
- Download openwrt-mediatek-mt7622-dlink_eagle-pro-ai-r32-a1-squashfs-recovery.bin
Flashing via uBoot:
- Open the case, connect to the UART console
- Set your IP address to 10.10.10.3, subnet mask 255.255.255.0. Connect to one of the LAN interfaces of the router
- Run a tftp server which provides openwrt-mediatek-mt7622-dlink_eagle-pro-ai-r32-initramfs-kernel.bin.
- You can rename the file to iverson_uImage (no extension), then you don't have to enter the whole file name in uboot later.
- Power on the device and select "1. System Load Linux to SDRAM via TFTP." in the boot menu
- Enter image file, tftp server IP and device IP (if they differ from the default).
- TFTP download to RAM will start. After a few seconds OpenWrt initramfs should start
- The initramfs is accessible via 192.168.1.1, change your IP address accordingly (or use multiple IP addresses on your interface)
- Create a backup of the Kernel1 partition, this file is required if a revert to stock should be done later
- Perform a sysupgrade using openwrt-mediatek-mt7622-dlink_eagle-pro-ai-r32-squashfs-sysupgrade.bin
- Reboot the device. OpenWrt should start from flash now
Revert back to stock using the Recovery Web Interface:
- Set your IP address to 192.168.0.10, subnetmask 255.255.255.0
- Press the reset button while powering on the deivce
- Keep the reset button pressed until the internet LED blinks fast
- Open a Chromium based and goto http://192.168.0.1
- Flash a decrypted firmware image from D-Link. Decrypting an firmware image is described below.
Decrypting a D-Link firmware image:
- Download https://github.com/RolandoMagico/firmware-utils/blob/M32/src/m32-firmware-util.c
- Compile a binary from the downloaded file, e.g. gcc m32-firmware-util.c -lcrypto -o m32-firmware-util
- Run ./m32-firmware-util R32 --DecryptFactoryImage <OriginalFirmware> <OutputFile>
- Example for firmware R32A1_FW103B01: ./m32-firmware-util R32 --DecryptFactoryImage R32A1_FW103B01.bin R32A1_FW103B01.decrypted.bin
Revert back to stock using uBoot:
- Open the case, connect to the UART console
- Set your IP address to 10.10.10.3, subnet mask 255.255.255.0. Connect to one of the LAN interfaces of the router
- Run a tftp server which provides the previously created backup of the Kernel1 partition.
- You can rename the file to iverson_uImage (no extension), then you don't have to enter the whole file name in uboot later.
- Power on the device and select "2. System Load Linux Kernel then write to Flash via TFTP." in the boot menu
- Enter image file, tftp server IP and device IP (if they differ from the default).
- TFTP download to FLASH will start. After a few seconds the stock firmware should start again
There is also an image openwrt-mediatek-mt7622-dlink_eagle-pro-ai-r32-a1-squashfs-tftp.bin which can directly be flashed via U-Boot and TFTP.
It can be used if no backup of the Kernel1 partition is reuqired.
Flahsing via OEM web interface is currently not possible, the OEM images are encrypted. Creating images is only possible manually at the moment.
The support for the M32/R32 already includes support for flashing from the OEM web interface:
- The device tree contains both partitions (Kernel1 and Kernel2) with conditions to select the correct one based on the kernel command line
- The U-Boot variable "boot_part" is set accordingly during startup to finish the partition swap after flashing from the OEM web interface
- OpenWrt sysupgrade flashing always uses the partition where it was initially flashed to (no partition swap)
Signed-off-by: Roland Reinl <reinlroland+github@gmail.com>
Router Asus TUF AX6000 have second MaxLinear GPY211 PHY controller for 2.5Gb LAN port.
The 5'th LAN port have inverted status of the LED.
Based on the commit from main branch 90fbec8 we could set proper status of the LED.
Signed-off-by: Patryk Kowalczyk <patryk@kowalczyk.ws>
