Kernel upstream commit 67a3ba25aa95 ("MIPS: Fix incorrect mem=X@Y handling") introduced a new issue for rt288x where "PHYS_OFFSET" is 0x0 but the calculated "ramstart" is not. As the prerequisite of custom memory map has been removed, this results in the full memory range of 0x0 - 0x8000000 to be marked as reserved
for this platform.
This patch adds the originally intended prerequisite again.
Signed-off-by: Tobias Wolf <dev-NTEO@vplace.de>
TP-Link TL-MR3020 v3 is a pocket-size router based on MediaTek MT7628N.
This PR is based on the work of @meyergru[1], with his permission.
Specification:
- MediaTek MT7628N/N (575 Mhz)
- 64 MB of RAM
- 8 MB of FLASH
- 2T2R 2.4 GHz
- 1x 10/100 Mbps Ethernet
Flash instruction:
The only way to flash the image in TL-MR3020 v3 is to use
tftp recovery mode in U-Boot:
1. Configure PC with static IP 192.168.0.225/24 and tftp server.
2. Rename "openwrt-ramips-mt76x8-tplink_tl-mr3020-v3-squashfs-tftp-recovery.bin"
to "tp_recovery.bin" and place it in tftp server directory.
3. Connect PC with the LAN port, press the reset button, power up
the router and keep button pressed for around 6-7 seconds, until
device starts downloading the file.
4. Router will download file from server, write it to flash and reboot.
[1] https://github.com/meyergru/lede-source/commits/TL-MR3020-V3
Signed-off-by: Carlo Nel <carlojnel@gmail.com>
The pinmux for all SoCs using this driver is now set via the pinmux. It
makes this code obsolete.
Some of the code targeting the mt76x8 SoCs is still required. The sd
card pins share the pads with the EPHY. These pads need to be switched
to digital mode if the pins are used for sd cards.
The eMMC 8-bit mode has to be enabled via pinmux instead of a kernel
option. The uart2 group need to be set to function "sdxc d5 d4", pwm1
to "sdxc d6" and pwm0 to "sdxc d7" to do so. It can't be done by as
part of a default pinmux, as it would break the normal operation of
uart2.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Set the pins to the required mode via the pinmux driver. It allows to
get rid of the pinmux related code in the sd card driver.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Drop the nd_sd gpio pinmux in case sdcard is used. They're mutually
exclusive and for most of the boards not even used as GPIOs.
If the pins are in sdcard mode, the pins ND_WE_N and ND_CS_N are still
GPIOs (#45 and #46).
Signed-off-by: Mathias Kresin <dev@kresin.me>
The rt3352 has a pin that can be used as second spi chip select,
watchdog reset or GPIO. The pinmux setup was missing the definition of
said pin but it is already used in the SoC dtsi.
Signed-off-by: Mathias Kresin <dev@kresin.me>
A buffer is split into multiple descriptors if it exceeds 16 KB.
Apply the same split for the skb head as well (to deal with corner cases
on fraglist support)
Signed-off-by: Felix Fietkau <nbd@nbd.name>
This reverts commit 3a8efaef00.
The change reportedly breaks UART2 on some boards. Furthermore it uses
bitwise logic on an uninitialized variable and fails to explain what it
is fixing exactly.
Signed-off-by: Jo-Philipp Wich <jo@mein.io>
The changed dictionary size leads to a different LZMA header which breaks
sysupgrade image magic checkibng on at least some RT288x boards.
Since the commit message only mentions testing on MT7621 and since the
change appears to break at least one other ramips subtarget, do not take
any chances and restrict the size limitation to only MT7621.
Fixes FS#1797
Fixes 09b6755946 ("ramips: limit dictionary size for lzma compression")
Signed-off-by: Jo-Philipp Wich <jo@mein.io>
The rt3883 doesn't have a pinmux group named spi_cs1. The cs1 is part
of the pci group. The function pci-func enables the second chip select.
Signed-off-by: Mathias Kresin <dev@kresin.me>
The PCI pins need to be set to "PCI Host support one device" to allow
the use of one PCI device and flash memory.
The pci-fnc function is intended to be used if no PCI is used but
flash, nand or the codec functionality is.
Signed-off-by: Mathias Kresin <dev@kresin.me>
The LEDs should be triggered/lit by any kind of state change instead of
turned on/off unconditional.
If LEDs really need to be turned off by default, it should be done via
the default-state devicetree led property.
The handling of the wndr3700v5 and wt3020 power led is at least
strange. Something is for sure wrong with them. Either the leds are
misnamed, the default off trigger is a typo or the polarity of the
gpios is wrong. Drop the power led from userspace and wait for someone
with access to the hardware to fix it properly.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Based on the userspace led configuration it's quite obvious that the
4g-0 led should be used for boot status indication.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Use the default-state property to express the desired led handling in
the devicetree source file instead of the userspace.
Signed-off-by: Mathias Kresin <dev@kresin.me>
All the LEDs are turned on by diag.sh at the end of the boot process.
No need to do the same via userspace configuration again.
Signed-off-by: Mathias Kresin <dev@kresin.me>
All boards either have a multi colour led or a single lightpipe. It
makes it impossible to handle the LEDs individual. Change the LED
config for these boards to take it into account.
Signed-off-by: Mathias Kresin <dev@kresin.me>
- fix single spaces hidden by a tab
- replace indentation with spaces by tabs
- make empty lines empty
- drop trailing whitespace
- drop unnecessary blank lines
Signed-off-by: Mathias Kresin <dev@kresin.me>
Signed-off-by: Paul Wassi <p.wassi@gmx.at>
The mt7620 doesn't have a pinmux group named spi_cs1. The cs1 is part
of the "spi refclk" group. The function "spi refclk" enables the second
chip select.
On reset, the pins of the "spi refclk" group are used as reference
clock and GPIO.
Signed-off-by: Mathias Kresin <dev@kresin.me>
This patch improves faf64056dd by correcting
the partition scheme for the "RouterBoot" section of the flash.
The partition scheme initially submitted is incorrect and does not reflect
the actual flash structure.
The "RouterBoot" section (name matching OEM) is subdivided in several
static segments, as they are on ar71xx RB devices albeit with different
offsets and sizes.
The naming convention from ar71xx has been preserved, except for the
bootloaders which are named "bootloader1" and "bootloader2" to avoid
confusion with the master "RouterBoot" partition.
The preferred 'fixed-partitions' DTS node syntax is used, with nesting
support as introduced in 2a598bbaa3.
"partition" is used for node names, with associated "label" to match
policy set by 6dd94c2781.
Leave a note in DTS to explain how the original author selected the SPI speed.
Tested-by: Tobias Schramm <tobleminer@gmail.com>
Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org>
Reviewed-by: Rafał Miłecki <rafal@milecki.pl>
This patch improves 5684d08741 by correcting
the partition scheme for the "RouterBoot" section of the flash.
The partition scheme initially submitted is incorrect and does not reflect
the actual flash structure.
The "RouterBoot" section (name matching OEM) is subdivided in several
static segments, as they are on ar71xx RB devices albeit with different
offsets and sizes.
The naming convention from ar71xx has been preserved, except for the
bootloaders which are named "bootloader1" and "bootloader2" to avoid
confusion with the master "RouterBoot" partition.
The preferred 'fixed-partitions' DTS node syntax is used, with nesting
support as introduced in 2a598bbaa3.
"partition" is used for node names, with associated "label" to match
policy set by 6dd94c2781.
The OEM source code also define a "RouterBootFake" partition at the
beginning of the secondary flash chip: to avoid trouble if OEM ever makes
use of that space, it is also defined here.
The resulting partition scheme looks like this:
[ 10.114241] m25p80 spi0.0: w25x40 (512 Kbytes)
[ 10.118708] 1 fixed-partitions partitions found on MTD device spi0.0
[ 10.125049] Creating 1 MTD partitions on "spi0.0":
[ 10.129824] 0x000000000000-0x000000040000 : "RouterBoot"
[ 10.136215] 5 fixed-partitions partitions found on MTD device RouterBoot
[ 10.142894] Creating 5 MTD partitions on "RouterBoot":
[ 10.148032] 0x000000000000-0x00000000f000 : "bootloader1"
[ 10.154336] 0x00000000f000-0x000000010000 : "hard_config"
[ 10.160665] 0x000000010000-0x00000001f000 : "bootloader2"
[ 10.167046] 0x000000020000-0x000000021000 : "soft_config"
[ 10.173461] 0x000000030000-0x000000031000 : "bios"
[ 10.190191] m25p80 spi0.1: w25q128 (16384 Kbytes)
[ 10.194950] 2 fixed-partitions partitions found on MTD device spi0.1
[ 10.201271] Creating 2 MTD partitions on "spi0.1":
[ 10.206071] 0x000000000000-0x000000040000 : "RouterBootFake"
[ 10.212746] 0x000000040000-0x000001000000 : "firmware"
[ 10.307216] 2 minor-fw partitions found on MTD device firmware
[ 10.313044] 0x000000040000-0x000000220000 : "kernel"
[ 10.319002] 0x000000220000-0x000001000000 : "rootfs"
[ 10.324906] mtd: device 9 (rootfs) set to be root filesystem
[ 10.330678] 1 squashfs-split partitions found on MTD device rootfs
[ 10.336886] 0x000000b40000-0x000001000000 : "rootfs_data"
Leave a note in DTS to explain how the original author selected the SPI speed.
Tested-by: Tobias Schramm <tobleminer@gmail.com>
Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org>
Reviewed-by: Rafał Miłecki <rafal@milecki.pl>
[rmilecki: dropped "RouterBootFake" partition]
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
The device was not included in the /etc/board.d/02_network file, so
the network wouldn't be properly set up on boot.
Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
ELECOM WRC-1900GST is a wireless router, based on Mediatek MT7621A.
This is almost same as WRC-2533GST except wireless specs.
Specifications:
- SoC : MT7621A (four logical CPU cores)
- RAM : 128MiB
- ROM : 16MiB of SPI NOR-FLASH
- wireless :
5GHz : 3T3R up to 1300Mbps/11ac with MT7615
2.4GHz : 3T3R up to 600Mbps/11n with MT7615
- Ethernet : 5 ports, all ports is capable of 1000base-T
- Ether switch : MT7530 (MT7621A built-in)
- LEDs : 4 LEDs
- buttons : 2 buttons and 1 slide-switch
- UART : header is on PCB, 57600bps
Flash instruction using factory image:
1. Connect the computer to the LAN port of WRC-1900GST
2. Connect power cable to WRC-1900GST and turn on it
3. Access to "https://192.168.2.1/" and open firmware update
page ("ファームウェア更新")
4. Select the OpenWrt factory image and click apply ("適用")
button
5. Wait ~150 seconds to complete flashing
Signed-off-by: NOGUCHI Hiroshi <drvlabo@gmail.com>
The former used compatibles aren't defined anywhere and aren't used by
the devicetree source files including them.
Signed-off-by: Mathias Kresin <dev@kresin.me>
According to abbfcc8525 ("ramips: add support for GL-inet
GL-MT300N-V2") the board has a MediaTek MT7628AN. Change the SoC
compatible to match the used hardware.
Signed-off-by: Mathias Kresin <dev@kresin.me>
RT5350 neither have rgmii nor a mdio pinmux group. MT7628an doesn't
have a jtag group. Having these groups defined might cause a boot
panic.
The pin controller fails to initialise for kernels > 4.9 if invalid
groups are used. If a subsystem references a pin controller
configuration node, it can not find this node and errors out. In worst
case it's the SPI driver which errors out and we have no root
filesystem to mount.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Set the (sys)upgrade state when sourcing the stage2 script instead of
setting the state for each target individual.
This change fixes the, due to a missing state set, not working upgrade
led on ath79 and apm821xx.
Signed-off-by: Mathias Kresin <dev@kresin.me>
The DWR-118-A2 Wireless Router is based on the MT7620A SoC.
Specification:
- MediaTek MT7620A (580 Mhz)
- 128 MB of RAM
- 16 MB of FLASH
- 1x 802.11bgn radio
- 1x 802.11ac radio (MT7612EN)
- 4x 10/100 Mbps Ethernet (1 WAN and 3 LAN)
- 1x 10/100/1000 Mbps Marvell Ethernet PHY (1 LAN)
- 2x external, non-detachable antennas
- 1x USB 2.0
- UART (J1) header on PCB (57600 8n1)
- 7x LED (5x GPIO-controlled), 2x button
- JBOOT bootloader
Known issues:
- GELAN not working
- flash is very slow
The status led has been assigned to the dwr-118-a2:green:internet led.
At the end of the boot it is switched off and is available for other
operation. Work correctly also during sysupgrade operation.
Installation:
Apply factory image via http web-gui or JBOOT recovery page
How to revert to OEM firmware:
- push the reset button and turn on the power. Wait until LED start
blinking (~10sec.)
- upload original factory image via JBOOT http (IP: 192.168.123.254)
Signed-off-by: Cezary Jackiewicz <cezary@eko.one.pl>
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
HiWiFi "Gee Enjoy1200" HC5861B is a dual-band router based on MediaTek MT7628AN
https://www.hiwifi.com/enjoy-view
Specifications:
- MediaTek MT7628AN 580MHz
- 128 MB DDR2 RAM
- 16 MB SPI Flash
- 2.4G MT7628AN 802.11bgn 2T2R 300Mbps
- 5G MT7612EN 802.11ac 2T2R 867Mbps
- 5x 10/100 Mbps Ethernet
Flash instruction:
1. Get SSH access to the router
2. SSH to router with `ssh -p 1022 root@192.168.199.1`, The SSH password is the same as the webconfig one
3. Upload OpenWrt sysupgrade firmware into the router's `/tmp` folder with SCP
4. Run `mtd write /tmp/<filename> firmware`
5. reboot
Everything is working
Signed-off-by: Deng Qingfang <dengqf6@mail2.sysu.edu.cn>
The wholesale changes introduced in commit f9b8328 missed this DTS file
because it hadn't been merged yet. This patch brings it in line to match
the other mt7620a devices' DTS files.
Additionally, the Internet LED is now labeled correctly and set to unused
by default, since the WAN interface is not known in every configuration.
Using sysupgrade between images before and after this commit will require
the -F flag.
Tested-by: Rohan Murch <rohan.murch@gmail.com>
Signed-off-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
[drop internet led default setting]
Signed-off-by: Mathias Kresin <dev@kresin.me>
This patch adds support for the Netgear R6120, aka Netgear AC1200.
Specification:
- SoC: MediaTek MT7628 (580 MHz)
- Flash: 16 MiB
- RAM: 64 MiB
- Wireless: 2.4Ghz(builtin) and 5Ghz (MT7612E)
- LAN speed: 10/100
- LAN ports: 4
- WAN speed: 10/100
- WAN ports: 1
- Serial baud rate of Bootloader and factory firmware: 57600
To flash use nmrpflash with the provided factory.img.
Flashing via webinterface will not work, for now.
Signed-off-by: Ludwig Thomeczek <ledesrc@wxorx.net>
I-O DATA WN-AC1600DGR2 is a 2.4/5 GHz band 11ac router, based on
Qualcomm Atheros QCA9557.
Specification:
- Qualcomm Atheros QCA9557
- 128 MB of RAM
- 16 MB of Flash
- 2.4/5 GHz wifi
- 2.4 GHz: 2T2R (SoC internal)
- 5 GHz: 3T3R (QCA9880)
- 5x 10/100/1000 Mbps Ethernet
- 6x LEDs, 6x keys (4x buttons, 1x slide switch)
- UART header on PCB
- Vcc, GND, TX, RX from ethernet port side
- 115200n8
Flash instruction using factory image:
1. Connect the computer to the LAN port of WN-AC1600DGR2
2. Connect power cable to WN-AC1600DGR2 and turn on it
3. Access to "http://192.168.0.1/" and open firmware update page
("ファームウェア")
4. Select the OpenWrt factory image and click update ("更新") button
5. Wait ~150 seconds to complete flashing
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
To share mdio addr for IntPHY and ExtPHY,
as described in the documentation (MT7620_ProgrammingGuide.pdf).
(refer: http://download.villagetelco.org/hardware/MT7620/MT7620_ProgrammingGuide.pdf)
when port4 setup to work as gmac mode, dts like:
&gsw {
mediatek,port4 = "gmac";
};
we should set SYSCFG1.GE2_MODE==0x0 (RGMII).
but SYSCFG1.GE2_MODE may have been set to 3(RJ-45) by uboot/default
so we need to re-set it to 0x0
before this changes:
gsw: 4FE + 2GE may not work correctly and MDIO addr 4 cannot be used by ExtPHY
after this changes:
gsw: 4FE + 2GE works and MDIO addr 4 can be used by ExtPHY
Signed-off-by: Chen Minqiang <ptpt52@gmail.com>
When PHY's are defined on the MDIO bus in the DTS, gigabit support was
being masked out for no apparent reason, pegging all such ports to 10/100.
If gigabit support must be disabled for some reason, there should be a
"max-speed" property in the DTS.
Reported-by: James McKenzie <openwrt@madingley.org>
Signed-off-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
Mediatek has a reference platform that pairs an MT7620A with an MT7530W,
where the latter responds on MDIO address 0x1f while both chips respond on
0x0 to 0x4. The driver special-cases this arrangement to make sure it's
talking to the right chip, but two different ways in two different places.
This patch consolidates the detection without the current requirement of
both tests to be separately satisfied in the DTS.
Signed-off-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
Starting with kernel 4.4, the use of partitions as direct subnodes of the
mtd device is discouraged and only supported for backward compatiblity
reasons.
Signed-off-by: Alex Maclean <monkeh@monkeh.net>
Fix space vs. tabs issue and trainling whitespaces. Use C style
comments or drop the comments if they explain what is already to see in
the devicetree parameters.
Signed-off-by: Mathias Kresin <dev@kresin.me>
The hardware NAT node has the same reg/unit as the ethernet node. One
of them need to be a child of the other.
Make the hardware NAT node a child of the ethernet node since the it
"reference" the netdev in its properties.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Add the ranges property to the PCI bridges where missing. Add the unit
address to PCI bridge where missing.
Rework the complete rt3883 pci node. Drop the PCI unit nodes from the
dtsi. They are not used by any dts file and should be rather in the dts
than in the SoC dtsi. Express the PCI-PCI bridge in a clean devicetree
syntax. The ralink,pci-slot isn't used by any driver, drop it. Move the
pci interrupt controller out of the pci node. It doesn't share the same
reg and therefore should be an independent/SoC child node.
Move the pci related rt3883 pinctrl setting to the dtsi instead of
defining the very same for each rt3883 board.
If the device_type property is used for PCI units, the unit is treated
as pci bridge which it isn't. Drop it for PCI units.
Reference pci-bridges or the pci node defined in the dtsi instead of
recreating the whole node hierarchy. It allows to change the referenced
node in the dtsi without the need to touch all dts.
Fix the PCI(e) wireless unit addresses. All our PCI(e) wireless chips
are the first device on the bus. The unit address has to be the bus
address instead of the PCI vendor/device id.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Since commit c1e7738988f5 ("checks: add gpio binding properties check")
dtc treats any *-gpios and *-gpio property as phandle at least during
checks. The only whitelisted property is nr-gpio.
Use ralink,nr-gpio in favour of ralink,num-gpios to get rid of false
positive warnings.
Signed-off-by: Mathias Kresin <dev@kresin.me>
The cpu interrupt controller doesn't have a reg property, hence we
can't use a unit address in the node name.
Signed-off-by: Mathias Kresin <dev@kresin.me>
