Xianjun Jiao 066dd1bba2 fine tuning of ack tx wait time for new design

2022-03-29 10:06:27 +02:00

..

ad9361

Driver changes for FPGA SPI Tx LO control

2022-03-29 09:56:20 +02:00

openofdm_rx

openofdm_rx initialization with the help of macro definition in hw_def.h:

2022-03-28 20:48:36 +02:00

openofdm_tx

Update openofdm_tx.c

2021-02-03 15:38:47 +01:00

rx_intf

openofdm_rx initialization with the help of macro definition in hw_def.h:

2022-03-28 20:48:36 +02:00

side_ch

Scripts are adapted for SW HW decouple

2021-10-20 22:50:30 +02:00

tx_intf

No need to consider 4 last pkt from 4 queue in master branch:

2022-03-28 20:41:00 +02:00

xilinx_dma

Scripts are adapted for SW HW decouple

2021-10-20 22:50:30 +02:00

xpu

fine tuning of ack tx wait time for new design

2022-03-29 10:06:27 +02:00

hw_def.h

Driver changes for FPGA SPI Tx LO control

2022-03-29 09:56:20 +02:00

make_all.sh

Avoid the git_rev.h issue:

2022-03-26 20:47:02 +01:00

Makefile

prepare upgrade

2020-04-27 09:37:04 +02:00

sdr.c

Remove unnecessary ht aggr related flag reset:

2022-03-29 10:04:25 +02:00

sdr.h

Driver changes for FPGA SPI Tx LO control

2022-03-29 09:56:20 +02:00

sdrctl_intf.c

Move sdrctl testmode cmd out to sdrctl_intf.c

2022-03-28 12:46:18 +02:00

sysfs_intf.c

Add sysfs file based driver/FPGA access interface

2022-03-28 12:46:49 +02:00