Commit Graph

13 Commits

Author SHA1 Message Date
Norman Feske
cfd013a01a os/include: use C++20 function template syntax
Issue #5227
2024-05-29 09:18:12 +02:00
Martin Stein
1336b0a751 mmio: upper-bounds checks
The classes Genode::Mmio, Genode::Register_set, Genode::Attached_mmio, and
Platform::Device::Mmio now receive a template parameter 'size_t SIZE'. In each
type that derives from one of these classes, it is now statically checked that
the range of each Genode::Register::Register- and
Genode::Register_set::Register_array-deriving sub-type is within [0..SIZE).

That said, SIZE is the minimum size of the memory region provided to the above
mentioned Mmio classes in order to avoid page faults or memory corruption when
accessing the registers and register arrays declared inside.

Note, that the range end of a register array is not the end of the last item
but the end of integer access that is used for accessing the last bit in the
last item.

The constructors of Genode::Mmio, Genode::Attached_mmio, and
Platform::Device::Mmio now receive an argument 'Byte_range_ptr range' that is
expected to be the range of the backing memory region. In each type that derives
from on of these classes, it is now dynamically checked that 'range.num_bytes
>= SIZE', thereby implementing the above mention protection against page faults
and memory corruption.

The rest of the commit adapts the code throughout the Genode Labs repositories
regarding the changes. Note that for that code inside Core, the commits mostly
uses a simplified approach by constructing MMIO objects with range
[base..base+SIZE) and not with a mapping- or specification-related range size.
This should be fixed in the future.

Furthermore, there are types that derive from an MMIO class but don't declare
any registers or register arrays (especially with Platform::Device::Mmio). In
this case SIZE is set to 0. This way, the parameters must be actively corrected
by someone who later wants to add registers or register arrays, plus the places
can be easily found by grep'ing for Mmio<0>.

Fix #4081
2024-02-26 08:59:07 +01:00
Josef Söntgen
70c57a3be3 pci_decode: calculate 64bit BAR size
Issue #4949.
2023-07-14 12:06:32 +02:00
Stefan Kalkowski
bc1e231775 platform_drv: implement PCI powering and reset
Ref genodelabs/genode#4578
2022-10-12 12:09:37 +02:00
Christian Helmuth
e7ba0b7371 pci: initialize BAR config on demand only
On-demand initialization prevents read-write operations on BARs of
invalid devices at construction time, which may result in surprising
behavior later on, for example, when resetting X260 notebooks via ACPI
information.
2022-10-12 12:09:37 +02:00
Stefan Kalkowski
3841ee1d51 platform_drv: implement MSI-x support
Ref genodelabs/genode#4578
2022-10-12 12:09:36 +02:00
Christian Helmuth
b20cabb6e4 pci: fix PCIe extended capability definition
Also removed the warning about unhandled capability IDs.

Ref genodelabs/genode#4578
2022-10-12 12:09:34 +02:00
Stefan Kalkowski
7334128a2e pci_decode: export prefetchable attribute of BARs
Memory descriptors in PCI BARs have a prefetchable bit, which can
be used to optimize memory access when setting, e.g. write-combined
in page-table entries.

Ref genodelabs/genode#4578
2022-10-12 12:09:34 +02:00
Stefan Kalkowski
c583446ade platform_drv: add HDAUDIO PCI quirks
Ref genodelabs/genode#4578
2022-10-12 11:59:08 +02:00
Stefan Kalkowski
2cc6c1adef pci: export BAR indices, sub-vendor, -product, rev
The pci_decode has to extract the additional fields from the PCI configuration
space. The platform driver again has to parse and forward the knowledge too.
The PCI BAR indices are exported when info="yes" is set in the policy node for
the corresponding session.

Fix genodelabs/genode#4577
2022-08-10 13:33:03 +02:00
Stefan Kalkowski
5bf3e72d37 pci: return correct I/O port base from BAR
The base address of I/O ports has a different encoding than
those of I/O memory. This needs to be encountered in the PCI
config helper utilities.

Fix genodelabs/genode#4576
2022-08-10 13:33:03 +02:00
Stefan Kalkowski
f9a29f291e pci: extend Pci utilities for bridge drivers 2022-05-25 12:22:10 +02:00
Stefan Kalkowski
cacb6136fa app/pci_decode: prepare pci device information
To discharge the generic platform driver from certain PCI bus scanning,
and ACPI + kernel specifics, this commit introduces a new component,
which consumes the acpi drivers report and the platform_info from core
to prepare a devices ROM for the platform driver that contains all
PCI devices and its resources.

Fix genodelabs/genode#4495
2022-05-25 12:19:32 +02:00