692 Commits

Author SHA1 Message Date
Stefan Kalkowski
5a8d149fe3 hw: move all imx7d specifics to imx repository
Ref genodelabs/genode#5252
2024-06-20 13:24:41 +02:00
Norman Feske
14d3c4cb5e Remove Cpu_session::State_access_failed exception
This patch removes the exception formerly thrown by 'Cpu_thread::state'
and turns the 'Thread_state' structure into a plain compound type w/o a
constructor.

Issue #5245
Fixes #5250
2024-06-20 12:56:20 +02:00
Norman Feske
0d7d60a1f4 Remove exceptions from Pd_session interface
This patch replaces exceptions of the PD session RPC interface with
result types.
The change of the quota-transfer RPC functions required the adaptation
of base/quota_transfer.h and base/child.h.
The 'alloc_signal_source' method has been renamed to 'signal_source'
to avoid an exceedingly long name of the corresponding result type.
The Pd_session::map function takes a 'Virt_range' instead of basic-type
arguments.
The 'Signal_source_capability' alias for 'Capability<Signal_source>' has
been removed.

Issue #5245
2024-06-20 12:56:19 +02:00
Benjamin Lamowski
b83b53d3b2 hw: abstract nested paging on x86
The initial SVM implementation (correctly) just used another standard
x86_64 page table for nested paging. The EPT implementation is for Intel
VMX only. Since we don't know the underlying virtualization technology
at compile time, we need to pick the correct page table implementation
at runtime.

Add add a AMD-compatible HPT page table implementation using the same
base implementation and (more importantly) allocator as the EPT
implementation. Add a Vm_page_table implementation that determines the
used virtualization technology at runtime and internally defers insert
and remove operations to the correct page table implementation.

Issue #5218
2024-05-29 09:18:11 +02:00
Benjamin Lamowski
221d0c6c48 hw: implement EPT page table
Implement a nested page table to use with x86 virtualization.

Fixes #5218
2024-05-29 09:18:11 +02:00
Benjamin Lamowski
58e9856eb8 base: move page flags interface to base
On hw, `Page_flags` is used throughout architectures. At the same time,
it is used by the Intel IOMMU page table implementation in the pc
platform driver.

Consolidate the definition in base so it is available for all users.

Issue #5217
2024-05-29 09:18:11 +02:00
Benjamin Lamowski
aad80e81da hw: add support for VMX
Add support for Intel's Virtual Machine Extensions with nested paging.

Fixes #5128
2024-05-29 08:37:08 +02:00
Benjamin Lamowski
dbd070b815 hw: add kernel panic function to x86_64
Add a kernel panic function to x86_64 that mirrors the functionality
available for ARM.

Issue #5128
2024-05-29 08:37:07 +02:00
Benjamin Lamowski
5049f03f5b hw: generic interface for x86 virtualization
Create a generic interface for x86 virtualization.
Split the VMCB data structure in `Vmcb_buf` to represent the physical
VMCB page and `VMCB` as a control interface.

Issue #5113
2024-05-29 08:37:07 +02:00
Benjamin Lamowski
b4fe9154b9 hw: access VMCB State Save Area via Mmio framework
So far, the VMCB data structure was generated from it's parts (most
prominently VMCB Control Area and VMCB State Save Area) with the VMCB Control
Area accessed via the Mmio framework, while the VMCB State Save Area
struct used directly defined members.

Unify the VMCB structure and uniformly use the Mmio framework to access
the VMCB. Separate the controlling structure from the VMCB page.

Issue #5113
2024-05-29 08:37:07 +02:00
Benjamin Lamowski
0d1716b07d hw: prepare SVM implementation for generic virtualization support
The SVM implementation did not lend itself to a runtime selection of the
x86 virtualization technology.

Encapsulate functionality in the VMCB class to facilitate adding support
for Intel's VMX.

Issue #5113
2024-05-29 08:37:07 +02:00
Benjamin Lamowski
3a88d133ed hw: generalize virtualization memory
The initial vCPU memory was written for AMD's SVM.

Make the vCPU memory provider virtualization technology agnostic.

Issue #5113
2024-05-29 08:37:07 +02:00
Stefan Kalkowski
aefbc47c56 hw: preserve slack time, favor activated jobs
In the scheduler's implementation preserve the consumed slack-time
over periods of activation/deactivation, but instead of appending
activated jobs to the end of the slack queue, insert it as new head.
Thereby, the extreme discrimination of threads with short execution
times and frequent blocking behaviour against long running computations
gets avoided.

Fix genodelabs/genode#4796
2024-04-19 08:54:21 +02:00
Johannes Schlatow
536048592b hw: propagate write combining to page flags
Fixes #4799
2024-04-12 15:08:01 +02:00
Christian Helmuth
2f1520b4c1 base-hw: fix EPIT duration calculation on roll-over
If Ocif was not reset between two calls to _duration(), the returned
value exceeded _max_value().
2024-04-12 12:57:30 +02:00
Norman Feske
a0290f8c51 base-hw: preserve usec accuracy in us_to_ticks
The kernel timer used to truncated timeouts to the next lower
millisecond, which not only limits the wakeup accuracy but also results
in situations where a user-level timeout is triggered earlier than
expected. The latter effect results in the observation of a spurious
timeouts and the subsequent programming of another timeout.

The patch solves the problem by preserving the sub-milliseconds bits
in the 'us_to_ticks' implementation(s).

Issue #5142
2024-04-12 12:57:28 +02:00
Christian Prochaska
32e7ec7b9b core: implement 'Vm_session_component::reserve_and_flush()'
Issue #5069
2024-02-28 16:32:23 +01:00
Stefan Kalkowski
394801c998 hw: re-name scheduler files according to class
Fix genodelabs/genode#5115
2024-02-26 08:59:10 +01:00
Stefan Kalkowski
79167d8f5c hw: re-organize scheduler internals & API
* Move Kernel::Cpu_scheduler to Kernel::Scheduler
  (we only have that one scheduler)
* Move Kernel::Cpu_share to Kernel::Scheduler::Context
* Move Kernel::Cpu_priority to Kernel::Scheduler::Priority
* Rename all functions and variables refereing to `claims` to
  `prioritzed`, because claims is not that common
* Rename occurrences of `fill(s)` to `slack` to name the time portions
  outside of the prioritized quantum
* Get rid of some two-liner sub-functions with only one occurrence
  (like `_quota_introduction`, `_quota_revokation`,...)

Ref genodelabs/genode#5115
2024-02-26 08:59:10 +01:00
Stefan Kalkowski
c8380c1447 hw: remove Cpu_scheduler::_trim_consumption
This private, internal function is used only in one scope,
and therefore not neccessary. But it has nasty side-effects as
it takes the parameter `duration` as reference and changes its
value. Just remove it completely.

Ref genodelabs/genode#5115
2024-02-26 08:59:10 +01:00
Stefan Kalkowski
1c4078f23a hw: merge booleans in scheduler into one state
Instead of having `_yield` and `_need_to_schedule` booleans, use one
consistent state variable.

Ref genodelabs/genode#5115
2024-02-26 08:59:10 +01:00
Stefan Kalkowski
9d72c21894 hw: rename head in scheduler to current
The name head is already extensively used in the context of the lists
managed by the scheduler. This terminology duplications does not simplify
reading the code. Instead we keep head for the first item in the list,
but use `current` in the variable name and API of the `Cpu_scheduler`
class to refer to the current scheduled share.

Moreover, the `_head_quota` is now `_current_time_left`, because it does
not denote quota but time left for the current schedule. The boolean
variable `_head_claims` gets removed at all. It duplicated the state of
whether a current share ist set, and whether it has so-called claim time
left.

Ref genodelabs/genode#5115
2024-02-26 08:59:10 +01:00
Stefan Kalkowski
2f727fb5c6 hw: rename Cpu_scheduler variables
Give certain scheduler class wide variables and functions clear names:

* quota => super_period_length
* residual => super_period_left

Ref genodelabs/genode#5115
2024-02-26 08:59:10 +01:00
Stefan Kalkowski
8e2c95e5e4 hw: replace double_list implementation
Replace double linked list by normal Genode::List with an additional
pointer to last list member to efficiently handle the scheduler share lists.
Moreover, move it into the private part of the Cpu_scheduler class,
the only scope where it is used anymore.

Ref genodelabs/genode#5115
2024-02-26 08:59:09 +01:00
Stefan Kalkowski
0055438257 hw: improve readability of scheduler
Minor changes that should not change any semantics:

* Remove `_next_fill()` its short and only used in one context,
  in which it is good to know what that code actually does
* Turn boolean values into actual boolean values
* Remove some brackets around one-liner pathes

Ref genodelabs/genode#5115
2024-02-26 08:59:09 +01:00
Stefan Kalkowski
776c2a6046 hw: avoid state & code duplication in scheduler
The `_head_was_removed` variable got introduced in solving #4710, but it
reflects only whether `_head` is a valid pointer or not, thereby it
duplicates state.

Ref genodelabs/genode#5115
2024-02-26 08:59:09 +01:00
Martin Stein
1336b0a751 mmio: upper-bounds checks
The classes Genode::Mmio, Genode::Register_set, Genode::Attached_mmio, and
Platform::Device::Mmio now receive a template parameter 'size_t SIZE'. In each
type that derives from one of these classes, it is now statically checked that
the range of each Genode::Register::Register- and
Genode::Register_set::Register_array-deriving sub-type is within [0..SIZE).

That said, SIZE is the minimum size of the memory region provided to the above
mentioned Mmio classes in order to avoid page faults or memory corruption when
accessing the registers and register arrays declared inside.

Note, that the range end of a register array is not the end of the last item
but the end of integer access that is used for accessing the last bit in the
last item.

The constructors of Genode::Mmio, Genode::Attached_mmio, and
Platform::Device::Mmio now receive an argument 'Byte_range_ptr range' that is
expected to be the range of the backing memory region. In each type that derives
from on of these classes, it is now dynamically checked that 'range.num_bytes
>= SIZE', thereby implementing the above mention protection against page faults
and memory corruption.

The rest of the commit adapts the code throughout the Genode Labs repositories
regarding the changes. Note that for that code inside Core, the commits mostly
uses a simplified approach by constructing MMIO objects with range
[base..base+SIZE) and not with a mapping- or specification-related range size.
This should be fixed in the future.

Furthermore, there are types that derive from an MMIO class but don't declare
any registers or register arrays (especially with Platform::Device::Mmio). In
this case SIZE is set to 0. This way, the parameters must be actively corrected
by someone who later wants to add registers or register arrays, plus the places
can be easily found by grep'ing for Mmio<0>.

Fix #4081
2024-02-26 08:59:07 +01:00
Benjamin Lamowski
8540b4c9d1 hw: rename Vm_data to Vcpu_data
Rename Vm_data to Vcpu_data to make it clear that the allocated data is
per vCPU, not per VM.

Issue #5100
2024-02-26 08:31:05 +01:00
Benjamin Lamowski
69b76ba9ed hw: move physical VMCB address out of the VMCB
The physical address of the memory used for the guest VMCB is already
present in Vcpu_data. Use the information there instead of storing the
physical address in the host data area, thereby freeing up 8 bytes for
a bigger Mmio class.

Issue #4081
2024-02-26 08:31:05 +01:00
Benjamin Lamowski
25c7204b2a hw: clear RAM dataspaces in chunks
Clearing very large RAM dataspaces could fill up core's page table,
because the dataspaces are locally mapped to clear them.
This would manifest in a loop where exhausting the local page table
leads to its flushing (which does not work for core) and a retry that
again fills up the page table and so on.

To prevent this, flush RAM dataspaces in chunks of at most 128MiB.

Fixes #5086
2024-02-26 08:31:03 +01:00
Christian Prochaska
9a049789de core: mark implicitly detached regions as reserved
Fixes #5069
2023-12-13 12:32:19 +01:00
Johannes Schlatow
eefaa07024 base: add irq_type session argument
By adding the `irq_type` argument, one can explicitly specify whether to
use LEGACY, MSI or MSI-X interrupts. We formerly used the
`device_phys_config` to implicitly select MSI, however, with the
addition of IOMMU support to the platform driver there is at least one
instance where we need an MSI for a non-PCI device.

Yet, by adding another session argument to the Irq session, we exceed
the character limit for session args. Since not all arguments are
relevant for LEGACY interrupts resp. MSI, we can split the Irq_connection
constructor to handle the two cases separately and omit unneeded
arguments.

genodelabs/genode#5002
2023-11-28 19:35:16 +01:00
Christian Prochaska
789ae1ea8d hw: distinguish 'Alloc_error' conditions in 'Cap_space'
Issue #5057
2023-11-28 14:44:28 +01:00
Stefan Kalkowski
5471ef7e1e hw: increase default page-table array
Fix #5035
2023-10-25 08:58:53 +02:00
Christian Prochaska
aea90dc7da hw: fix vmm_arm test on arm_v8a
Fixes #4975 regression
2023-10-04 13:22:08 +02:00
Benjamin Lamowski
0e49149a46 base-hw: rename Vm_state to Vcpu_state
Make naming across architectures coherent by renaming Vm_state to
Vcpu_state, to reflect that it contains the state of a Vcpu and not that
of an entire VM.

Ref #4968
2023-10-04 13:22:07 +02:00
Alexander Boettcher
916bd88e5e base: extend PD session by system_control_cap
Per Affinity::Location a system control cap can be requested. The capability
provides an RPC interface to request and set Cpu_state, as provided by the
former Pd::managing_system(Cpu_state) method. Invocation of those system
control capabilities then *can* (see below) be executed on the desired CPU
as described by Affinity::Location.

The system control cap will be invalid for kernels that don't support
system_control/managing_system functionality at all.

The system control cap will be ever by the same, e.g. ignoring the
Affinity::Location parameter, if the used kernel doesn't support or doesn't
require the feature to execute the system control per CPU.

The commit is a preparation step to add guarded and selective x86 MSR
access per CPU.

Fixes #5009
2023-10-04 13:22:07 +02:00
Benjamin Lamowski
9489bf41a5 base-hw: port to new VMM library API
Ref #4968
2023-10-04 13:22:03 +02:00
Christian Prochaska
8b7f959451 hw: send exception signals and support single-stepping
Fixes #4975
2023-08-23 13:46:37 +02:00
Martin Stein
ca1a94d74c base-hw imx epit-timer: improve code readability
Improves the readability of the implementation of the Timer::_duration method.

Ref #4959
2023-07-14 12:06:32 +02:00
Martin Stein
90ba794e8e base-hw imx epit-timer: fix duration calculation
The timer used to read the counter first and then the IRQ status. This
could cause a non-wrapped counter value to be considered a wrapped
counter value, leading to bogus timeout durations.

This commit fixes the bug and documents the used timer mode in the
driver in order to make future debugging of the driver easier.

Ref #4959
2023-07-14 12:06:32 +02:00
Stefan Kalkowski
5e7e6514be Remove i.MX6 platforms from base repositories
Fix genodelabs/genode#4941
2023-07-14 12:06:31 +02:00
Norman Feske
a4c59c03e3 core: rework page-fault resolution
The change "core: allow offset-attached managed dataspaces" addressed a
corner case of the use of nested region maps. Apparently, this change
negatively affects other scenarios (tool_chain_auto).

In order to confidently cover all the differnt situations, this patch
reworks the page-fault resolution code for improved clarity and safety,
by introducing dedicated result types, reducing the use of basic types,
choosing expressive names, and fostering constness.

It also introduces a number of 'print' hooks that greatly ease manual
instrumentation and streamlines the error messages printed by core.
Those messages no longer appear when a user-level page-fault handler
is reistered for the faulted-at region map. So the monitor component
produces less noise on the attempt to dump non-existing memory.

Issue #4917
Fixes #4920
2023-06-16 11:24:26 +02:00
Alexander Boettcher
b349dd9c0a sel4: convert io memory on demand
instead all during boot. On x86 and qemu this takes quite a while until
the system is booted.

Fixes #4913
2023-06-16 11:24:25 +02:00
Benjamin Lamowski
e882ca748d base-hw: virt: implement support for SVM
Ref #4826
2023-05-30 12:13:34 +02:00
Benjamin Lamowski
1e3836f8b5 base-hw: pass generic Vm_data structure to the kernel object
This enables passing additional data structures to the kernel on x86.

Ref #4826
2023-05-30 12:13:34 +02:00
Benjamin Lamowski
312b638220 base-hw: export Intel TSC platform information
Export TSC invariant and the frequency reported on Intel processors.
Currently lacks TSC calibration and reports a fixed frequency on AMD.

Ref #4826
2023-05-30 12:13:33 +02:00
Benjamin Lamowski
c75b07e0fd base-hw: SVM: allow execute on NPT mappings
Ref #4826
2023-05-30 12:13:33 +02:00
Benjamin Lamowski
cb69c59fa3 base-hw: implement VMCB data structure for AMD SVM
Ref #4826
2023-05-30 12:13:33 +02:00
Benjamin Lamowski
7477f99d05 base-hw: x86: detect CPU Vendor and SVM support
Ref #4826
2023-05-30 12:13:33 +02:00