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hw: implement EPT page table
Implement a nested page table to use with x86 virtualization. Fixes #5218
This commit is contained in:
Benjamin Lamowski
Christian Helmuth
parent
4fc94deccb
commit
221d0c6c48
@ -20,8 +20,8 @@
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#include <cpu.h>
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#include <cpu/vcpu_state_virtualization.h>
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#include <hw/spec/x86_64/page_table.h>
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#include <hw/spec/x86_64/x86_64.h>
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#include <spec/x86_64/virtualization/ept.h>
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#include <spec/x86_64/virtualization/svm.h>
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#include <spec/x86_64/virtualization/vmx.h>
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@ -30,7 +30,7 @@ using Genode::uint64_t;
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namespace Board {
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using Vm_page_table = Hw::Page_table;
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using Vm_page_table = Hw::Ept;
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using Vm_page_table_array =
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Vm_page_table::Allocator::Array<Kernel::DEFAULT_TRANSLATION_TABLE_MAX>;
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struct Vcpu_context;
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199
repos/base-hw/src/core/spec/x86_64/virtualization/ept.h
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199
repos/base-hw/src/core/spec/x86_64/virtualization/ept.h
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@ -0,0 +1,199 @@
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/*
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* \brief EPT page table definitions
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* \author Benjamin Lamowski
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* \date 2024-04-23
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*/
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/*
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* Copyright (C) 2024 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU Affero General Public License version 3.
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*/
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#ifndef _CORE__SPEC__PC__VIRTUALIZATION__EPT_H_
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#define _CORE__SPEC__PC__VIRTUALIZATION__EPT_H_
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#include <cpu/page_table_allocator.h>
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#include <page_table/page_table_base.h>
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#include <util/register.h>
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namespace Hw {
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class Ept;
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using namespace Genode;
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/*
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* Common EPT Permissions
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*
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* For further details see Intel SDM Vol. 3C
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* Table 29-2. Format of an EPT PML4 Entry (PML4E) that References an
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* EPT Page-Directory-Pointer Table
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*/
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struct Ept_common_descriptor : Genode::Register<64>
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{
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struct R : Bitfield< 0,1> { }; /* Read */
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struct W : Bitfield< 1,1> { }; /* Write */
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struct X : Bitfield< 2,1> { }; /* Execute */
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struct A : Bitfield< 8,1> { }; /* Accessed */
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struct D : Bitfield< 9,1> { }; /* Dirty (ignored in tables) */
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struct UX : Bitfield<10,1> { }; /* User-mode execute access */
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static bool present(access_t const v) { return R::get(v); }
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static access_t create(Page_flags const &flags)
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{
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return R::bits(1)
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| W::bits(flags.writeable)
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| UX::bits(!flags.privileged)
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| X::bits(flags.executable);
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}
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/**
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* Return descriptor value with cleared accessed and dirty flags. These
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* flags can be set by the MMU.
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*/
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static access_t clear_mmu_flags(access_t value)
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{
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A::clear(value);
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D::clear(value);
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return value;
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}
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};
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template <unsigned _PAGE_SIZE_LOG2, unsigned _SIZE_LOG2>
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struct Pml4e_table_descriptor : Ept_common_descriptor
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{
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static constexpr size_t PAGE_SIZE_LOG2 = _PAGE_SIZE_LOG2;
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static constexpr size_t SIZE_LOG2 = _SIZE_LOG2;
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struct Pa : Bitfield<12, SIZE_LOG2> { }; /* Physical address */
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static access_t create(addr_t const pa)
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{
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/* XXX: Set memory type depending on active PAT */
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static Page_flags flags { RW, EXEC, USER, NO_GLOBAL,
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RAM, Genode::CACHED };
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return Ept_common_descriptor::create(flags) | Pa::masked(pa);
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}
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};
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struct Ept_page_directory_base_descriptor : Ept_common_descriptor
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{
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using Common = Ept_common_descriptor;
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struct Ps : Common::template Bitfield<7, 1> { }; /* Page size */
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static bool maps_page(access_t const v) { return Ps::get(v); }
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};
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template <unsigned _PAGE_SIZE_LOG2>
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struct Ept_page_directory_descriptor : Ept_page_directory_base_descriptor
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{
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static constexpr size_t PAGE_SIZE_LOG2 = _PAGE_SIZE_LOG2;
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struct Page;
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struct Table;
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};
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/* Table 29-7. Format of an EPT Page-Table Entry that Maps a 4-KByte Page */
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template <unsigned _PAGE_SIZE_LOG2>
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struct Ept_page_table_entry_descriptor : Ept_common_descriptor
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{
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using Common = Ept_common_descriptor;
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static constexpr size_t PAGE_SIZE_LOG2 = _PAGE_SIZE_LOG2;
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struct Type : Bitfield< 3, 3> { }; /* Ept memory type, see Section 29.3.7 */
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struct Pat : Bitfield< 6, 1> { }; /* Ignore PAT memory type, see 29.3.7 */
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struct Pa : Bitfield<12,36> { }; /* Physical address */
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static access_t create(Page_flags const &flags, addr_t const pa)
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{
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return Common::create(flags) | Pa::masked(pa) | Type::bits(6) | Pat::bits(1);
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}
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};
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struct Ept_page_table
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:
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Genode::Final_table<Ept_page_table_entry_descriptor<SIZE_LOG2_4KB>>
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{ } __attribute__((aligned(1 << ALIGNM_LOG2)));
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struct Ept_pd
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:
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Genode::Page_directory<Ept_page_table,
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Ept_page_directory_descriptor<SIZE_LOG2_2MB>>
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{ } __attribute__((aligned(1 << ALIGNM_LOG2)));
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struct Ept_pdpt
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:
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Genode::Page_directory<Ept_pd,
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Ept_page_directory_descriptor<SIZE_LOG2_1GB>>
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{ } __attribute__((aligned(1 << ALIGNM_LOG2)));
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struct Pml4e_table
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:
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Genode::Pml4_table<Ept_pdpt,
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Pml4e_table_descriptor<SIZE_LOG2_512GB, SIZE_LOG2_256TB>>
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{ } __attribute__((aligned(1 << ALIGNM_LOG2)));
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}
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template <unsigned _PAGE_SIZE_LOG2>
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struct Hw::Ept_page_directory_descriptor<_PAGE_SIZE_LOG2>::Table
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: Ept_page_directory_base_descriptor
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{
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using Base = Ept_page_directory_base_descriptor;
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/**
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* Physical address
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*/
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struct Pa : Base::template Bitfield<12, 36> { };
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static typename Base::access_t create(addr_t const pa)
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{
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static Page_flags flags { RW, EXEC, USER, NO_GLOBAL,
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RAM, Genode::CACHED };
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return Base::create(flags) | Pa::masked(pa);
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}
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};
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template <unsigned _PAGE_SIZE_LOG2>
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struct Hw::Ept_page_directory_descriptor<_PAGE_SIZE_LOG2>::Page
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: Ept_page_directory_base_descriptor
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{
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using Base = Ept_page_directory_base_descriptor;
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struct Type : Bitfield< 3,3> { }; /* Ept memory type, see Section 29.3.7 */
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struct Pat : Bitfield< 6,1> { }; /* Ignore PAT memory type, see 29.3.7 */
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/**
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* Physical address
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*/
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struct Pa : Base::template Bitfield<PAGE_SIZE_LOG2,
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48 - PAGE_SIZE_LOG2> { };
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static typename Base::access_t create(Page_flags const &flags,
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addr_t const pa)
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{
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return Base::create(flags)
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| Base::Ps::bits(1)
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| Pa::masked(pa)
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| Type::bits(6)
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| Pat::bits(1);
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}
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};
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class Hw::Ept : public Pml4e_table
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{
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public:
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using Allocator = Genode::Page_table_allocator<1UL << SIZE_LOG2_4KB>;
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using Pml4e_table::Pml4e_table;
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};
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#endif /* _CORE__SPEC__PC__VIRTUALIZATION__EPT_H_ */
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