59 Commits

Author SHA1 Message Date
Joel Dice
16c526b775 fix OS X 10.8 and iOS 6.0 builds
This also adds support for Clang ARM builds, which involved removing
unused functions from arm.cpp to avoid link-time warnings.
2012-10-03 13:36:51 -06:00
Xerxes Rånby
2a15201b18 gcc define __ARM_PCS_VFP for -mfloat-abi=hard, use it to detect armhf builds.
Signed-off-by: Xerxes Rånby <xerxes@zafena.se>
2012-10-01 13:39:18 +02:00
Joel Dice
127d56d0fe fix register masks used for planning in arm.cpp
We can't use a floating point register where an integer register is
needed, or we may generate an invalid instruction.
2012-08-13 09:22:18 +00:00
Joel Dice
69ffa28e1b fix shift instruction implementations on ARM
Unlike x86, ARM does not implicitly mask the shift value, so we must
do so explicitly.
2012-08-11 19:09:03 +00:00
Joel Dice
b98abe3f94 fix float to integer conversion
Java requires that NaNs be converted to zero and that numbers at or
beyond the limits of integer representation be clamped to the largest
or smallest value that can be represented, respectively.
2012-08-12 14:31:58 -06:00
JET
f0c4762ded ARM VFP support: Almost finished.
All but one test (and just one line therein) are passing.  Several
quirks and optimizations must also be addressed.
2012-06-12 17:00:45 -06:00
JET
11d750af70 single-precision hardfloat emission working
anything involving doubles (including conversions and thunking from
singles) is still broken
2012-06-04 12:39:53 -06:00
JET
2d20173224 added immediate to bkpt instruction 2012-05-17 18:39:40 -06:00
JET
b96fc05a61 Merge branch 'master' of oss.readytalk.com:/var/local/git/avian into armvfp
Conflicts:
	src/arm.cpp
2012-05-17 12:22:18 -06:00
Joel Dice
0addd8c814 update copyright years 2012-05-11 17:43:27 -06:00
Joshua Warner
fa9814b86d remove lots of unnecessary sizeof computations with a convenient 'operator new' overload 2012-05-08 16:14:54 -06:00
Joel Dice
ea4e0a2f5d fix a couple of subtle Thread.getStackTrace bugs
The first problem was that, on x86, we failed to properly keep track
of whether to expect the return address to be on the stack or not when
unwinding through a frame.  We were relying on a "stackLimit" pointer
to tell us whether we were looking at the most recently-called frame
by comparing it with the stack pointer for that frame.  That was
inaccurate in the case of a thread executing at the beginning of a
method before a new frame is allocated, in which case the most recent
two frames share a stack pointer, confusing the unwinder.  The
solution involves keeping track of how many frames we've looked at
while walking the stack.

The other problem was that compareIpToMethodBounds assumed every
method was followed by at least one byte of padding before the next
method started.  That assumption was usually valid because we were
storing the size following method code prior to the code itself.
However, the last method of an AOT-compiled code image is not followed
by any such method header and may instead be followed directly by
native code with no intervening padding.  In that case, we risk
interpreting that native code as part of the preceding method, with
potentially bizarre results.

The reason for the compareIpToMethodBounds assumption was that methods
which throw exceptions as their last instruction generate a
non-returning call, which nonetheless push a return address on the
stack which points past the end of the method, and the unwinder needs
to know that return address belongs to that method.  A better solution
is to add an extra trap instruction to the end of such methods, which
is what this patch does.
2012-05-04 18:51:58 -06:00
JET
9b1b07bd88 Debugging VFP support on ARM. 2012-04-02 12:55:23 -06:00
JET
47b91f38ee Additional floating-point support code; passing all tests when vfpSupport() returns false. 2012-01-26 18:26:29 -07:00
JET
233725e232 All tests passing (again). 2012-01-18 12:41:51 -07:00
JET
9c58c7c936 compiling; all VFP emitters are now correct 2012-01-17 14:10:51 -07:00
JET
c989ea0529 Merge branch 'master' into armvfp 2012-01-16 11:26:03 -07:00
JET
fab278f09d More emitters and such; probably not compiling. 2011-12-06 09:24:30 -07:00
Joel Dice
ed6945dec7 fix offset calculations in arm.cpp and powerpc.cpp 2011-09-30 18:46:53 -06:00
JET
97bc388f57 ARM VFP multiplication testing. 2011-09-29 14:25:31 -06:00
JET
5cf21f49c7 Compiler error fix. 2011-09-28 15:38:27 -06:00
JET
253b2c264d Merge branch 'ios' into armvfp 2011-09-28 15:10:02 -06:00
JET
ce829b1c77 Added VFP emitters (have yet to compile). 2011-09-28 15:08:23 -06:00
Joel Dice
3fa4a7001d fix x86->powerpc boot image cross build
This fixes the remaining cross-endian translation issues needed to
build powerpc boot images on x86.
2011-09-23 22:31:24 -06:00
Joel Dice
349d381d95 progress towards cross-endian bootimage builds
This fixes a number of bugs concerning cross-architecture bootimage
builds involving diffent endianesses.  There will be more work to do
before it works.
2011-09-16 20:53:08 -06:00
Joel Dice
e3fc8d3dd2 enable cross-architecture ARM bootimage builds 2011-09-01 10:51:56 -06:00
Joel Dice
44f7bd9fe0 fix argument alignment for Darwin/ARM 2011-08-10 21:33:56 -06:00
Joel Dice
e3662f13a9 update copyright years and increment version number 2011-07-13 08:25:21 -06:00
Joel Dice
fa7d46c322 handle methods ending with large blocks properly when generating constant pools
We can only omit the jump past a constant pool if it's placed at the
end of a method, which is only true if the pool belongs to the last
block of that method and that block is not so large that the pool must
be placed inside the block instead of after it.
2011-05-11 19:56:29 -06:00
Joel Dice
255fc9f9d3 handle long conditional immediate branches properly on PowerPC
Due to encoding limitations, the immediate operand of conditional
branches can be no more than 32KB forward or backward.  Since the
JIT-compiled form of some methods can be larger than 32KB, and we also
do conditional jumps to code outside the current method in some cases,
we must work around this limitation.

The strategy of this commit is to provide inline, intermediate jump
tables where necessary.  A given conditional branch whose target is
too far for a direct jump will instead point to an unconditional
branch in the nearest jump table which points to the actual target.

Unconditional immediate branches are also limited on PowerPC, but this
limit is 32MB, which is not an impediment in practice.  If it does
become a problem, we'll need to encode such branches using multiple
instructions.
2011-02-27 23:03:13 -07:00
Joel Dice
e20daca297 use link register to determine return address when appropriate in getStackTrace
On PowerPC and ARM, we can't rely on the return address having already
been saved on the stack on entry to a thunk, so we must look for it in
the link register instead.
2011-02-21 15:25:52 -07:00
Joel Dice
8a88c6ee3c fix ARM stack unwinding
We can't rely on the C++ compiler to save the return address in a
known location on entry to each function we might call from Java
(although GCC 4.5 seems to do so consistently, which is why I hadn't
realized the unwinding code was relying on that assumption), so we
must store it explicitly in MyThread::ip in each thunk.  For PowerPC
and x86, we continue saving it on the stack as always, since the
calling convention guarantees its location relative to the stack
pointer.
2011-02-19 20:52:14 -07:00
Joel Dice
fff51bad06 more progress on PowerPC build
Also, hide frame mapping for stack unwinding (which is still
incomplete) in x86.cpp, since no other platform needs it.
2011-01-30 14:14:57 -07:00
Joel Dice
6296350d76 fix ARM tails=true and continuations=true builds 2011-01-29 18:09:47 -07:00
Joel Dice
fb5c0bfebd fix ARM stack unwinding 2011-01-29 11:10:54 -07:00
Joel Dice
17449eaf1b progress towards fixing the ARM build 2011-01-28 17:16:08 -07:00
Joel Dice
c1a0d8b6fc more work on frame-pointer-less unwinding
This fixes the tails=true build (at least for x86_64) and eliminates
the need for a frame table in the tails=false build.  In the
tails=true build, we still need a frame table on x86(_64) to help
determine whether we've caught a thread executing code to do a tail
call or pop arguments off the stack.  However, I've not yet written
the code to actually use this table, and it is only needed to handle
asynchronous unwinds via Thread.getStackTrace.
2011-01-25 17:22:43 -07:00
Joel Dice
43cbfd3f3a support stack unwinding without using a frame pointer
Previously, we unwound the stack by following the chain of frame
pointers for normal returns, stack trace creation, and exception
unwinding.  On x86, this required reserving EBP/RBP for frame pointer
duties, making it unavailable for general computation and requiring
that it be explicitly saved and restored on entry and exit,
respectively.

On PowerPC, we use an ABI that makes the stack pointer double as a
frame pointer, so it doesn't cost us anything.  We've been using the
same convention on ARM, but it doesn't match the native calling
convention, which makes it unusable when we want to call native code
from Java and pass arguments on the stack.

So far, the ARM calling convention mismatch hasn't been an issue
because we've never passed more arguments from Java to native code
than would fit in registers.  However, we must now pass an extra
argument (the thread pointer) to e.g. divideLong so it can throw an
exception on divide by zero, which means the last argument must be
passed on the stack.  This will clobber the linkage area we've been
using to hold the frame pointer, so we need to stop using it.

One solution would be to use the same convention on ARM as we do on
x86, but this would introduce the same overhead of making a register
unavailable for general use and extra code at method entry and exit.

Instead, this commit removes the need for a frame pointer.  Unwinding
involves consulting a map of instruction offsets to frame sizes which
is generated at compile time.  This is necessary because stack trace
creation can happen at any time due to Thread.getStackTrace being
called by another thread, and the frame size varies during the
execution of a method.

So far, only x86(_64) is working, and continuations and tail call
optimization are probably broken.  More to come.
2011-01-16 19:05:05 -07:00
Joel Dice
544cebb7f0 use MyBlock::start when computing constant pool offsets, not MyBlock::offset 2010-12-07 18:17:41 -07:00
Joel Dice
378f7086b7 fix return address code offset calculation on ARM
We have to be careful about how we calculate return addresses on ARM
due to padding introduced by constant pools interspersed with code.
When calculating the offset of code where we're inserting a constant
pool, we want the offset of the end of the pool for jump targets, but
we want the offset just prior to the beginning of the pool (i.e. the
offset of the instruction responsible for jumping past the pool) when
calculating a return address.
2010-12-07 15:57:11 -07:00
Joel Dice
bc326fb5e9 fix ARM bootimage=true build 2010-11-16 02:38:36 +00:00
Joel Dice
3fb834d008 fix pre-GCC-4.4 ARM build 2010-11-15 23:56:34 +00:00
Joel Dice
6bf74bf380 optimize loads of constant values by using PC-relative addressing on ARM
Previously, loading an arbitrary 32-bit constant required up to four
instructions (128 bytes), since we did so one byte at a time via
immediate-mode operations.

The preferred way to load constants on ARM is via PC-relative
addressing, but this is challenging because immediate memory offsets
are limited to 4096 bytes in either direction.  We frequently need to
compile methods which are larger than 4096, or even 8192, bytes, so we
must intersperse code and data if we want to use PC-relative loads
everywhere.

This commit enables pervasive PC-relative loads by handling the
following cases:

 1. Method is shorter than 4096 bytes: append data table to end

 2. Method is longer than 4096 bytes, but no basic block is longer
 than 4096 bytes: insert data tables as necessary after blocks, taking
 care to minimize the total number of tables

 3. Method is longer than 4096 bytes, and some blocks are longer than
 4096 bytes: split large basic blocks and insert data tables as above
2010-11-13 19:42:29 -07:00
Joel Dice
f21d2b68b8 fix another ARM immediate offset bug
Some memory operations can only handle 8-bit immediate values, so we
need to use a temporary register for those which don't fit.
2010-11-09 17:31:52 -07:00
Joel Dice
7978102cb6 use register for indexing if constant offset is too large (or too small)
Immediate indexes on ARM must be no more than 12 bits, so we must use
a temporary register for values which don't fit.
2010-11-09 11:36:38 -07:00
Joel Dice
5d5dbd860b fix ARM tails=true build
This requires adding LinkRegister to the list of reserved registers,
since it must be preserved in the thunk code generated by
compileDirectInvoke.  An alternative would be to explicitly preserve
it in that special case, but that would complicate the code quite a
bit.
2010-11-08 00:41:44 +00:00
jet
a1f5456451 All tests passing for ARM port in JIT mode. 2010-09-03 12:52:11 -06:00
Joel Dice
dd0a696932 handle logical AND with a constant in a single instruction where possible 2010-09-03 18:32:22 +01:00
Joel Dice
bd01784249 save return address in arm.cpp's MyAssembler::saveFrame
This is necessary to allow safe stack unwinding (e.g. for exception
handling and garbage collection) from native code.
2010-09-03 00:18:19 +01:00
jet
a20d7e028b Longs.java test now progresses further before failure. 2010-09-02 16:09:01 -06:00