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Author SHA1 Message Date
Robert Ghilduta
8623814cba fix RX timing closure 2024-04-14 23:14:16 -07:00
Robert Ghilduta
0a0a3ea8d0 Divide TX's output by 4 to ensure eveything fits within 12bit IQ 
This is due to a 48 carrier + 4 pilot OFDM symbol having a high PAPR.
 2021-10-04 22:07:30 -07:00
Robert Ghilduta
8d9ffaa81c Ensure only correct packet buffer is double buffer is written to 2021-10-04 15:50:10 -07:00
Robert Ghilduta
45c79ef635 Reset clock domain crossing RX buffer whenever a good packet is about to be received 2021-10-04 15:49:25 -07:00
Robert Ghilduta
59e0289fe7 Make DCF timer more aggressive 2021-06-07 12:15:48 -07:00
Robert Ghilduta
c201bac60f Add README.md 2021-01-12 22:59:41 -08:00
Robert Ghilduta
7a07340675 Change Viterbi decoder core 
This commit replaces the modem's Viterbi decoder core with the one in
bladeRF-wiphy. To use the Altera core instead, revert this commit.
 2021-01-12 22:59:37 -08:00
Robert Ghilduta
7b8d5aa163 Change FFT/IFFT core 
This commit replaces the modem's FFT/IFFT cores with the FFT core in
bladeRF-wiphy. To use the Altera cores instead, revert this commit.
 2021-01-12 22:58:46 -08:00
Robert Ghilduta
1bfa301e01 Update list of files to compile 2021-01-12 22:58:46 -08:00
Robert Ghilduta
ea221d0b3f Add C models for FFT/IFFT and Viterbi decoder 2021-01-12 22:58:46 -08:00
Robert Ghilduta
cbcc2c1951 Add traceback based soft decision Viterbi decoder implementation 2021-01-12 22:58:46 -08:00
Robert Ghilduta
45fda6959a Add dual_port_ram based FFT implementation 2021-01-12 22:58:46 -08:00
Nuand
0155a73a89 Add cores 2020-12-30 23:20:01 -08:00
Nuand
3e751f3e37 Initial commit 2020-12-30 23:19:51 -08:00