mrcharles
1b447b77ad
ChipBench packages Ghidra, radare2, binwalk, chip-programming tools,
simulators, and firmware-unpacking utilities into one reproducible container
for analyzing raw chip dumps entirely from the command line or an AI CLI.
Headless Jython scripts drive import, forced-disassembly sweeps, live
queries, and bulk decompilation exports without any GUI.
Derived from a private engagement environment, generalized for public
release under AGPLv3. No engagement-specific artifacts are included.
💘 Generated with Crush
Assisted-by: Crush:glm-5.2
19 lines
862 B
Markdown
19 lines
862 B
Markdown
# Changelog
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## 0.2.0 (2026-08-17)
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- Forked to public ChipBench project (AGPLv3).
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- Toolset expansion (apt availability verified on ubuntu:24.04):
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flashrom, avrdude, openocd, stlink-tools, srecord, simavr, gpsim,
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z80dasm, binutils-multiarch, squashfs-tools, p7zip-full, cabextract,
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lzma, cpio, unar, u-boot-tools, device-tree-compiler, tio, picocom,
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esptool, vbindiff; pyserial added to the venv.
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- re-analyze rewritten: Jython post-scripts (Analyze8051.py + ExportAll.py),
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auto-attaches the 8051 sweep for 8051-family -processor args
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(RE_NO_SWEEP=1 to skip).
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- README rewritten for public release.
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## 0.1.0 (2026-07)
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- Initial private build: Ghidra 11.3.2 + GhidraMCP 1.4, radare2, binwalk v3,
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binutils-avr, gputils, sdcc, capstone/unicorn/keystone, VNC/noVNC desktop;
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headless Query.py / ExportAll.py workflow (re-q / re-export / re-analyze).
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