2 Commits
Author SHA1 Message Date
mrcharles 1445ac01cc Fix stage-level build args and esptool binary name; verified image build 2026-08-18 11:22:18 -05:00
mrcharles 1b447b77ad Initial public release: dockerized reverse-engineering workbench
ChipBench packages Ghidra, radare2, binwalk, chip-programming tools,
simulators, and firmware-unpacking utilities into one reproducible container
for analyzing raw chip dumps entirely from the command line or an AI CLI.
Headless Jython scripts drive import, forced-disassembly sweeps, live
queries, and bulk decompilation exports without any GUI.

Derived from a private engagement environment, generalized for public
release under AGPLv3. No engagement-specific artifacts are included.

💘 Generated with Crush

Assisted-by: Crush:glm-5.2
2026-08-18 11:15:05 -05:00