mrcharles
1b447b77ad
ChipBench packages Ghidra, radare2, binwalk, chip-programming tools,
simulators, and firmware-unpacking utilities into one reproducible container
for analyzing raw chip dumps entirely from the command line or an AI CLI.
Headless Jython scripts drive import, forced-disassembly sweeps, live
queries, and bulk decompilation exports without any GUI.
Derived from a private engagement environment, generalized for public
release under AGPLv3. No engagement-specific artifacts are included.
💘 Generated with Crush
Assisted-by: Crush:glm-5.2
862 B
862 B
Changelog
0.2.0 (2026-08-17)
- Forked to public ChipBench project (AGPLv3).
- Toolset expansion (apt availability verified on ubuntu:24.04): flashrom, avrdude, openocd, stlink-tools, srecord, simavr, gpsim, z80dasm, binutils-multiarch, squashfs-tools, p7zip-full, cabextract, lzma, cpio, unar, u-boot-tools, device-tree-compiler, tio, picocom, esptool, vbindiff; pyserial added to the venv.
- re-analyze rewritten: Jython post-scripts (Analyze8051.py + ExportAll.py), auto-attaches the 8051 sweep for 8051-family -processor args (RE_NO_SWEEP=1 to skip).
- README rewritten for public release.
0.1.0 (2026-07)
- Initial private build: Ghidra 11.3.2 + GhidraMCP 1.4, radare2, binwalk v3, binutils-avr, gputils, sdcc, capstone/unicorn/keystone, VNC/noVNC desktop; headless Query.py / ExportAll.py workflow (re-q / re-export / re-analyze).