openwrt/target/linux/mediatek/dts/mt7981b-openembed-som7981.dts
Tianling Shen 5a7fb834c7 mediatek: update openembed som7981 support
The board has been redesigned due to previous hardware bugs
(with other reasons maybe).

Changes in new board:
- Added a gpio beeper
- Added a Atmel i2c eeprom
- Added a Atmel i2c ECC accelerator
- Added a Philips RTC module
- Added two RS485
- Removed WPS button
- Replaced USB3 port with M.2 B-key for LTE modules
- Swapped GbE LEDs gpio

Also assigned wifi mac with nvmem binding, added iface setup for failsafe,
increased phy assert time for rtl8221b, and updated LED labels.

Keeping compatibility for old version is not necessary here as only
few samples were sent to those interested in it.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/17253
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2024-12-22 18:19:16 +01:00

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include "mt7981.dtsi"
/ {
model = "OpenEmbed SOM7981";
compatible = "openembed,som7981", "mediatek,mt7981";
aliases {
led-boot = &act_led;
led-failsafe = &act_led;
led-running = &act_led;
led-upgrade = &act_led;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@40000000 {
reg = <0 0x40000000 0 0x40000000>;
};
beeper {
compatible = "gpio-beeper";
gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
};
gpio-keys {
compatible = "gpio-keys";
button-reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
};
};
gpio-leds {
compatible = "gpio-leds";
led-0 {
function = LED_FUNCTION_LAN;
color = <LED_COLOR_ID_GREEN>;
gpios = <&pio 8 GPIO_ACTIVE_LOW>;
};
led-1 {
function = LED_FUNCTION_LAN;
color = <LED_COLOR_ID_AMBER>;
gpios = <&pio 13 GPIO_ACTIVE_LOW>;
};
led-2 {
function = LED_FUNCTION_PANIC;
color = <LED_COLOR_ID_GREEN>;
gpios = <&pio 34 GPIO_ACTIVE_LOW>;
panic-indicator;
};
act_led: led-3 {
function = LED_FUNCTION_ACTIVITY;
color = <LED_COLOR_ID_RED>;
gpios = <&pio 35 GPIO_ACTIVE_LOW>;
};
};
};
&eth {
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>;
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
phy-handle = <&phy0>;
nvmem-cells = <&macaddr_factory_a 0>;
nvmem-cell-names = "mac-address";
};
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "gmii";
phy-handle = <&int_gbe_phy>;
nvmem-cells = <&macaddr_factory_a 1>;
nvmem-cell-names = "mac-address";
};
};
&i2c0 {
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
page-size = <32>;
};
rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
#clock-cells = <0>;
};
crypto@60 {
compatible = "atmel,atecc508a";
reg = <0x60>;
};
};
&mdio_bus {
phy0: ethernet-phy@5 {
reg = <5>;
compatible = "ethernet-phy-ieee802.3-c45";
phy-mode = "2500base-x";
reset-gpios = <&pio 14 GPIO_ACTIVE_LOW>;
reset-assert-us = <15000>;
reset-deassert-us = <68000>;
realtek,aldps-enable;
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_flash_pins>;
status = "okay";
spi_nand: flash@0 {
compatible = "spi-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
spi-max-frequency = <52000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "bl2";
reg = <0x000000 0x100000>;
read-only;
};
partition@100000 {
label = "u-boot-env";
reg = <0x100000 0x80000>;
};
partition@180000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x180000 0x100000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x1000>;
};
macaddr_factory_a: macaddr@a {
compatible = "mac-base";
reg = <0xa 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@280000 {
label = "config";
reg = <0x280000 0x100000>;
read-only;
};
partition@380000 {
label = "fip";
reg = <0x380000 0x200000>;
read-only;
};
partition@580000 {
label = "ubi";
reg = <0x580000 0xf880000>;
};
};
};
};
&pio {
i2c0_pins: i2c0-pins {
mux {
function = "i2c";
groups = "i2c0_1";
};
};
spi0_flash_pins: spi0-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>;
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <8>;
mediatek,pull-down-adv = <0>;
};
};
uart1_pins: uart1-pins {
mux {
function = "uart";
groups = "uart1_3";
};
};
uart2_pins: uart2-pins {
mux {
function = "uart";
groups = "uart2_0_tx_rx";
};
};
wwan_rst_h: wwan-rst-h {
pins = "GPIO_WPS";
drive-strength = <8>;
mediatek,pull-down-adv = <0>;
output-low;
};
};
&uart0 {
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "okay";
};
&usb_phy {
status = "okay";
};
&watchdog {
status = "okay";
};
&wifi {
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
status = "okay";
band@1 {
reg = <1>;
nvmem-cells = <&macaddr_factory_a 0>;
nvmem-cell-names = "mac-address";
};
};
&xhci {
pinctrl-names = "default";
pinctrl-0 = <&wwan_rst_h>;
status = "okay";
};