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641e4f2f04
Hardware specification: SoC: MediaTek MT7986A 4x A53 Flash: ESMT F50L1G41LB 128 MB RAM: K4A4G165WF-BCWE 512 MB Ethernet: 4x 10/100/1000 Mbps WiFi1: MT7976GN 2.4GHz ax 4x4 WiFi2: MT7976AN 5GHz ax 4x4 Button: Mesh, Reset Flash instructions: 1. Gain ssh and serial port access, see the link below: https://openwrt.org/toh/xiaomi/redmi_ax6000#installation 2. Use ssh or serial port to log in to the router, and execute the following command: nvram set boot_wait=on nvram set flag_boot_rootfs=0 nvram set flag_boot_success=1 nvram set flag_last_success=1 nvram set flag_try_sys1_failed=8 nvram set flag_try_sys2_failed=8 nvram commit 3. Set a static ip on the ethernet interface of your computer (e.g. default: ip 192.168.31.100, gateway 192.168.31.1) 4. Download the initramfs image, rename it to initramfs.bin, and host it with the tftp server. 5. Interrupt U-Boot and run these commands: setenv mtdparts nmbm0:1024k(bl2),256k(Nvram),256k(Bdata),2048k(factory),2048k(fip),256k(crash),256k(crash_log),112640k(ubi) saveenv tftpboot initramfs.bin bootm 6. After openwrt boots up, use scp or luci web to upload sysupgrade.bin to upgrade. Revert to stock firmware: Restore mtdparts back to default, then use the vendor's recovery tool (Windows only). Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
256 lines
4.3 KiB
Plaintext
256 lines
4.3 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/dts-v1/;
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include "mt7986a.dtsi"
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/ {
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model = "Xiaomi Redmi Router AX6000";
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compatible = "xiaomi,redmi-router-ax6000", "mediatek,mt7986a";
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aliases {
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory {
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reg = <0 0x40000000 0 0x20000000>;
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&pio 9 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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mesh {
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label = "mesh";
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gpios = <&pio 10 GPIO_ACTIVE_LOW>;
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linux,code = <BTN_9>;
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linux,input-type = <EV_SW>;
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};
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};
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};
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ð {
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status = "okay";
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gmac0: mac@0 {
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-mode = "2500base-x";
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nvmem-cells = <&macaddr_factory_4>;
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nvmem-cell-names = "mac-address";
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mac-address-increment = <(-1)>;
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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mdio: mdio-bus {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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&mdio {
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switch: switch@0 {
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compatible = "mediatek,mt7531";
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reg = <31>;
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reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&pio>;
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interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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&pio {
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spi_flash_pins: spi-flash-pins-33-to-38 {
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mux {
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function = "spi";
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groups = "spi0", "spi0_wp_hold";
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};
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conf-pu {
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pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
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drive-strength = <8>;
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mediatek,pull-up-adv = <0>; /* bias-disable */
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};
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conf-pd {
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pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
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drive-strength = <8>;
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mediatek,pull-down-adv = <0>; /* bias-disable */
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};
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};
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wf_2g_5g_pins: wf_2g_5g-pins {
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mux {
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function = "wifi";
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groups = "wf_2g", "wf_5g";
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};
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conf {
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pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
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"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
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"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
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"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
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"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
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"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
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"WF1_TOP_CLK", "WF1_TOP_DATA";
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drive-strength = <4>;
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};
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};
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};
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&spi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi_flash_pins>;
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cs-gpios = <0>, <0>;
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status = "okay";
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flash@0 {
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compatible = "spi-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0>;
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mediatek,nmbm;
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mediatek,bmt-max-ratio = <1>;
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mediatek,bmt-max-reserved-blocks = <64>;
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spi-max-frequency = <20000000>;
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spi-tx-buswidth = <4>;
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spi-rx-buswidth = <4>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "BL2";
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reg = <0x0 0x100000>;
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read-only;
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};
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partition@100000 {
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label = "Nvram";
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reg = <0x100000 0x40000>;
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};
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partition@140000 {
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label = "Bdata";
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reg = <0x140000 0x40000>;
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};
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factory: partition@180000 {
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label = "Factory";
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reg = <0x180000 0x200000>;
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read-only;
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_factory_4: macaddr@4 {
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reg = <0x4 0x6>;
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};
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};
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partition@380000 {
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label = "FIP";
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reg = <0x380000 0x200000>;
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read-only;
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};
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partition@580000 {
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label = "crash";
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reg = <0x580000 0x40000>;
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read-only;
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};
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partition@5c0000 {
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label = "crash_log";
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reg = <0x5c0000 0x40000>;
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read-only;
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};
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/* ubi partition is the result of squashing
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* consecutive stock partitions:
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* - ubi
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* - ubi1
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* - overlay
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*/
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partition@600000 {
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label = "ubi";
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reg = <0x600000 0x6e00000>;
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};
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/* last 12 MiB is reserved for NMBM bad block table */
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};
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};
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};
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&switch {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@1 {
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reg = <1>;
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label = "lan4";
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};
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port@2 {
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reg = <2>;
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label = "lan3";
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};
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port@3 {
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reg = <3>;
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label = "lan2";
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};
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port@4 {
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reg = <4>;
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label = "wan";
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};
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port@6 {
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reg = <6>;
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label = "cpu";
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ethernet = <&gmac0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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};
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&wmac {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&wf_2g_5g_pins>;
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mediatek,mtd-eeprom = <&factory 0x0>;
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};
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&uart0 {
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status = "okay";
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};
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