Shiji Yang 656c9847d5 ramips: add back the missing periph clock for Ralink RT3883
periph clock is the parent clock of some other clocks.

Link: https://lore.kernel.org/all/CAMhs-H_NS-n2tx5SZpCMiVZtBFzX_nTa_vnS8We0UevkwFq93Q@mail.gmail.com/
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
Link: https://github.com/openwrt/openwrt/pull/16318
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2024-09-22 19:12:16 +02:00
..
2024-09-20 18:42:56 +01:00
2024-09-19 22:57:53 +02:00
2024-09-09 14:29:58 +02:00
2024-08-30 11:39:44 +02:00
2024-09-20 19:51:57 +02:00
2024-08-25 15:08:25 +02:00
2024-08-25 15:08:25 +02:00
2024-09-16 00:19:49 +02:00
2024-09-20 18:51:06 +01:00
2024-09-20 11:16:02 +02:00
2024-09-15 16:32:48 +02:00
2024-09-19 22:57:53 +02:00
2024-08-03 11:36:59 +02:00