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mediatek: add Adtran SmartRG SDG-8733A

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Specification is similar to other devices of the MT Stuart series:
 * Mediatek MT7988D (3x Cortex-A73, up to 1.8 GHz clock speed)
 * 8 GiB eMMC
 * 2 GiB DDR4 RAM
 * 2500M/1000M/100M LAN port
 * 10000M/5000M/2500M/1000M/100M/10M WAN port
 * MT7992 Tri-band (2.4G, 5G, 6G) 2T2R+3T3R+3T3R 802.11be Wi-Fi
 * Renesas DA14531MOD Bluetooth
 * 2 buttons (Reset, Mesh/WPS)
 * uC-controlled RGB LED via I2C
 * 2x LED for the 2.5G port, 3x LED for the 10G port
 * 3.3V-level 115200 baud UART console via 4-pin Dupont connector
   exposed at the bottom of the device
 * USB-C PD power input

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This commit is contained in:
Daniel Golle 2024-08-20 23:14:30 +01:00
parent cb2a11f49c
commit d0a2b3f824
11 changed files with 183 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
package/boot/uboot-envtools/files/mediatek_filogic
View File

@ -108,6 +108,7 @@ openwrt,one)
ubootenv_add_ubi_default
;;
smartrg,sdg-8733|\
smartrg,sdg-8733a|\
smartrg,sdg-8734)
local envdev=$(find_mmc_part "u-boot-env" "mmcblk0")
ubootenv_add_uci_config "$envdev" "0x0" "0x8000" "0x8000"

3
target/linux/mediatek/base-files/lib/preinit/05_set_preinit_iface
View File

@ -14,7 +14,8 @@ set_preinit_iface() {
ifname=eth0
;;
smartrg,sdg-8622|\
smartrg,sdg-8632)
smartrg,sdg-8632|\
smartrg,sdg-8733a)
ip link set lan up
ifname=lan
;;

6
target/linux/mediatek/dts/mt7988a-smartrg-mt-stuart.dtsi
View File

@ -451,19 +451,19 @@
#address-cells = <1>;
#size-cells = <0>;
led@0 {
aqr_green_led: led@0 {
reg = <0>;
function = LED_FUNCTION_LAN;
color = <LED_COLOR_ID_GREEN>;
};
led@1 {
aqr_orange_led: led@1 {
reg = <1>;
function = LED_FUNCTION_LAN;
color = <LED_COLOR_ID_ORANGE>;
};
led@2 {
aqr_white_led: led@2 {
reg = <2>;
function = LED_FUNCTION_LAN;
color = <LED_COLOR_ID_WHITE>;

153
target/linux/mediatek/dts/mt7988d-smartrg-SDG-8733A.dts Normal file
View File

@ -0,0 +1,153 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright (C) 2024 SmartRG Inc.
* Author: Chad Monroe <chad.monroe@smartrg.com>
*/
#include "mt7988a-smartrg-mt-stuart.dtsi"
/ {
model = "SmartRG SDG-8733A";
compatible = "smartrg,sdg-8733a", "mediatek,mt7988d";
cpus {
/delete-node/ cpu@3;
};
/delete-node/ gpio-export;
/delete-node/ gpio-leds;
gpio-export {
compatible = "gpio-export";
bluetooth_reset: bluetooth-reset {
gpio-export,name = "bt_reset";
gpio-export,direction_may_change;
gpios = <&pio 36 GPIO_ACTIVE_HIGH>;
};
bluetooth_txrx_ctl: bluetooth-txrx-ctl {
gpio-export,name = "bt_txrx_ctl";
gpio-export,direction_may_change;
gpios = <&pio 37 GPIO_ACTIVE_HIGH>;
};
};
gpio-leds {
compatible = "gpio-leds";
lan_amber {
color = <LED_COLOR_ID_GREEN>;
function = "lan";
gpios = <&pio 59 GPIO_ACTIVE_HIGH>;
};
lan_green {
color = <LED_COLOR_ID_AMBER>;
function = "lan";
gpios = <&pio 60 GPIO_ACTIVE_HIGH>;
};
};
};
&fan {
pwms = <&pwm 1 40000 0>;
interrupts = <57 IRQ_TYPE_EDGE_FALLING>;
};
&gmac0 {
status = "disabled";
};
&gmac1 {
label = "lan";
phy-mode = "internal";
phy-connection-type = "internal";
phy = <&int_2p5g_phy>;
};
&gmac2 {
label = "wan";
phy-mode = "usxgmii";
phy-connection-type = "usxgmii";
phy = <&phy8>;
};
&int_2p5g_phy {
pinctrl-names = "i2p5gbe-led";
pinctrl-0 = <&i2p5gbe_led0_pins>;
};
&mdio_bus {
/delete-node/ ethernet-phy@0;
};
&pio {
pcie3_1_pins: pcie3-pins-g1 {
mux {
function = "pcie";
groups = "pcie_1l_1_pereset", "pcie_clk_req_n3";
};
};
};
&pcie0 {
reset-gpios = <&pio 9 GPIO_ACTIVE_HIGH>;
};
&pcie1 {
status = "disabled";
};
&pcie3 {
pinctrl-names = "default";
pinctrl-0 = <&pcie3_1_pins>;
status = "okay";
};
&phy8 {
reset-gpios = <&pio 62 GPIO_ACTIVE_LOW>;
marvell,mdi-cfg-order = <0>;
};
&aqr_green_led {
function = LED_FUNCTION_WAN;
};
&aqr_orange_led {
function = LED_FUNCTION_WAN;
};
&aqr_white_led {
function = LED_FUNCTION_WAN;
};
&i2p5gbe_led0 {
color = <LED_COLOR_ID_GREEN>;
status = "okay";
};
&ssusb0 {
status = "disabled";
};
&ssusb1 {
status = "disabled";
};
&switch {
status = "disabled";
};
&tphy {
status = "disabled";
};
&uart1 {
status = "disabled";
};
&xphy {
status = "disabled";
};

8
target/linux/mediatek/filogic/base-files/etc/board.d/01_leds
View File

@ -97,6 +97,14 @@ smartrg,sdg-8734)
ucidef_set_led_netdev "wan-orange" "WAN" "mdio-bus:00:orange:wan" "wan" "link_100 link_1000"
ucidef_set_led_netdev "wan-white" "WAN" "mdio-bus:00:white:wan" "wan" "link_10000"
;;
smartrg,sdg-8733a)
ucidef_set_led_netdev "lan-green-act" "LAN" "mdio-bus:0f:green:lan" "lan" "link_2500"
ucidef_set_led_netdev "lan-amber" "LAN" "amber:lan" "lan" "link_100"
ucidef_set_led_netdev "lan-green" "LAN" "green:lan" "lan" "link_1000"
ucidef_set_led_netdev "wan-green" "WAN" "mdio-bus:08:green:wan" "wan" "link_2500 link_5000"
ucidef_set_led_netdev "wan-orange" "WAN" "mdio-bus:08:orange:wan" "wan" "link_100 link_1000"
ucidef_set_led_netdev "wan-white" "WAN" "mdio-bus:08:white:wan" "wan" "link_10000"
;;
wavlink,wl-wn586x3)
ucidef_set_led_netdev "lan-1" "lan-1" "blue:lan-1" "lan1" "link tx rx"
ucidef_set_led_netdev "lan-2" "lan-2" "blue:lan-2" "lan2" "link tx rx"

1
target/linux/mediatek/filogic/base-files/etc/board.d/02_network
View File

@ -96,6 +96,7 @@ mediatek_setup_interfaces()
;;
smartrg,sdg-8622|\
smartrg,sdg-8632|\
smartrg,sdg-8733a|\
yuncore,ax835)
ucidef_set_interfaces_lan_wan lan wan
;;

1
target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
View File

@ -149,6 +149,7 @@ case "$board" in
[ "$PHYNBR" = "2" ] && macaddr_add $addr 4 > /sys${DEVPATH}/macaddress
;;
smartrg,sdg-8733|\
smartrg,sdg-8733a|\
smartrg,sdg-8734)
addr=$(mmc_get_mac_ascii mfginfo MFG_MAC)
[ "$PHYNBR" = "0" ] && macaddr_add $addr 4 > /sys${DEVPATH}/macaddress

3
target/linux/mediatek/filogic/base-files/lib/preinit/10_fix_eth_mac.sh
View File

@ -36,7 +36,8 @@ preinit_set_mac_address() {
ip link set dev lan4 address "$lan_addr"
;;
smartrg,sdg-8622|\
smartrg,sdg-8632)
smartrg,sdg-8632|\
smartrg,sdg-8733a)
addr=$(mmc_get_mac_ascii mfginfo MFG_MAC)
ip link set dev wan address "$addr"
ip link set dev lan address "$(macaddr_add $addr 1)"

2
target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
View File

@ -95,6 +95,7 @@ platform_do_upgrade() {
smartrg,sdg-8622|\
smartrg,sdg-8632|\
smartrg,sdg-8733|\
smartrg,sdg-8733a|\
smartrg,sdg-8734)
CI_KERNPART="kernel"
CI_ROOTPART="rootfs"
@ -211,6 +212,7 @@ platform_copy_config() {
smartrg,sdg-8622|\
smartrg,sdg-8632|\
smartrg,sdg-8733|\
smartrg,sdg-8733a|\
smartrg,sdg-8734|\
ubnt,unifi-6-plus)
emmc_copy_config

8
target/linux/mediatek/image/filogic.mk
View File

@ -208,6 +208,14 @@ $(call Device/adtran_smartrg)
endef
TARGET_DEVICES += smartrg_sdg-8733
define Device/smartrg_sdg-8733a
$(call Device/adtran_smartrg)
DEVICE_MODEL := SDG-8733A
DEVICE_DTS := mt7988d-smartrg-SDG-8733A
DEVICE_PACKAGES += mt7988-2p5g-phy-firmware kmod-mt7996-firmware kmod-phy-aquantia
endef
TARGET_DEVICES += smartrg_sdg-8733a
define Device/smartrg_sdg-8734
$(call Device/adtran_smartrg)
DEVICE_MODEL := SDG-8734

3
target/linux/mediatek/patches-6.6/350-21-cpufreq-mediatek-Add-support-for-MT7988.patch
View File

@ -51,11 +51,12 @@ Signed-off-by: Sam Shih <sam.shih@mediatek.com>
static const struct mtk_cpufreq_platform_data mt8183_platform_data = {
.min_volt_shift = 100000,
.max_volt_shift = 200000,
@@ -740,6 +749,7 @@ static const struct of_device_id mtk_cpu
@@ -740,6 +749,8 @@ static const struct of_device_id mtk_cpu
{ .compatible = "mediatek,mt2712", .data = &mt2701_platform_data },
{ .compatible = "mediatek,mt7622", .data = &mt7622_platform_data },
{ .compatible = "mediatek,mt7623", .data = &mt7623_platform_data },
+ { .compatible = "mediatek,mt7988a", .data = &mt7988_platform_data },
+ { .compatible = "mediatek,mt7988d", .data = &mt7988_platform_data },
{ .compatible = "mediatek,mt8167", .data = &mt8516_platform_data },
{ .compatible = "mediatek,mt817x", .data = &mt2701_platform_data },
{ .compatible = "mediatek,mt8173", .data = &mt2701_platform_data },