PLL for eth0 internal clock on ar913x is at 0x18050014
and AR913X_ETH0_PLL_SHIFT is 20 instead of 17
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Add support for WNDR3700 and WNDR3700v2.
They share most things with WNDR3800.
Only device IDs and partition structure needs to be set.
Note: WNDR3700 (v1) has no NETGEAR_HW_ID, but has
also the NA version of the factory image.
Signed-off-by: Hannu Nyman <hannu.nyman@iki.fi>
Prepare for addition of WNDR3700 and WNDR3700v2 by
separating the common parts into wndr3700.dtsi and
leaving just the device-specific things into wndr3800.dts
The three routers are identical except
* device IDs
* WNDR3700 (v1) has only 8 MB flash, while others have 16 MB.
Partition structure needs to be defined for each device.
* (WNDR3800 has 128 MB RAM, but RAM size is not in DTS)
Also separate the common parts of the image recipe.
(Drop also the initramfs recipe.)
Signed-off-by: Hannu Nyman <hannu.nyman@iki.fi>
I-O DATA WN-AC1600DGR2 is a 2.4/5 GHz band 11ac router, based on
Qualcomm Atheros QCA9557.
Specification:
- Qualcomm Atheros QCA9557
- 128 MB of RAM
- 16 MB of Flash
- 2.4/5 GHz wifi
- 2.4 GHz: 2T2R (SoC internal)
- 5 GHz: 3T3R (QCA9880)
- 5x 10/100/1000 Mbps Ethernet
- 6x LEDs, 6x keys (4x buttons, 1x slide switch)
- UART header on PCB
- Vcc, GND, TX, RX from ethernet port side
- 115200n8
Flash instruction using factory image:
1. Connect the computer to the LAN port of WN-AC1600DGR2
2. Connect power cable to WN-AC1600DGR2 and turn on it
3. Access to "http://192.168.0.1/" and open firmware update page
("ファームウェア")
4. Select the OpenWrt factory image and click update ("更新") button
5. Wait ~150 seconds to complete flashing
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
This patch copies over the MAC patching helper functions from lantiq's
target/linux/lantiq/base-files/etc/hotplug.d/firmware/12-ath9k-eeprom
file.
Not all vendors bothered to write the correct MAC addresses for the
ath9k wifi into the calibration data. And while ath9k does have some
special dt-properties to extract the addresses from a fixed position,
there are still devices that require userspace to edit or modify
the caldata.
In my case, the MAC address for the Wi-Fi device is stored in an
unsorted key-value based "nvram" database and there's an existing
userspace tool to extract the data.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
This commit adds support for the OCEDO Koala
SOC: Qualcomm QCA9558 (Scorpion)
RAM: 128MB
FLASH: 16MiB
WLAN1: QCA9558 2.4 GHz 802.11bgn 3x3
WLAN2: QCA9880 5 GHz 802.11nac 3x3
INPUT: RESET button
LED: Power, LAN, WiFi 2.4, WiFi 5, SYS
Serial: Header Next to Black metal shield
Pinout is 3.3V - GND - TX - RX (Arrow Pad is 3.3V)
The Serial setting is 115200-8-N-1.
Tested and working:
- Ethernet
- 2.4 GHz WiFi
- 5 GHz WiFi
- TFTP boot from ramdisk image
- Installation via ramdisk image
- OpenWRT sysupgrade
- Buttons
- LEDs
Installation seems to be possible only through booting an OpenWRT
ramdisk image.
Hold down the reset button while powering on the device. It will load a
ramdisk image named 'koala-uImage-initramfs-lzma.bin' from 192.168.100.8.
Note: depending on the present software, the device might also try to
pull a file called 'koala-uimage-factory'. Only the name differs, it
is still used as a ramdisk image.
Wait for the ramdisk image to boot. OpenWRT can be written to the flash
via sysupgrade or mtd.
Due to the flip-flop bootloader which we not (yet) support, you need to
set the partition the bootloader is selecting. It is possible from the
initramfs image with
> fw_setenv bootcmd run bootcmd_1
Afterwards you can reboot the device.
Signed-off-by: David Bauer <mail@david-bauer.net>
Bit 8/12 of reset controller which is marked as PHY_RESET/SWITCH_RESET
in datasheets will trigger either a reset for builtin switch or assert
an external ETH0_RESET_L/ETH1_RESET_L pin, which are usually connected
to external PHY/switch. None of them should be triggered every time an
interface is brought up in ethernet driver.
Remove PHY reset support from ag71xx and definition for them in dtsi.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Buffalo BHR-4GRV2 is a wired router, based on Qualcomm Atheros
QCA9558.
Ported from ar71xx target.
Specification:
- Qualcomm Atheros QCA9558
- 64 MB of RAM
- 16 MB of Flash
- 5x 10/100/1000 Ethernet
- QCA8337N
- 4x LEDs, 2x keys
- UART header on PCB
- Vcc, TX, RX, GND from LED side
- 115200n8
Flash instruction using factory image:
1. Connect the computer to the LAN port of BHR-4GRV2
2. Connect power cable to BHR-4GRV2 and turn on it
3. Access to "http://192.168.12.1/" and open firmware update
page ("ファームウェア更新")
4. Select the OpenWrt factory image and click update ("更新実行")
button
5. Wait ~120 seconds to complete flashing
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
This adds PLL settings for the ethernet ports of the TP-Link TL-WR1043
v2/v3 and the Openmesh OM5P-AC-v2.
We also change the PLL-settings in the qca9557.dtsi to match the ones
used as default on the ar71xx target.
As of 4b9680f138 those devices have broken ethernet ports as the default
PLL settings defined in the QCA9557.dtsi are applied which are off for
those devices.
Signed-off-by: David Bauer <mail@david-bauer.net>
commit 4b9680f fixed pll settings and the correct pll set
by bootloader is overrided by value in qca9557.dtsi which
is incorrect for Archer C7 and breaks ethernet. Add pll
values for archer c7 to fix ethernet connection.
This individual pll tweak has been cherry picked from github pr 1260
which changes a couple of things in a single commit and should be
ideally split. This commit get archer v7 back and working.
Tested: archer c7 v2
Original combined commit authored by:
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
c7 fix only split out by:
Signed-off-by: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
The QCA9557 dtsi is currently missing pll-handle and pll-regs for both
eth0 and eth1, therefore PLL settings won't be applied. This commit
fixes this behavior.
Signed-off-by: David Bauer <mail@david-bauer.net>
Including the tl-wdr3600 image build code just to overwrite most of it
doesn't make much sense and only makes it hard to read.
Furthermore, the tl-wdr4300 image will be marked as compatible with the
tl-wdr3600 this way.
Signed-off-by: Mathias Kresin <dev@kresin.me>
The variables are used in image build recipes and need to be marked as
per devices vars to be stored individual per image define. Otherwise
the last defined variable will be used for all boards.
Signed-off-by: Mathias Kresin <dev@kresin.me>
This patch did the following things:
1. Separate ath9k-leds out of gpio leds so that all other leds will work
before ath9k loded (e.g. during preinit/init stage).
2. Rename wps led to qss since that's how TP-Link mark it.
3. Rename LED prefix to tp-link because that dts is shared by many devices.
4. Rename to wr740n-v1 because v1 is the first and v2 just use the fw of v1.
(This will require a forced sysupgrade if you comes from
the previous wr740n v2 image.)
5. Remove SUPPORTED_DEVICES.
(tl-wr740n-v2 doesn't exist anywhere so it's useless.)
6. Add all WR741ND v1 clones found in ar71xx.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Fix all issues found by the devicetree compiler like wrong address/size
cells as well as wrong/missing/superfluous unit addresses.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Use only the jedec,spi-nor compatible string. Everything else either
never worked or is only support to keep compatibility.
Signed-off-by: Mathias Kresin <dev@kresin.me>
This router is called Archer C7 and the tl was used to identify
TP-LINK. Since we have added tplink in dts/board name, the tl
prefix is useless now.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Change lan and it's LED to eth0
It's broken since c7c807cb8c
where I changed the dts but forgot to change default configurations.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
1. Swap eth0/eth1
Both devices are using AR9331, the builtin switch on AR9331 is
connected to gmac1 and gmac1 is named as eth1 in ath79.
PS: gmac1 is eth0 and gmac0 is eth1 in ar71xx because of the
reversed initialization order.
2. Fix the incorrect compatible string in dts
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
phy-handle is used to poll link status. They are useless when
we need fixed-link on these interfaces.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Without this patch you will get an error "gpio-export probe deferral
not supported" when you try to export i2c expander gpio pins.
gpio-export is probed long before i2c-bus and i2c expander are created
and it doesn't retry it so none pins are exported.
Signed-off-by: René van Dorst <opensource@vdorst.com>
apply the change to all instances of the gpio exports patch
Signed-off-by: Mathias Kresin <dev@kresin.me>
Revert 290c54473e ("ath79: fix TP-Link Archer C7 v2 wlan1 MAC address")
which obviously aims to have a distinct MAC address per interface.
Unfortunally it doesn't match what is used by the stock firmware and we
shouldn'z use MAC Adresses not reserverd for/assigned to a particular
board.
The correct MAC adress increments for this board are:
wlan0 (5GHz) : -1
wlan1 (2.4GHz) : 0
eth1 (LAN) : 0
eth0 (WAN) : 1
Fixes: FS#408
Signed-off-by: Mathias Kresin <dev@kresin.me>
The PowerCloud Systems CR3000 was a cloud-managed CPE for a now defunct
NaaS offering. It was previously supported under the ar71xx branch and
this forward ports that support with some notable differences:
1) Since reverting to stock firmware is now irrelevant there is is only
a single openwrt image generated which uses the entire flash rather than
preserving PowerCloud-specific partitions that are unneeded to openwrt--
those partitions will be erased and used by the openwrt image.
2) Rather than use a non-standard probe order for the ethernet devices,
this image uses a set of 'ip link set ethX name ethY' commands very early
in preinit (before the network is used at all), in order to have the the
switch and Wan use the same ethernet names as in previous images.
3) /etc/config/wireless will need to be regenerated as the path to the
wireless device has changed due to differences in ath79 DT for ar93x
compared to ar71xx images.
4) eth0 is wan and eth1 is lan (switch)
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
In the new DT-based pci-ar71xx driver, ar71xx_pci_irq_init() was being
called before populating the PCI controller's device_node struct member.
This led to no IRQ being assigned to connected PCI devices (e.g. ath9k
cards) and caused them to be non-functional aside from simply being
detected.
The previous errors encountered in dmesg were: "irq: no irq domain found
for /ahb/apb/pcie-controller@180c0000 !". /proc/interrupts listed an IRQ
of 0 for the cards.
While this has been only been tested on a yet-to-be-merged RouterStation
Pro target, it should also fix the broken wifi people have reported for
the ath79 WNDR3800 target.
Signed-off-by: Matt Merhar <mattmerhar@protonmail.com>
mdio bus isn't a standalone device on ar7240. (and maybe older SoCs?)
Use simple-mfd for ar7241 and later SoCs to get mdio1 ready before gmac0
For ar7240 and older chips, manually create platform device after
ag71xx_hw_init() in ag71xx_probe()to get mdio0 ready between
ag71xx_hw_init() and ag71xx_phy_connect().
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Allow specifying desired mdio clock frequency in dts.
Use default frequency around 5MHz for builtin switch and 2MHz for other mdio bus.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Remove mdio1 and phy1 handle. AR8327N is controlled through mdio0.
Add gmac-config for Archer C7.
Remove ucidef_set_interfaces_lan_wan. They can be determined by config_generate automatically.
The following are for adding support for WDR4900 v2/Archer C7 v1 and other
devices that shared the same machine file in ar71xx:
Move mtd partitions to archer-c7-v2.dts. Only Archer C7 v2 has 16M flash.
Flash on Archer C7 v1/TL-WDR4900 v2 is 8M.
Add label for wlan leds. The default trigger for archer c7/wdr4900 is different.
Move wlan5g led to archer-c7-v2.dts. 5G led on WDR4900 is connected to ar9380.
Move rfkill definition to archer-c7-v2.dts. There is no such a button on wdr4900 v2.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
enable mdio1 by default because mdio1 node is a subnode of eth1
and eth1 node is a "simple-mfd", which makes mdio1 disabled when
eth1 isn't enabled.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Most qca devices use 115200n8 as it's default uart baudrate.
Add 'chosen' node for qca953x like other SoCs in ath79 target.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Commit c7efc93 renamed controller name
to qca,ar9340-intc and added some functions but qca9533.dtsi was overlooked.
Correct the dtsi and adust it to the new format
Add gmac and correct reset for cascaded irq and build-in switch
Also add the reference clock to soc dtsi so we don't have to have it in every dts
Signed-off-by: Lucian Cristian <lucian.cristian@gmail.com>
Remove switch reset definition
Fix gmac compatible string (We only need SW_PHY_SWAP and SW_PHY_ADDR_SWAP on qca953x so use ar9330-gmac instead of ar9340-gmac.)
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
gmac0 is always connected to switch phy4 and mdio1 is always needed.
So add phy handle for eth0 and enable mdio1 by default.
Move fixed-link for gmac1 from device dts to ar9331.dtsi because gmac1 is always connected to builtin switch.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Enable mdio1 by default because mdio1 is needed when eth1 is enabled.
PS: If a ar9341 device has only one port and you only want to use gmac0,
change compatible of gmac1 to "syscon", "simple-mfd" in dts.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
This patch did several things:
1. Probe the builtin switch as a separated mdio device.
2. Register a separated mdio bus for builtin switch.
3. Use generic mdio read/write function instead of calling ag71xx_mdio_mii_read/write directly.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
We need to have mdio1 belonging to gmac1 initialized before gmac0.
Split it into a separated mdio device to get both mdios ready before probing gmac.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
The builtin switch has it's initial valid mac address(00:00:01:00:00:00).
Since the builtin switch is an independent device, setting mac address of gmac1 to builtin switch isn't a good idea and this makes it impossilbe to split builtin switch apart as an independent platform device.
Remove these functions and apply default VLAN during initialization as a preparation for further driver splitting.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
The CAP324 was an AP for a NaaS offering that is now defunct. While
previously supported in the ar71xx arch, there were some errata (to
be fixed shortly).
Notable differences from ar71xx support:
1) The method of getting the ath9k firmware for the PCIe 2ghz wifi has
changed (due to changes in how the arch handles this), since this device
doesn't use the EEPROM except to get the MAC address of the wifi.
2) /etc/config/wireless will need to be regenerated as the path(s) to
the wireless device(s) have changed.
3) ath79 OpenWrt firmware no longer supports build an image that allows
reverting to stock firmware (as the cloud service no longer exists, the
stock firmware is useless), instead using all of the flash for image and
overlay (less u-boot/env and art).
4) Initial network config treats the ethernet port as a Lan port with
the standard default address (192.168.1.1 unless changed in .config
--e.g. via menuconfig) instead of using DHCP (this was the default for
the stock firmware, however for openwrt use this is rather confusion and
counter-productive as the user has a harder time finding the device on
the network.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
Add ath79 arch support for PowerCloud Systems CR5000. Previously
supported under ar71xx (however there are some errors in that support;
to be fixed shortly).
Info:
* This board is based on the Atheros DB120 reference design, but doesn't
use the on-board switch. Instead it attachs GMAC0 to an AR8327 switch.
* It only uses GMAC0 and the WAN is simply a VLAN in the stock firmware.
* It has 64MB RAM and 8MB flash.
* In the dts version we get rid of using 'open-drain' for the AR8327
LED controls.
* As with the platform data version we disable JTAG as this conflicts
with one of the pair of GPIO's required for the power/status LED
(GPIO2 and GPIO4 are used for this LED).
* The pcie card wifi has an EEPROM but gets it's MAC address from
the ART partition.
* The SoC wifi (2.4 GHz) is all from the ART.
* The USB is support comes from the SoC.
NB. This is actually an AR9342 rather than AR9344 but we use the 9344
definitions because there are no relevant differences for this board.
NB: Building only images that don't support reverting to the old
cloud-based firmware as the Skydog cloud service for the CR5000 no
longer exists.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
The OCEDO Raccoon only has one ethernet port, but currently uci sections
for WAN and LAN are created.
Additionally, newer versions of the devices U-Boot (units with SteelWRT)
set the kernel-cmdline and therefore overwrite the partition-layout.
We fix this by overwriting the cmdline supplied by the bootloader.
Signed-off-by: David Bauer <mail@david-bauer.net>
The mac address for the 2.4 wireless need to be decremented by one.
Correct MAC adress increments for this board are:
wlan0 (5GHz) : -2
wlan1 (2.4GHz) : -1
eth1 (LAN) : 0
eth0 (WAN) : 1
Signed-off-by: Aleksandr V. Piskunov <aleksandr.v.piskunov@gmail.com>
Add a new config option to allow to select the default compile
optimization level for the kernel.
Select the optimization for size by default if the small_flash feature is
set. Otherwise "Optimize for performance" is set.
Add the small_flash feature flag to all (sub)targets which had the
optimization for size in their default kernel config.
Remove CC_OPTIMIZE_FOR_* symbols from all kernel configs to apply the new
setting.
Exceptions to the above are:
- lantiq, where the optimization for size is only required for the
xway_legacy subtarget but was set for the whole target
- mediatek, ramips/mt7620 & ramips/mt76x8 where boards should have
plenty of space and an optimization for size doesn't make much sense
- rb532, which has 128MByte flash
Signed-off-by: Mathias Kresin <dev@kresin.me>
This commit adds support for the OCEDO Raccoon
SOC: Atheros AR9344
RAM: 128MB
FLASH: 16MiB
WLAN1: AR9344 2.4 GHz 802.11bgn 2x2
WLAN2: AR9382 5 GHz 802.11an 2x2
INPUT: RESET button
LED: Power, LAN, WiFi 2.4, WiFi 5
Serial: Header Next to Black metal shield
Pinout is 3.3V - GND - TX - RX (Arrow Pad is 3.3V)
The Serial setting is 115200-8-N-1.
NOTE: The U-Boot won't boot with the serial attached.
Boot the device without serial attached and attach it
after 3 seconds.
Tested and working:
- Ethernet
- 2.4 GHz WiFi
- 5 GHz WiFi
- TFTP boot from ramdisk image
- Installation via ramdisk image
- OpenWRT sysupgrade
- Buttons
- LEDs
Installation seems to be possible only through booting an OpenWRT
ramdisk image.
Hold down the reset button while powering on the device. It will load a
ramdisk image named 'raccoon-uImage-initramfs-lzma.bin' from 192.168.100.8.
Note: depending on the present software, the device might also try to
pull a file called 'raccoon-uimage-factory'. Only the name differs, it
is still used as a ramdisk image.
Wait for the ramdisk image to boot. OpenWRT can be written to the flash
via sysupgrade or mtd.
Due to the flip-flop bootloader which we not (yet) support, you need to
set the partition the bootloader is selecting. It is possible from the
initramfs image with
> fw_setenv bootcmd run bootcmd_1
Afterwards you can reboot the device.
Signed-off-by: David Bauer <mail@david-bauer.net>
Shrink the tiny kernel by moving all switch and ethernet phy drivers to
the generic kernel config instead of the target kernel config.
All boards in the tiny and nand target are either ar7240 or ar9331 based,
which don't support external xMII and therefore no external ethernet phy
can be connected. None of the boards uses a realtek switch either.
Signed-off-by: Lucian Cristian <lucian.cristian@gmail.com>
The Unifi AC-Mesh Pro has identical hardware to the Unifi AC-Pro except
USB support.
Furthermore for setting parameters like antenna gain it is helpful to
know the exact device variant.
Signed-off-by: Christoph Krapp <achterin@googlemail.com>
TP-Link Archer C7 v2 USB port LED and GPIO names are in incorrect order,
i.e. in order to match actual user visible labels, usb1 should be usb2,
and vice versa.
This patch swaps LED and GPIO power control node names.
Signed-off-by: Aleksandr V. Piskunov <aleksandr.v.piskunov@gmail.com>
Due do a missing KCONFIG isn't selectable nor enabled in the target
kernel config. Drop it for now and enable/add the driver at the time it
is required.
Signed-off-by: Mathias Kresin <dev@kresin.me>
This patch ports the TP-Link TL-WR741ND v4 and TL-WR740ND v4 to the
ath79 target.
Because the two devices share the same hw layout, this patch adds a common
.dtsi which is included by the two .dts.
Signed-off-by: Rocco Folino <rocco@folino.io>
The Unifi AC Mesh is equivalent to the Unifi AC Lite. However,
for setting certain parameters with the flashed device it is
helpful that the devices know their variant (e.g. automatically
setting antenna gain for the different antennas in Lite and Mesh).
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
- fix sysupgrade check
- move usb to v4 dts because v5 doesn't have it
- make wan mac address behave like ar71xx target
- add orange wan led support, it can be userspace activated like:
on:
echo default-on > /sys/class/leds/tp-link\:orange\:wan/trigger
off:
echo none > /sys/class/leds/tp-link\:orange\:wan/trigger
Signed-off-by: Lucian Cristian <lucian.cristian@gmail.com>
rework the dts to a common unifi-ac dtsi
pro network is connected via phy0 and has usb ports
lite network is connected via phy4 without usb ports
Signed-off-by: Lucian Cristian <lucian.cristian@gmail.com>
This target can automatically detect the correct memory size and we've
been using it for long in ar71xx.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Check if the GPIO is valid (or set at all). If no GPIO is set in the
devicetree, a gpiolib related kernel warning + stacktrace is shown during
boot and gpio-export reports GPIOs as exported albeit none really is.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Use the new dynamic partition split in tplink-safeloader so we no longer
have to worry about kernel size increases.
Signed-off-by: Lucian Cristian <lucian.cristian@gmail.com>
Netgear WNR612 v2:
- cpu Atheros AR7240 (Python) @400MHz
- flash 4MB
- ram 32MB
- ethernet 10/100: 1xwan + 2xlan (only two)
- radio AR9285
As there is a rebranded WNR612v2 called ON Networks N150R, add
a dtsi which includes all device support, and add a separate dts
for the device only (with a separate one for the subsequent N150R).
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
Add the missing enable and disable function.
Remove dummy mask and unmask function and use the one provided by
irq_dummy_chip.
Allow interrupt status register being defined from dts.
Add ddr_wb_flush for ar934x/qca953x.
Rename controller name to qca,ar9340-intc because this design was
first introduced in AR934x.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Signed-off-by: Johann Neuhauser <johann@it-neuhauser.de>
ar71xx/ar913x series use the old pll registers and settings.
However started from ar7242, a new pll register is introduced and the
pll setting is much simpler.
This can be observed from dev-eth.c from the ar71xx target.
Signed-off-by: Weijie Gao <hackpascal@gmail.com>
This patch adds dts for qca956x and also support for Phicomm K2T
The qca965x.dtsi adds nearly all the necessary components.
Both ath9k AHB and PCIe worked well.
The Phicomm K2T uses MTD partition 'config' to store the mac addresses in
JSON format. To extract these fields correctly, a script is introduced:
/lib/functions/k2t.sh
This script provides a helper function to extract mac addresses, and is used
in three places.
Hardware spec of Phicomm K2T:
CPU: QCA9563
DRAM: 64MB DDR2
Flash: 16MB SPI-NOR
Switch: QCA8337
WiFi 5.8GHz: QCA9886
Flash instruction:
Apply sysupgrade.bin via serial console:
tftp 0x80000000 sysupgrade.bin && erase 0x9f090000 +$filesize && cp.b $fileaddr 0x9f090000 $filesize
Signed-off-by: Weijie Gao <hackpascal@gmail.com>
