On reset, the PVID of all ports is set to 1; if this is reset to 0,
the special cases for VLAN 1 are no longer required.
port_vlan_add is called with vid=0 when the DSA port interfaces are
enabled with no VLAN; previously the VLAN was not configured in this
case, relying on VLAN 1 being present, but with the PVID set to 0,
configuring VLAN 0 as normal works as expected.
Signed-off-by: Thomas Nixon <tom@tomn.co.uk>
sysupgrade metadata is not flashed to the device, so check-size
should be called _before_ adding metadata to the image.
While at it, do some obvious wrapping improvements.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Acked-by: Paul Spooren <mail@aparcar.org>
The RTL8380-RTL9300 switches only forward packets when VLAN ID 1 is
configured. Do not use the standard failsafe configuration for DSA
accessing the default port directly, but configure a switch on the lan1
interface instead.
This will add the VLAN ID 1 configuration to the switch:
$ bridge vlan show
port vlan-id
lan1 1 PVID Egress Untagged
switch 1 PVID Egress Untagged
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Fixes the buffer and packet length calculations for Ethernet TX on
the RTL8380 SoC when CRC calculation offload is enabled.
CRC-offload is always done by the SoC, but additional CRC
calculation was previously done also by the kernel.
It also fixes detection of the DSA tag for packets on RTL8390
SoCs for ports > 28.
v2 has correct whitespace
Signed-off-by: Birger Koblitz <mail@birger-koblitz.de>
Replace "ifname" with "device" as netifd has been recently patches to
used the later one. It's more clear and accurate.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
This adds the CPU port to the unknown multicast flooding port mask,
which fixes the VLAN issues introduced by the multicast group patches
Tested-by: Russell Senior <russell@personaltelco.net> [Netgear GS108Tv3]
Signed-off-by: Birger Koblitz <mail@birger-koblitz.de>
Signed-off-by: Bjørn Mork <bjorn@mork.no> [whitespace fix]
Signed-off-by: Petr Štetiar <ynezz@true.cz> [unknwon typo fix]
Adds support for Layer 2 multicast by implementing the DSA port_mdb_*
callbacks. The Kernel bridge listens to IGMP/MLD messages trapped to
the CPU-port, and calls the Multicast Forwarding Database updates.
The updates manage the L2 forwarding entries and the multicast
port-maps.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This sets up all VLANs with a default configuration on reset:
- forward based on VLAN-ID and not the FID/MSTI
- forward based on the inner VLAN-ID (not outer)
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This adds SoC specific VLAN configuration routines, which
alsoe sets up the portmask table entries that are referred to
in the vlan profiles registers for unknown multicast flooding.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This adds support for the MMD access registers the RTL-SoCs use to access clause 45
PHYs via mdio.
This new interface is used to add EEE-support for the RTL8226
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Adds a hash-bucket size attribute for the different SoCs, in order to
accomodate the buckets with 8 entries of the L2-forwarding tables
on RTL93XX in contrast to only 4 on RTL83XX.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This adds snooping support for IGMP and MLD on RTL8380/90/9300
by trapping IGMP and MLD packets to the CPU.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Enables CRC calculation offloading on RTL8380/8390/9300.
Tested on Zyxel XGS1210-10 (RTL9302)/GS1900-48 (RTL8390)/GS1900-10HP (RTL8382)
On the Zyxel GS1900-10HP, an increase of 5% in iperf3 send throughput
and 11% in receive throughput is seen.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
INABA Abaniact AML2-17GP is a 17 port gigabit switch, based on RTL8382.
Specification:
- SoC : Realtek RTL8382
- RAM : DDR3 128 MiB (SK hynix H5TQ1G63EFR)
- Flash : SPI-NOR 32 MiB (Macronix MX25L25635FZ2I-10G)
- Ethernet : 10/100/1000 Mbps x17
- port 1-8 : RTL8218B (SoC)
- port 8-16 : RTL8218D
- port wan : RTL8214FC
- LEDs/Keys : 1x, 1x
- UART : pin header on PCB (Molex 530470410 compatible)
- J14: 3.3V, GND, RX, TX from rear side
- 115200n8
- Power : 100-240 VAC, 50/60 Hz, 0.21 A
- Plug : IEC 60320-C13
Flash instruction using initramfs image:
1. Boot AML2-17GP normally
2. Set the IP address of computer to the range of 192.168.1.0/24, other
than 192.168.1.248 and connect computer to "WAN/CONSOLE" port of
AML2-17GP
3. Access to "http://192.168.1.248" and open firmware setting page
-- UI Language: 日本語 --
"メンテナンス" -> "デュアルイメージ"
-- UI Language: ENGLISH --
"Maintenance" -> "Dual Image"
4. Check "イメージ情報 (en: "Images Information")" and set the first
image to active by choosing "アクティブイメージ" (en: "Active
Image") in the partition "0"
5. open firmware upgrade page
-- UI Language: 日本語 --
"メンテナンス" -> "アップグレードマネージャー"
-- UI Language: ENGLISH --
"Maintenance" -> "Upgrade Manager"
6. Set the properties as follows
-- UI Language: 日本語 --
"アップグレード方式" : "HTTP"
"アップグレードタイプ" : "イメージ"
"イメージ" : "アクティブ"
"ブラウズファイル" : (select the OpenWrt initramfs image)
-- UI Language: ENGLISH --
"Upgrade Method" : "HTTP"
"Upgrade Type" : "Image"
"Image" : "(Active)"
"Browse file" : (select the OpenWrt initramfs image)
7. Press "アップグレード" (en: "Upgrade") button and perform upgrade
8. Wait ~150 seconds to complete flashing
9. After the flashing, the following message is showed and press "OK"
button to reboot
-- UI Language: 日本語 --
"成功!! 今すぐリブートしますか?"
-- UI Language: ENGLISH --
"Success!! Do you want to reboot now?"
10. After the rebooting, reconnect the cable to other port (1-16) and
open the SSH connection, download the sysupgrade image to the device
and perform sysupgrade with it
11. Wait ~120 seconds to complete sysupgrade
Note:
- The uploaded image via WebUI will only be written with the length
embedded in the uImage header. If the sysupgrade image is specified,
only the kernel is flashed and lacks the rootfs, this causes a kernel
panic while booting and bootloops.
To avoid this issue, initramfs image is required for flashing on WebUI
of stock firmware.
- This device has 1x LED named as "POWER", but it's not connected to the
GPIO of SoC and cannot be controlled.
- port 17 is named as "WAN/CONSOLE". This port is for the upstream
connection and console access (telnet/WebUI) on stock firmware.
Back to stock firmware:
1. Set "bootpartition" variable in u-boot-env2 partition to "1" by
fw_setsys
fw_setsys bootpartition 1
2. Reboot AML2-17GP
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
The Netgear GS308T v1 is an 8 port gigabit switch. The GS310TP v1 is an 8
port POE+ gigabit switch with 2 SFP Ports (currently untested).
The GS308T v1 and GS310TP v1 are quite similar to the Netgear GS1xx
devices already supported. Theses two devices use the same Netgear
firmware and are very similar to there corresponding GS1xx devices. For
this reason they share a large portion of the device tree with the GS108T
and GS110TP with exception of the uimage magic and model and compatible
values.
All of the above feature a dual firmware layout, referred to as Image0
and Image1 in the Netgear firmware.
In order to manipulate the PoE+ on the GS310TP v1 , one needs the
rtl83xx-poe package
Specifications (GS308T)
----------------------
* RTL8380M SoC, 1 MIPS 4KEc core @ 500MHz
* 128MB DDR3-1600 DRAM (Winbond W631GG8MB-12)
* 32MB 3v NOR SPI Flash (Winbond W25Q256JVFQ)
* RTL8231 GPIO extender to control the LEDs and the reset button
* 8 x 10/100/1000BASE-T ports, internal PHY (RTL8218B)
* UART (115200 8N1) via unpopulated standard 0.1" pin header marked J1
* Power is supplied via a 12V 1A barrel connector
Specifications (GS310TP)
----------------------
* RTL8380M SoC, 1 MIPS 4KEc core @ 500MHz
* Nuvoton M0516LDN for controlling PoE
* 128MB DDR3-1600 DRAM (Winbond W631GG8MB-12)
* 32MB 3v NOR SPI Flash (Winbond W25Q256JVFQ)
* RTL8231 GPIO extender to control the LEDs and the reset button
* 8 x 10/100/1000BASE-T PoE+ ports, 2 x Gigabit SFP ports,
internal PHY (RTL8218B)
* UART (115200 8N1) via unpopulated standard 0.1" pin header marked J1
* Power is supplied via a 54V 1.25A barrel connector
Both devices have UART pinout
-----------
J1 | [o]ooo
^ ||`------ GND
| |`------- RX [TX out of the serial adapter]
| `-------- TX [RX into the serial adapter]
`---------- Vcc (3V3) [the square pin]
The through holes are filled with PB-free solder which melts at 375C.
They can also be drilled using a 0.9mm bit.
Installation
------------
Instructions are identical to those for the similar Negear devices
and apply both to the GS308T v1 and GS310TP v1 as well.
-------------------
Boot initramfs image from U-Boot
--------------------------------
1. Press the Escape key at the `Hit Esc key to stop autoboot` prompt
2. Init network with `rtk network on` command
3. Load image with `tftpboot 0x8f000000
openwrt-realtek-generic-netgear_gs308t-v1-initramfs-kernel.bin` command
4. Boot the image with `bootm` command
The switch defaults to IP 192.168.1.1 and tries to fetch the image via
TFTP from 192.168.1.111.
Updating the installed firmware
-------------------------------
The OpenWRT ramdisk image can be flashed directly from the Netgear UI.
The Image0 slot should be used in order to enable sysupgrade.
As with similar switches, changing the active boot partition can be
accomplished in U-Boot as follows:
1. Press the Escape key at the `Hit Esc key to stop autoboot` prompt
2. Run `setsys bootpartition {0|1}` to select the boot partition
3. Run `savesys` followed by `boota` to proceed with the boot process
Signed-off-by: Raylynn Knight <rayknight@me.com>
Some targets select HZ=100, others HZ=250. There's no reason to select a higher
timer frequency (and 100 Hz are available in every architecture), so change all
targets to 100 Hz.
Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
U-Boot uses the "bootpartition" variable stored in
"u-boot-env2" to select the active system partition. Allow
updates to enable system switching from OpenWrt.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Switch the Netgear DTSI for the Realtek target from the OEM partition
naming scheme to accepted OpenWrt naming practices. A quick git grep for
'u-boot-env' e.g. in the OpenWrt tree turns up almost 500 hits whereas
grepping for 'bdinfo' (the OEM equivalent) returns a meagre 14.
Signed-off-by: Stijn Segers <foss@volatilesystems.org>
Otherwise, the last defined value will be set for all devices.
Fixes: c6c8d597e1 ("realtek: Add generic zyxel_gs1900 image definition")
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
The rtl83xx-phy driver is necessary for proper configuration of the
PHYs if U-Boot hasn't done that.
1000Base-T SFPs often contains a Marvell 88E1111 and will not work
without this driver. Include it by default to support copper SFPs.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
There is no need to define a static link or a phy for the sfp
ports. Using phy-mode and managed properties to describe the
link to the sfp phy.
We have to keep the now unconnected virtual "phys" because the
switch driver uses their "phy-is-integrated" property to figure
out which ports to enable as fibre ports.
Acked-by: Birger Koblitz <mail@birger-koblitz.de>
Signed-off-by: Bjørn Mork <bjorn@mork.no>
From the validate docs in include/linux/phylink.h:
When state->interface is PHY_INTERFACE_MODE_NA, phylink expects the
MAC driver to return all supported link modes.
Tested-by: Birger Koblitz <mail@birger-koblitz.de>
Signed-off-by: Bjørn Mork <bjorn@mork.no>
The ZyXEL GS1900-8 is a 8 port switch without any PoE functionality or
SFP ports, but otherwise similar to the other GS1900 switches.
Specifications
--------------
* Device: ZyXEL GS1900-8 v1.2
* SoC: Realtek RTL8380M 500 MHz MIPS 4KEc
* Flash: Macronix MX25L12835F 16 MiB
* RAM: Nanya NT5TU128M8GE-AC 128 MiB DDR2 SDRAM
* Ethernet: 8x 10/100/1000 Mbit
* LEDs: 1 PWR LED (green, not configurable)
1 SYS LED (green, configurable)
8 ethernet port status LEDs (green, SoC controlled)
* Buttons: 1 on-off glide switch at the back (not configurable)
1 reset button at the right side, behind the air-vent
(not configurable)
1 reset button on front panel (configurable)
* Power 12V 1A barrel connector
* UART: 1 serial header (JP2) with populated standard pin connector on
the left side of the PCB, towards the back. Pins are labelled:
+ VCC (3.3V)
+ TX (really RX)
+ RX (really TX)
+ GND
the labelling is done from the usb2serial connector's point of
view, so RX/ TX are mixed up.
Serial connection parameters for both devices: 115200 8N1.
Installation
------------
Instructions are identical to those for the GS1900-10HP and GS1900-8HP.
* Configure your client with a static 192.168.1.x IP (e.g. 192.168.1.10).
* Set up a TFTP server on your client and make it serve the initramfs
image.
* Connect serial, power up the switch, interrupt U-boot by hitting the
space bar, and enable the network:
> rtk network on
* Since the GS1900-10HP is a dual-partition device, you want to keep the
OEM firmware on the backup partition for the time being. OpenWrt can
only boot off the first partition anyway (hardcoded in the DTS). To
make sure we are manipulating the first partition, issue the following
commands:
> setsys bootpartition 0
> savesys
* Download the image onto the device and boot from it:
> tftpboot 0x84f00000 192.168.1.10:openwrt-realtek-generic-zyxel_gs1900-8-initramfs-kernel.bin
> bootm
* Once OpenWrt has booted, scp the sysupgrade image to /tmp and flash it:
> sysupgrade /tmp/openwrt-realtek-generic-zyxel_gs1900-8-squashfs-sysupgrade.bin
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Demote a number of debugging printk's to pr_debug to avoid log
nosie. Several of these functions are called as a result of
userspace activity. This can cause a lot of log noise when
userspace does periodic polling.
Most of this could probably be removed completely, but let's
keep it for now since these drivers are still in development.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
So far, board.d files were having execute bit set and contained a
shebang. However, they are just sourced in board_detect, with an
apparantly unnecessary check for execute permission beforehand.
Replace this check by one for existance and make the board.d files
"normal" files, as would be expected in /etc anyway.
Note:
This removes an apparantly unused '#!/bin/sh /etc/rc.common' in
target/linux/bcm47xx/base-files/etc/board.d/01_network
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
5.4.102 backported a lot of stuff that our WireGuard backport already
did, in addition to other patches we had, so those patches were
removed from that part of the series. In the process other patches were
refreshed or reworked to account for upstream changes.
This commit involved `update_kernel.sh -v -u 5.4`.
Cc: John Audia <graysky@archlinux.us>
Cc: David Bauer <mail@david-bauer.net>
Cc: Petr Štetiar <ynezz@true.cz>
Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
The Netgear GS108T v3 is an 8 port gigabit switch with PoE-PD support
on port 1. The two prior versions were built using eCos and are not
currently compatible with OpenWRT.
The GS108T v3 is quite similar to both the GS110TPP v1 and GS110TP v3,
all of which use the same firmware image from Netgear. For this reason,
the device tree is identical aside from the model and compatible values.
All of the above feature a dual firmware layout, referred to as Image0
and Image1 in the Netgear firmware.
Hardware specification
----------------------
* RTL8380M SoC, 1 MIPS 4KEc core @ 500MHz
* 128MB DDR3-1600 DRAM (Winbond W631GG8MB-12)
* 32MB 3v NOR SPI Flash (Macronix MX25L25635F or Winbond W25Q256JVFIQ)
* RTL8231 GPIO extender to control the LEDs and the reset button
* 8 x 10/100/1000BASE-T ports, internal PHY (RTL8218B)
* UART (115200 8N1) via unpopulated standard 0.1" pin header marked J1
* Power is supplied via a 12V 1A barrel connector or 802.3af
UART pinout
-----------
J1 | [o]ooo
^ ||`------ GND
| |`------- RX [TX out of the serial adapter]
| `-------- TX [RX into the serial adapter]
`---------- Vcc (3V3) [the square pin]
The through holes are filled with PB-free solder which melts at 375C.
They can also be drilled using a 0.9mm bit.
Build configuration
-------------------
* Target System: Realtek MIPS
* Target Profile: Netgear GS108T v3
* Target Images -> ramdisk -> Compression: lzma
* Disable other target images
Boot initramfs image from U-Boot
--------------------------------
1. Press the Escape key at the `Hit Esc key to stop autoboot` prompt
2. Init network with `rtk network on` command
3. Load image with `tftpboot 0x8f000000 openwrt-realtek-generic-netgear_gs108t-v3-initramfs-kernel.bin` command
4. Boot the image with `bootm` command
The switch defaults to IP 192.168.1.1 and tries to fetch the image via
TFTP from 192.168.1.111.
Updating the installed firmware
-------------------------------
The OpenWRT ramdisk image can be flashed directly from the Netgear UI.
The Image0 slot should be used in order to enable sysupgrade.
As with similar switches, changing the active boot partition can be
accomplished in U-Boot as follows:
1. Press the Escape key at the `Hit Esc key to stop autoboot` prompt
2. Run `setsys bootpartition {0|1}` to select the boot partition
3. Run `savesys` followed by `boota` to proceed with the boot process
Signed-off-by: Michael Mohr <akihana@gmail.com>
Move most of the GS110TPP v1 device tree into a dtsi so that it can be
shared with the GS108T v3. Additionally:
* Use macros to simplify the ethernet and switch definitions
* Zero-pad the offsets and sizes in the partition map to 8 digits each
The spi-max-frequency value has been changed from 10MHz to 50MHz based
on an analysis of the relevant datasheets. The current driver doesn't
use this property, as the clock speed is fixed. However, it's required
for this type of DT node, so that's why it's present here.
The firmware partition has been split in half, since this is how the
stock firmware uses it. This can be used to easily revert to a stock
firmware if one is written to the second image area.
Signed-off-by: Michael Mohr <akihana@gmail.com>
The netgear_nge device will be shared between the GS108T v3 (to be added
in a later commit) and the GS110PP v1. It also enables LZMA compression
for the ramdisk image.
Signed-off-by: Michael Mohr <akihana@gmail.com>
Add a table API that has per accss register locking and uses
register description information to handle all table access
through a single set of api calls.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Adds support for the RTL9300 and RTL9310 series of switches
with 10GBit per port and up to 56 ports.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This adds support for the internal SerDes of the RTL9300 SoC
and for the RTL8218D and RTL8226B phys found in combination
with this SoC in switches.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This fixes the usage of the RTL8231 GPIO extender chip
when used with the RTL839X SoCs. Specifically,
the PHY addresses may be different from 0.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Makes sure the DSA trailer information on any L2 offloading done
by the switch is honoured by the bridge layer
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This adds support for identifying QoS information in packets
and use this and rate control information to submit to multiple
egress queues. The ethernet driver is also made to support
2 egress and up to 32 egress queues.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
this adds support for the SoC timer of the RTL9300 chips, it
provides 6 independent timer/counters, of which the first one
is used as a clocksource and the second one as event timer.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This adds support for the RTL8390 and RTL9300 SoCs
it also cleans up unnecessary definitions in mach-rtl83xx.h
and moves definitions relevant for irq routing to irq.h
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This adds support to detect RTL930X based SoCs and the RTL9313 SoC.
Tested on Zyxel XGS1210-10 (RTL9302B SoC) and the
Zyxel XS1930-12 (RTL9313 SoC)
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
