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realtek: improve EEE support for RTL8380/8390/9300
Clean up and fix bugs in the EEE support for RTL8380/90 Adds EEE support for RTL9300 Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This commit is contained in:
parent
637deabb4a
commit
515d9c85f2
@ -577,58 +577,55 @@ static void rtl83xx_port_disable(struct dsa_switch *ds, int port)
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priv->ports[port].enable = false;
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}
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static int rtl83xx_get_mac_eee(struct dsa_switch *ds, int port,
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struct ethtool_eee *e)
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{
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struct rtl838x_switch_priv *priv = ds->priv;
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pr_debug("%s: port %d", __func__, port);
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e->supported = SUPPORTED_100baseT_Full | SUPPORTED_1000baseT_Full;
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if (sw_r32(priv->r->mac_force_mode_ctrl(port)) & BIT(9))
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e->advertised |= ADVERTISED_100baseT_Full;
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if (sw_r32(priv->r->mac_force_mode_ctrl(port)) & BIT(10))
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e->advertised |= ADVERTISED_1000baseT_Full;
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e->eee_enabled = priv->ports[port].eee_enabled;
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pr_debug("enabled: %d, active %x\n", e->eee_enabled, e->advertised);
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if (sw_r32(RTL838X_MAC_EEE_ABLTY) & BIT(port)) {
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e->lp_advertised = ADVERTISED_100baseT_Full;
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e->lp_advertised |= ADVERTISED_1000baseT_Full;
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}
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e->eee_active = !!(e->advertised & e->lp_advertised);
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pr_debug("active: %d, lp %x\n", e->eee_active, e->lp_advertised);
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return 0;
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}
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static int rtl83xx_set_mac_eee(struct dsa_switch *ds, int port,
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struct ethtool_eee *e)
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{
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struct rtl838x_switch_priv *priv = ds->priv;
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pr_debug("%s: port %d", __func__, port);
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if (e->eee_enabled) {
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pr_debug("Globally enabling EEE\n");
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sw_w32_mask(0x4, 0, RTL838X_SMI_GLB_CTRL);
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}
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if (e->eee_enabled) {
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pr_debug("Enabling EEE for MAC %d\n", port);
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sw_w32_mask(0, 3 << 9, priv->r->mac_force_mode_ctrl(port));
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sw_w32_mask(0, BIT(port), RTL838X_EEE_PORT_TX_EN);
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sw_w32_mask(0, BIT(port), RTL838X_EEE_PORT_RX_EN);
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priv->ports[port].eee_enabled = true;
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e->eee_enabled = true;
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} else {
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pr_debug("Disabling EEE for MAC %d\n", port);
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sw_w32_mask(3 << 9, 0, priv->r->mac_force_mode_ctrl(port));
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sw_w32_mask(BIT(port), 0, RTL838X_EEE_PORT_TX_EN);
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sw_w32_mask(BIT(port), 0, RTL838X_EEE_PORT_RX_EN);
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priv->ports[port].eee_enabled = false;
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e->eee_enabled = false;
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if (e->eee_enabled && !priv->eee_enabled) {
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pr_info("Globally enabling EEE\n");
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priv->r->init_eee(priv, true);
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}
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priv->r->port_eee_set(priv, port, e->eee_enabled);
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if (e->eee_enabled)
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pr_info("Enabled EEE for port %d\n", port);
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else
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pr_info("Disabled EEE for port %d\n", port);
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return 0;
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}
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static int rtl83xx_get_mac_eee(struct dsa_switch *ds, int port,
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struct ethtool_eee *e)
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{
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struct rtl838x_switch_priv *priv = ds->priv;
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e->supported = SUPPORTED_100baseT_Full | SUPPORTED_1000baseT_Full;
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priv->r->eee_port_ability(priv, e, port);
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e->eee_enabled = priv->ports[port].eee_enabled;
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e->eee_active = !!(e->advertised & e->lp_advertised);
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return 0;
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}
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static int rtl93xx_get_mac_eee(struct dsa_switch *ds, int port,
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struct ethtool_eee *e)
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{
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struct rtl838x_switch_priv *priv = ds->priv;
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e->supported = SUPPORTED_100baseT_Full | SUPPORTED_1000baseT_Full
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| SUPPORTED_2500baseX_Full;
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priv->r->eee_port_ability(priv, e, port);
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e->eee_enabled = priv->ports[port].eee_enabled;
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e->eee_active = !!(e->advertised & e->lp_advertised);
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return 0;
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}
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@ -1332,6 +1329,9 @@ const struct dsa_switch_ops rtl930x_switch_ops = {
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.port_enable = rtl83xx_port_enable,
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.port_disable = rtl83xx_port_disable,
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.get_mac_eee = rtl93xx_get_mac_eee,
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.set_mac_eee = rtl83xx_set_mac_eee,
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.set_ageing_time = rtl83xx_set_l2aging,
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.port_bridge_join = rtl83xx_port_bridge_join,
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.port_bridge_leave = rtl83xx_port_bridge_leave,
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@ -263,6 +263,84 @@ void rtl838x_traffic_disable(int source, int dest)
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rtl838x_mask_port_reg(BIT(dest), 0, rtl838x_port_iso_ctrl(source));
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}
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/*
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* Enables or disables the EEE/EEEP capability of a port
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*/
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static void rtl838x_port_eee_set(struct rtl838x_switch_priv *priv, int port, bool enable)
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{
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u32 v;
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// This works only for Ethernet ports, and on the RTL838X, ports from 24 are SFP
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if (port >= 24)
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return;
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pr_debug("In %s: setting port %d to %d\n", __func__, port, enable);
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v = enable ? 0x3 : 0x0;
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// Set EEE state for 100 (bit 9) & 1000MBit (bit 10)
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sw_w32_mask(0x3 << 9, v << 9, priv->r->mac_force_mode_ctrl(port));
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// Set TX/RX EEE state
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if (enable) {
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sw_w32_mask(0, BIT(port), RTL838X_EEE_PORT_TX_EN);
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sw_w32_mask(0, BIT(port), RTL838X_EEE_PORT_RX_EN);
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} else {
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sw_w32_mask(BIT(port), 0, RTL838X_EEE_PORT_TX_EN);
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sw_w32_mask(BIT(port), 0, RTL838X_EEE_PORT_RX_EN);
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}
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priv->ports[port].eee_enabled = enable;
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}
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/*
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* Get EEE own capabilities and negotiation result
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*/
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static int rtl838x_eee_port_ability(struct rtl838x_switch_priv *priv,
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struct ethtool_eee *e, int port)
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{
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u64 link;
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if (port >= 24)
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return 0;
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link = rtl839x_get_port_reg_le(RTL838X_MAC_LINK_STS);
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if (!(link & BIT(port)))
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return 0;
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if (sw_r32(rtl838x_mac_force_mode_ctrl(port)) & BIT(9))
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e->advertised |= ADVERTISED_100baseT_Full;
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if (sw_r32(rtl838x_mac_force_mode_ctrl(port)) & BIT(10))
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e->advertised |= ADVERTISED_1000baseT_Full;
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if (sw_r32(RTL838X_MAC_EEE_ABLTY) & BIT(port)) {
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e->lp_advertised = ADVERTISED_100baseT_Full;
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e->lp_advertised |= ADVERTISED_1000baseT_Full;
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return 1;
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}
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return 0;
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}
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static void rtl838x_init_eee(struct rtl838x_switch_priv *priv, bool enable)
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{
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int i;
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pr_info("Setting up EEE, state: %d\n", enable);
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sw_w32_mask(0x4, 0, RTL838X_SMI_GLB_CTRL);
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/* Set timers for EEE */
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sw_w32(0x5001411, RTL838X_EEE_TX_TIMER_GIGA_CTRL);
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sw_w32(0x5001417, RTL838X_EEE_TX_TIMER_GELITE_CTRL);
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// Enable EEE MAC support on ports
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for (i = 0; i < priv->cpu_port; i++) {
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if (priv->ports[i].phy)
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rtl838x_port_eee_set(priv, i, enable);
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}
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priv->eee_enabled = enable;
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}
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const struct rtl838x_reg rtl838x_reg = {
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.mask_port_reg_be = rtl838x_mask_port_reg,
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.set_port_reg_be = rtl838x_set_port_reg,
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@ -317,6 +395,9 @@ const struct rtl838x_reg rtl838x_reg = {
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.trk_mbr_ctr = rtl838x_trk_mbr_ctr,
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.rma_bpdu_fld_pmask = RTL838X_RMA_BPDU_FLD_PMSK,
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.spcl_trap_eapol_ctrl = RTL838X_SPCL_TRAP_EAPOL_CTRL,
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.init_eee = rtl838x_init_eee,
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.port_eee_set = rtl838x_port_eee_set,
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.eee_port_ability = rtl838x_eee_port_ability,
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};
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irqreturn_t rtl838x_switch_irq(int irq, void *dev_id)
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@ -162,6 +162,16 @@
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#define RTL838X_EEE_TX_TIMER_GIGA_CTRL (0xaa04)
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#define RTL838X_EEE_TX_TIMER_GELITE_CTRL (0xaa08)
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#define RTL839X_EEE_TX_TIMER_GELITE_CTRL (0x042C)
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#define RTL839X_EEE_TX_TIMER_GIGA_CTRL (0x0430)
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#define RTL839X_EEE_TX_TIMER_10G_CTRL (0x0434)
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#define RTL839X_EEE_CTRL(p) (0x8008 + ((p) << 7))
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#define RTL839X_MAC_EEE_ABLTY (0x03C8)
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#define RTL930X_MAC_EEE_ABLTY (0xCB34)
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#define RTL930X_EEE_CTRL(p) (0x3274 + ((p) << 6))
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#define RTL930X_EEEP_PORT_CTRL(p) (0x3278 + ((p) << 6))
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/* L2 functionality */
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#define RTL838X_L2_CTRL_0 (0x3200)
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#define RTL839X_L2_CTRL_0 (0x3800)
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@ -440,6 +450,10 @@ struct rtl838x_reg {
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int (*trk_mbr_ctr)(int group);
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int rma_bpdu_fld_pmask;
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int spcl_trap_eapol_ctrl;
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void (*init_eee)(struct rtl838x_switch_priv *priv, bool enable);
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void (*port_eee_set)(struct rtl838x_switch_priv *priv, int port, bool enable);
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int (*eee_port_ability)(struct rtl838x_switch_priv *priv,
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struct ethtool_eee *e, int port);
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};
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struct rtl838x_switch_priv {
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@ -466,6 +480,7 @@ struct rtl838x_switch_priv {
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u64 lags_port_members[MAX_LAGS];
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struct net_device *lag_devs[MAX_LAGS];
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struct notifier_block nb;
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bool eee_enabled;
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};
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void rtl838x_dbgfs_init(struct rtl838x_switch_priv *priv);
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@ -456,6 +456,83 @@ static void rtl839x_stp_set(struct rtl838x_switch_priv *priv, u16 msti, u32 port
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priv->r->exec_tbl0_cmd(cmd);
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}
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/*
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* Enables or disables the EEE/EEEP capability of a port
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*/
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void rtl839x_port_eee_set(struct rtl838x_switch_priv *priv, int port, bool enable)
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{
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u32 v;
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// This works only for Ethernet ports, and on the RTL839X, ports above 47 are SFP
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if (port >= 48)
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return;
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enable = true;
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pr_debug("In %s: setting port %d to %d\n", __func__, port, enable);
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v = enable ? 0xf : 0x0;
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// Set EEE for 100, 500, 1000MBit and 10GBit
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sw_w32_mask(0xf << 8, v << 8, rtl839x_mac_force_mode_ctrl(port));
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// Set TX/RX EEE state
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v = enable ? 0x3 : 0x0;
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sw_w32(v, RTL839X_EEE_CTRL(port));
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priv->ports[port].eee_enabled = enable;
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}
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/*
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* Get EEE own capabilities and negotiation result
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*/
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int rtl839x_eee_port_ability(struct rtl838x_switch_priv *priv, struct ethtool_eee *e, int port)
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{
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u64 link, a;
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if (port >= 48)
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return 0;
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link = rtl839x_get_port_reg_le(RTL839X_MAC_LINK_STS);
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if (!(link & BIT_ULL(port)))
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return 0;
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if (sw_r32(rtl839x_mac_force_mode_ctrl(port)) & BIT(8))
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e->advertised |= ADVERTISED_100baseT_Full;
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if (sw_r32(rtl839x_mac_force_mode_ctrl(port)) & BIT(10))
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e->advertised |= ADVERTISED_1000baseT_Full;
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a = rtl839x_get_port_reg_le(RTL839X_MAC_EEE_ABLTY);
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pr_info("Link partner: %016llx\n", a);
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if (rtl839x_get_port_reg_le(RTL839X_MAC_EEE_ABLTY) & BIT_ULL(port)) {
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e->lp_advertised = ADVERTISED_100baseT_Full;
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e->lp_advertised |= ADVERTISED_1000baseT_Full;
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return 1;
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}
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return 0;
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}
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static void rtl839x_init_eee(struct rtl838x_switch_priv *priv, bool enable)
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{
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int i;
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pr_info("Setting up EEE, state: %d\n", enable);
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// Set wake timer for TX and pause timer both to 0x21
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sw_w32_mask(0xff << 20| 0xff, 0x21 << 20| 0x21, RTL839X_EEE_TX_TIMER_GELITE_CTRL);
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// Set pause wake timer for GIGA-EEE to 0x11
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sw_w32_mask(0xff << 20, 0x11 << 20, RTL839X_EEE_TX_TIMER_GIGA_CTRL);
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// Set pause wake timer for 10GBit ports to 0x11
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sw_w32_mask(0xff << 20, 0x11 << 20, RTL839X_EEE_TX_TIMER_10G_CTRL);
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// Setup EEE on all ports
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for (i = 0; i < priv->cpu_port; i++) {
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if (priv->ports[i].phy)
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rtl839x_port_eee_set(priv, i, enable);
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}
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priv->eee_enabled = enable;
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}
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const struct rtl838x_reg rtl839x_reg = {
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.mask_port_reg_be = rtl839x_mask_port_reg_be,
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.set_port_reg_be = rtl839x_set_port_reg_be,
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@ -510,4 +587,7 @@ const struct rtl838x_reg rtl839x_reg = {
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.trk_mbr_ctr = rtl839x_trk_mbr_ctr,
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.rma_bpdu_fld_pmask = RTL839X_RMA_BPDU_FLD_PMSK,
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.spcl_trap_eapol_ctrl = RTL839X_SPCL_TRAP_EAPOL_CTRL,
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.init_eee = rtl839x_init_eee,
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.port_eee_set = rtl839x_port_eee_set,
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.eee_port_ability = rtl839x_eee_port_ability,
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};
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@ -551,6 +551,95 @@ u32 rtl930x_hash(struct rtl838x_switch_priv *priv, u64 seed)
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return h;
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}
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/*
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* Enables or disables the EEE/EEEP capability of a port
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*/
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void rtl930x_port_eee_set(struct rtl838x_switch_priv *priv, int port, bool enable)
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{
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u32 v;
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// This works only for Ethernet ports, and on the RTL930X, ports from 26 are SFP
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if (port >= 26)
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return;
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pr_debug("In %s: setting port %d to %d\n", __func__, port, enable);
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v = enable ? 0x3f : 0x0;
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// Set EEE/EEEP state for 100, 500, 1000MBit and 2.5, 5 and 10GBit
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sw_w32_mask(0, v << 10, rtl930x_mac_force_mode_ctrl(port));
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// Set TX/RX EEE state
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v = enable ? 0x3 : 0x0;
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sw_w32(v, RTL930X_EEE_CTRL(port));
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priv->ports[port].eee_enabled = enable;
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}
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/*
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* Get EEE own capabilities and negotiation result
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*/
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int rtl930x_eee_port_ability(struct rtl838x_switch_priv *priv, struct ethtool_eee *e, int port)
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{
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u32 link, a;
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if (port >= 26)
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return -ENOTSUPP;
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pr_info("In %s, port %d\n", __func__, port);
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link = sw_r32(RTL930X_MAC_LINK_STS);
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link = sw_r32(RTL930X_MAC_LINK_STS);
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if (!(link & BIT(port)))
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return 0;
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pr_info("Setting advertised\n");
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if (sw_r32(rtl930x_mac_force_mode_ctrl(port)) & BIT(10))
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e->advertised |= ADVERTISED_100baseT_Full;
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if (sw_r32(rtl930x_mac_force_mode_ctrl(port)) & BIT(12))
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e->advertised |= ADVERTISED_1000baseT_Full;
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if (priv->ports[port].is2G5 && sw_r32(rtl930x_mac_force_mode_ctrl(port)) & BIT(13)) {
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pr_info("ADVERTISING 2.5G EEE\n");
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e->advertised |= ADVERTISED_2500baseX_Full;
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}
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if (priv->ports[port].is10G && sw_r32(rtl930x_mac_force_mode_ctrl(port)) & BIT(15))
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e->advertised |= ADVERTISED_10000baseT_Full;
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a = sw_r32(RTL930X_MAC_EEE_ABLTY);
|
||||
a = sw_r32(RTL930X_MAC_EEE_ABLTY);
|
||||
pr_info("Link partner: %08x\n", a);
|
||||
if (a & BIT(port)) {
|
||||
e->lp_advertised = ADVERTISED_100baseT_Full;
|
||||
e->lp_advertised |= ADVERTISED_1000baseT_Full;
|
||||
if (priv->ports[port].is2G5)
|
||||
e->lp_advertised |= ADVERTISED_2500baseX_Full;
|
||||
if (priv->ports[port].is10G)
|
||||
e->lp_advertised |= ADVERTISED_10000baseT_Full;
|
||||
}
|
||||
|
||||
// Read 2x to clear latched state
|
||||
a = sw_r32(RTL930X_EEEP_PORT_CTRL(port));
|
||||
a = sw_r32(RTL930X_EEEP_PORT_CTRL(port));
|
||||
pr_info("%s RTL930X_EEEP_PORT_CTRL: %08x\n", __func__, a);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void rtl930x_init_eee(struct rtl838x_switch_priv *priv, bool enable)
|
||||
{
|
||||
int i;
|
||||
|
||||
pr_info("Setting up EEE, state: %d\n", enable);
|
||||
|
||||
// Setup EEE on all ports
|
||||
for (i = 0; i < priv->cpu_port; i++) {
|
||||
if (priv->ports[i].phy)
|
||||
rtl930x_port_eee_set(priv, i, enable);
|
||||
}
|
||||
|
||||
priv->eee_enabled = enable;
|
||||
}
|
||||
|
||||
const struct rtl838x_reg rtl930x_reg = {
|
||||
.mask_port_reg_be = rtl838x_mask_port_reg,
|
||||
@ -604,4 +693,7 @@ const struct rtl838x_reg rtl930x_reg = {
|
||||
.vlan_port_tag_sts_ctrl = RTL930X_VLAN_PORT_TAG_STS_CTRL,
|
||||
.trk_mbr_ctr = rtl930x_trk_mbr_ctr,
|
||||
.rma_bpdu_fld_pmask = RTL930X_RMA_BPDU_FLD_PMSK,
|
||||
.init_eee = rtl930x_init_eee,
|
||||
.port_eee_set = rtl930x_port_eee_set,
|
||||
.eee_port_ability = rtl930x_eee_port_ability,
|
||||
};
|
||||
|
Loading…
Reference in New Issue
Block a user