This is required for linux-6.1 compatibility.
IRQs are not automatically mapped from HW to virtual IRQ numbers when
the IRQ domain is registered. This happens when the IRQ number is read
from the device tree based on the IRQ domain from the device tree now.
In kernel 5.15 it was done when the IRQ domain was registered.
Signed-off-by: Martin Schiller <ms@dev.tdt.de>
This is required for linux-6.1 compatibility.
IRQs are not automatically mapped from HW to virtual IRQ numbers when
the IRQ domain is registered. This happens when the IRQ number is read
from the device tree based on the IRQ domain from the device tree now.
In kernel 5.15 it was done when the IRQ domain was registered.
Signed-off-by: Martin Schiller <ms@dev.tdt.de>
This is required for linux-6.1 compatibility.
IRQs are not automatically mapped from HW to virtual IRQ numbers when
the IRQ domain is registered. This happens when the IRQ number is read
from the device tree based on the IRQ domain from the device tree now.
In kernel 5.15 it was done when the IRQ domain was registered.
Signed-off-by: Martin Schiller <ms@dev.tdt.de>
Use dev_err_probe() to get rid of the following warning which is
seen when the PCIe PHY has not been probed yet:
pcie-xrx200 1d900000.pcie: failed to get the PCIe PHY
Signed-off-by: Martin Schiller <ms@dev.tdt.de>
This backports some patches for the gswip switch driver.
I copied them from this repository:
https://github.com/xdarklight/linux/commits/lantiq-gswip-integration-20221022
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
[drop some patches which may break functionality at the moment]
Signed-off-by: Martin Schiller <ms@dev.tdt.de>
If the reverted timer driver fails to allocate interrupts handle the
error better.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
[moved printk before the cleanup for-loop]
Signed-off-by: Martin Schiller <ms@dev.tdt.de>
Make all the patches apply and delete the ones already integrated into
upstream Linux kernel. This also refreshes some of the kernel
configurations.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
[refreshed for linux 6.1.89]
Signed-off-by: Martin Schiller <ms@dev.tdt.de>
This is an automatically generated commit which aids following Kernel patch
history, as git will see the move and copy as a rename thus defeating the
purpose.
For the original discussion see:
https://lists.openwrt.org/pipermail/openwrt-devel/2023-October/041673.html
Signed-off-by: Martin Schiller <ms@dev.tdt.de>
This refreshes the configuration for Linux kernel 5.15.
I first selected the xrx200 subtarget and then refreshed the target
kernel configuration using this command:
make kernel_oldconfig CONFIG_TARGET=target
Then I selected one subtarget after the other and refreshed their
configuration using this command:
make kernel_oldconfig CONFIG_TARGET=subtarget
I compared the kernel configuration used to compile the kernel from the
build directory for each subtarget before and after this task and it was
still the same.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
[refreshed config for linux 5.15.158]
Signed-off-by: Martin Schiller <ms@dev.tdt.de>
There is a custom LED controller between the 3 SoC GPIO outputs and
the red and blue LEDs of the device. It implements a strange mapping
that includes fixed, flashing, and breathing modes.
The current DTS configuration causes OpenWrt to flash the LEDs over
the controller's own flashing, resulting in chaotic output in boot,
failsafe, and upgrade modes.
This change fixes the LEDs in the best way possible as long as each
OpenWrt running state is limited to be signaled by a single led.
Signed-off-by: Rodrigo Balerdi <lanchon@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/15440
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
There is no need to use 'list_for_each_entry_safe' here, as nothing is
removed from the list in the 'for' loop.
Use 'list_for_each_entry' instead, it is slightly less verbose.
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Link: https://github.com/openwrt/openwrt/pull/15435
Link: https://github.com/openwrt/openwrt/pull/15435
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Fixes the issue of RTL8221B-VB-CG not being detected correctly.
Reverts changes from f6c27b2, leaving only the read_c45 test.
Fixed: #15093
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Lets give Linux 6.6 a try.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Link: https://github.com/openwrt/openwrt/pull/15416
Signed-off-by: Robert Marko <robimarko@gmail.com>
Refresh kernel config for Linux 6.6.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Link: https://github.com/openwrt/openwrt/pull/15416
Signed-off-by: Robert Marko <robimarko@gmail.com>
Refresh the only remaining downstream patch.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Link: https://github.com/openwrt/openwrt/pull/15416
Signed-off-by: Robert Marko <robimarko@gmail.com>
This is an automatically generated commit.
When doing `git bisect`, consider `git bisect --skip`.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Link: https://github.com/openwrt/openwrt/pull/15416
Signed-off-by: Robert Marko <robimarko@gmail.com>
Update default kernel version to 6.6 and drop configs and patches for
kernel 6.1. We can also omit the conditional to include DTS dir.
Signed-off-by: Stefan Kalscheuer <stefan@stklcode.de>
Link: https://github.com/openwrt/openwrt/pull/15449
Signed-off-by: Robert Marko <robimarko@gmail.com>
Like AVM 1200 these devices also do not use QCA807x PHY at all and thus
they disables all of the individual PHY nodes, however this is not enough
anymore since the conversion to PHY package.
Now its now enough to disable the PHY-s in the package alone, but the PHY
package node itself must also be disabled.
Fixes: 1b931c33a2 ("ipq40xx: adapt to new Upstream QCA807x PHY driver")
Link: https://github.com/openwrt/openwrt/pull/15444
Signed-off-by: Robert Marko <robimarko@gmail.com>
- Soc: MediaTek MT7621AT
- RAM: 512 MB (DDR3)
- Flash: 16 MB (SPI NOR)
- WiFi: MediaTek MT7905DAN, MediaTek MT7975DN
- Ethernet: 1 WAN, 3 LAN (Gigabit)
- Buttons: Reset, Joylink
- LEDs: (red, blue, green), routed to one indicator in the top of the
device
- Power: DC 12V 1A tip positive
- 1 TF Card Slot
The pins for the serial console are already labeled on the board
J4(V, R, T, G). Serial settings: 3.3V, 115200
MAC addresses:
| | MAC | Algorithm |
| ------- | ----------------- | --------- |
| label | dc:d8:xx:xx:xx:01 | label |
| LAN | dc:d8:xx:xx:xx:01 | label |
| WAN | dc:d8:xx:xx:xx:02 | label+1 |
| WLAN 2g | dc:d8:xx:xx:xx:03 | label+2 |
| WLAN 5g | de:d8:xx:xx:xx:04 | label+3 |
1. rename the
openwrt-ramips-mt7621-jdcloud_re-cp-02-squashfs-sysupgrade.bin
to JDCOS.bin
2. start a TFTP server from IP address 192.168.68.10 and serve the
image named JDCOS.bin
3. connect your device to the LAN port
4. power up the router and press any key on the console to interrupt
the boot process.
5. enter the following commands on the router console
1. setenv bootcount 6
2. saveenv
3. reset
> NOTE: wait for the restart, it will automatically fetch the
> image named JDCOS.bin from the TFTP server and write it into
> the flash. After the writing is completed, the router will be
> automatically restarted.
Unable to recognize large-capacity TF card, see #14042. But the patch
https://github.com/openwrt/openwrt/issues/14042#issuecomment-1910769942
works
Co-Authored-By: Jianti Chen <clbcjt@outlook.com>
Signed-off-by: Sheng Huang <shenghuang147@gmail.com>
Hardware:
SoC: MT7981b
RAM: 256 MB
Flash: 128 MB SPI NAND
Ethernet:
1x 2.5Gbps (rtl8221b)
1x 1Gbps (integrated phy)
WiFi: 2x2 MT7981
Buttons: Reset, WPS
LED: 1x multicolor
Solder on UART:
- remove rubber ring on the bottom
- remove screws
- pull up the cylinder, maybe help by push on an ethernet socket with a screwdriver
- remove the (3) screws holding the board in the frame
- remove the board from the frame to get to the screws for the silver, flat heat shield
- remove the (3) screws holding the heat shield
- solder UART pins to the back of the board
- make sure to have the pins point out on side with the black, finned heat spread
- the markings for the pins are going to be below the silver heat shield
- Vcc is not needed
If you don't intend on using the UART outside of the installation process, you might not
want to solder:
- carefully scrape off the thin layer of epoxy on the holes (not the copper)
- place your pin header with the UART attached in the holes
- the pins, starting with the one closest to the socket:
- Vcc (not required)
- GND
- RX
- TX
- either wedge the header or hold it with your fingers so that the pins stay in contact with the board
Installation (UART):
- attach an Ethernet cable to the 1Gbps port (black) on the router
- hold the reset button while powering the router
- press CTRL-C or wait for the timeout to get to the U-Boot prompt
- prepare a TFTP server on the network to supply ..-initramfs-kernel.bin
- use 'tftpboot' in the U-Boot shell to pull the image
- boot the image using 'bootm'
- push the ..-sysupgrade to the router using your preferred method
- perform the upgrade with 'sysupgrade -n'
There is a recovery mechanism that involves fetching a file called 'recovery.bin' but that is not understood yet.
Signed-off-by: Leon M. Busch-George <leon@georgemail.eu>
FCC ID: A8J-EWS660AP
Engenius ENS1750 is an outdoor wireless access point with
2 gigabit ethernet ports, dual-band wireless,
internal antenna plates, and 802.3at PoE+
Engenius EWS660AP, ENS1750, and ENS1200 are "electrically identical,
different model names are for marketing purpose" according to docs
provided by Engenius to the FCC.
**Specification:**
- QCA9558 SOC 2.4 GHz, 3x3
- QCA9880 WLAN mini PCIe card, 5 GHz, 3x3, 26dBm
- AR8035-A PHY RGMII GbE with PoE+ IN
- AR8033 PHY SGMII GbE with PoE+ OUT
- 40 MHz clock
- 16 MB FLASH MX25L12845EMI-10G
- 2x 64 MB RAM
- UART at J1 populated, RX grounded
- 6 internal antenna plates (5 dbi, omni-directional)
- 5 LEDs, 1 button (power, eth0, eth1, 2G, 5G) (reset)
**MAC addresses:**
Base MAC addressed labeled as "MAC"
Only one Vendor MAC address in flash
eth0 *:d4 MAC art 0x0
eth1 *:d5 --- art 0x0 +1
phy1 *:d6 --- art 0x0 +2
phy0 *:d7 --- art 0x0 +3
**Serial Access:**
the RX line on the board for UART is shorted to ground by resistor R176
therefore it must be removed to use the console
but it is not necessary to remove to view boot log
optionally, R175 can be replaced with a solder bridge short
the resistors R175 and R176 are next to the UART RX pin
**Installation:**
2 ways to flash factory.bin from OEM:
Method 1: Firmware upgrade page:
OEM webpage at 192.168.1.1
username and password "admin"
Navigate to "Firmware Upgrade" page from left pane
Click Browse and select the factory.bin image
Upload and verify checksum
Click Continue to confirm and wait 3 minutes
Method 2: Serial to load Failsafe webpage:
After connecting to serial console and rebooting...
Interrupt uboot with any key pressed rapidly
execute `run failsafe_boot` OR `bootm 0x9fd70000`
wait a minute
connect to ethernet and navigate to
"192.168.1.1/index.htm"
Select the factory.bin image and upload
wait about 3 minutes
**Return to OEM:**
If you have a serial cable, see Serial Failsafe instructions
otherwise, uboot-env can be used to make uboot load the failsafe image
ssh into openwrt and run
`fw_setenv rootfs_checksum 0`
reboot, wait 3 minutes
connect to ethernet and navigate to 192.168.1.1/index.htm
select OEM firmware image from Engenius and click upgrade
**TFTP recovery:**
Requires serial console, reset button does nothing
rename initramfs.bin to '0101A8C0.img'
make available on TFTP server at 192.168.1.101
power board, interrupt boot
execute tftpboot and bootm 0x81000000
**Format of OEM firmware image:**
The OEM software of ENS1750 is a heavily modified version
of Openwrt Kamikaze. One of the many modifications
is to the sysupgrade program. Image verification is performed
simply by the successful ungzip and untar of the supplied file
and name check and header verification of the resulting contents.
To form a factory.bin that is accepted by OEM Openwrt build,
the kernel and rootfs must have specific names...
openwrt-ar71xx-generic-ens1750-uImage-lzma.bin
openwrt-ar71xx-generic-ens1750-root.squashfs
and begin with the respective headers (uImage, squashfs).
Then the files must be tarballed and gzipped.
The resulting binary is actually a tar.gz file in disguise.
This can be verified by using binwalk on the OEM firmware images,
ungzipping then untaring.
Newer EnGenius software requires more checks but their script
includes a way to skip them, otherwise the tar must include
a text file with the version and md5sums in a deprecated format.
The OEM upgrade script is at /etc/fwupgrade.sh.
OKLI kernel loader is required because the OEM software
expects the kernel to be no greater than 1536k
and the factory.bin upgrade procedure would otherwise
overwrite part of the kernel when writing rootfs.
Note on PLL-data cells:
The default PLL register values will not work
because of the external AR8035 switch between
the SOC and the ethernet port.
For QCA955x series, the PLL registers for eth0 and eth1
can be see in the DTSI as 0x28 and 0x48 respectively.
Therefore the PLL registers can be read from uboot
for each link speed after attempting tftpboot
or another network action using that link speed
with `md 0x18050028 1` and `md 0x18050048 1`.
The clock delay required for RGMII can be applied
at the PHY side, using the at803x driver `phy-mode`.
Therefore the PLL registers for GMAC0
do not need the bits for delay on the MAC side.
This is possible due to fixes in at803x driver
since Linux 5.1 and 5.3
Tested-by: Kevin Abraham <kevin@westhousefarm.com>
Signed-off-by: Kevin Abraham <kevin@westhousefarm.com>
Add additional PWM fan cooling step and enable fan on BPi-R4.
Suggested-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
We should setup the registers for trapping LLDP packets to the CPU.
Currently, these packets are forwarded to all ports which is not desired
behaviour.
Signed-off-by: Kevin Jilissen <info@kevinjilissen.nl>
These registers control the handling of Link Layer Discovery Protocol
(LLDP) packets. This seems to be a typo in the naming.
Signed-off-by: Kevin Jilissen <info@kevinjilissen.nl>
This device is similiar to the Wavlink WL-WN531A3.
Hardware
--------
SoC: Mediatek MT7620A
RAM: 64MB
FLASH: 8MB NOR (GigaDevice GD25Q64CS)
ETH:
- 2x 10/100/1000 Mbps Ethernet (RTL8211F)
- 3x 10/100 Mbps Ethernet (integrated in SOC)
WIFI:
- 2.4GHz: 1x (integrated in SOC) (2x2:2)
- 5GHz: 1x MT7612E (2x2:2)
- 4 external antennas
BTN:
- 1x Reset button
- 1x Touchlink button
- 1x Turbo button
- 1x Wps button
- 1x ON/OFF switch
LEDS:
- 1x Red led (system status)
- 1x Blue led (system status)
- 5x Blue leds (ethernet ports)
- 1x Power led
- 1x Wifi led
UART:
- 57600-8-N-1
Everything works correctly.
Installation
------------
Flash the initramfs image in the OEM firmware interface
When Openwrt boots, flash the sysupgrade image otherwise you won't be
able to keep configuration between reboots.
In my case the whole device was locked and there was no way
to flash the image, except for flashing directly to the flash
via an spi-flasher. You need to put the sysupgrade image file at
the beginning of 0x60000.
Notes
-----
1) Router mac addresses:
LAN XX:XX:XX:XX:XX:F0 (factory @ 0x28)
WAN XX:XX:XX:XX:XX:F1 (factory @ 0x2e)
WIFI 2G XX:XX:XX:XX:XX:F2 (factory @ 0x04)
WIFI 5G XX:XX:XX:XX:XX:F3 (factory @ 0x8004)
LABEL XX:XX:XX:XX:XX:F2
Signed-off-by: Eros Brigmann <erosbrigmann@gmail.com>
All kernel config files are refreshed by
`make kernel_oldconfig CONFIG_TARGET={subtarget_target,subtarget}`
"CONFIG_SQUASHFS_DECOMP_SINGLE=y" is manually selected as all ath79
SoCs are single core processors.
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
The upcoming 6.6 kernel will introduce a new upstream generic
"gpio-latch" driver. It will conflict with the downstream MikroTik
GPIO latch driver. Let's rename it to avoid any potential issues.
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
Hardware:
- SoC: MediaTek MT7981B
- CPU: 2x 1.3 GHz Cortex-A53
- Flash: 128 MiB SPI NAND
- RAM: 512 MiB
- WLAN: 2.4 GHz, 5 GHz (MediaTek MT7976CN, 802.11ax)
- Ethernet: 1x 10/100/1000/2500 Mbps RTL8221B WAN, 1x10/100/1000 Mbps MT7981 LAN
- USB 3.0 port
- Buttons: 1 Reset button, 1 slider button
- LEDs: 1x Red, 1x White
- Serial console: internal test points, 115200 8n1
- Power: 5 VDC, 3 A
MAC addresses:
+---------+-------------------+-----------+
| | MAC | Algorithm |
+---------+-------------------+-----------+
| WAN | 80:af:ca:xx:xx:x1 | label+1 |
| LAN | 80:af:ca:xx:xx:x0 | label |
| WLAN 2g | 80:af:ca:xx:xx:x0 | label |
| WLAN 5g | 82:af:ca:xx:xx:x0 | |
+---------+-------------------+-----------+
Installation:
The installation must be done via TFTP by disassembling the router. On other occasions Cudy has distributed intermediate firmware to make installation easier, and so I recommend checking the Wiki for this device if there is a more convenient solution than the one below.
To install using TFTP:
1. Connect to UART.
2. With the router off, press the RESET button. While the router is turning on, the button should continue to be pressed for at least 5 seconds.
3. A u-boot shell will automatically open.
4. Connect to LAN and set your IP to 192.168.1.88/24. Configure a TFTP server and an OpenWrt initramfs-kernel.bin firmware file.
5. Run these steps in u-boot using the name of your file.
setenv bootfile initramfs-kernel.bin
tftpboot
bootm
6. If you can reach LuCI or SSH now, just use the sysupgrade image with the 'Keep settings' option turned off.
Signed-off-by: Luis Mita <luis@luismita.com>
Hardware Specification:
SoC: Mediatek MT7621DAT (MIPS1004Kc 880 MHz, dual core)
RAM: 128 MB
Storage: 128 MB NAND flash
Ethernet: 5x 10/100/1000 Mbps LAN1,LAN2,LAN3,LAN4 & WAN
Wireless: 2.4GHz: Mediatek MT7603EN up to 300Mbps (802.11b/g/n MIMO 2x2)
Wireless: 5GHz: Mediatek MT7615N up to 1733Mbps (802.11n/ac MU-MIMO 4x4)
LEDs: Power (white & amber), Internet (white & amber)
LEDs: 2.4G (White), 5Ghz (White)
Buttons: WPS, Reset
MAC Table
Label xx:xx:xx:xx:xx:EB
LAN xx:xx:xx:xx:xx:EB
2.4Ghz xx:xx:xx:xx:xx:EC
5Ghz xx:xx:xx:xx:xx:ED
WAN xx:xx:xx:xx:xx:EE
Flash instructions:
D-Link normal OEM firmware update page
1. upload OpenWRT factory.bin like any D-Link upgrade image
D-Link Recovery GUI:
1. Push and hold reset button (on the bottom of the device) until power led starts flashing (about 10 secs or so) while plugging in the power cable.
2. Give it ~30 seconds, to boot the recovery mode GUI
3. Connect your client computer to LAN1 of the device
4. Set your client IP address manually to 192.168.0.2 / 255.255.255.0
5. Call the recovery page for the device at http://192.168.0.1/
6. Use the provided emergency web GUI to upload the recovery.bin to the device
Firefox on Windows in a Private Window (incognito) works me
Internet Explorer mode in Microsoft Edge works for others
seems to not work in Linux or virtual machine on Linux for most
some see success using 'curl -v -i -F "firmware=@file.bin" 192.168.0.1'
Thanks to @frkca and @rodneyrod for testing and pushing for its creation
Signed-off-by: Alan Luck <luckyhome2008@gmail.com>
Setting the LED name and abandoning the label and using the
function/color syntax for some TP-Link Archer series routers:
Archer C2 v1, Archer C20 v1, Archer C20i and Archer C50 v1
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Abandoning the label and using the function/color syntax for some dlink
dir series routers: dir-1960-a1, dir-2660-a1, dir-2640-a1, dir-3040-a1
and dir-3060-a1
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Rename from mt7621_dlink_dir-xx60-a1.dtsi to mt7621_dlink_dir_nand_128m.dtsi
and associated group name when creating the mt7621.mk image
Co-authored-by: Alan Luck <luckyhome2008@gmail.com>
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Continuation of commit 8b66f1a. Set the switch address on the MDIO bus to 31.
This is required for all boards currently working with the mt7530 DSA driver.
Fixes: #15419
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Backport patch merged upstream for rgmii-id support in stmmac-ipq806x.
This is needed for some device that directly connets PHY to the gmac
port and require rgmii-id phy-modes.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
WPJ419 is still manually defining SPI node, so lets
convert it to use the existing upstream labels for SPI node.
Link: https://github.com/openwrt/openwrt/pull/15415
Signed-off-by: Robert Marko <robimarko@gmail.com>
WPJ419 is still manually defining pinctrl node, so lets
convert it to use the existing upstream labels for pinctrl node.
Link: https://github.com/openwrt/openwrt/pull/15415
Signed-off-by: Robert Marko <robimarko@gmail.com>
WPJ419 is still manually defining PCIe node, so lets
convert it to use the existing upstream labels for PCIe node and while we
are here use the -gpios suffix instead.
Link: https://github.com/openwrt/openwrt/pull/15415
Signed-off-by: Robert Marko <robimarko@gmail.com>
Some boards are still defining MDIO nodes under soc instead of using the
existing upstream labels to reference them so convert them.
Link: https://github.com/openwrt/openwrt/pull/15415
Signed-off-by: Robert Marko <robimarko@gmail.com>
Some boards are still defininig I2C nodes under soc instead of using the
existing upstream labels to reference them so convert them.
Link: https://github.com/openwrt/openwrt/pull/15415
Signed-off-by: Robert Marko <robimarko@gmail.com>
Some boards are still defininig UART nodes under soc instead of using the
existing upstream labels to reference them so convert them.
Link: https://github.com/openwrt/openwrt/pull/15415
Signed-off-by: Robert Marko <robimarko@gmail.com>
This device does not have NAND enabled at all and NAND is the only consumer
of QPIC BAM DMA, so drop the node.
Link: https://github.com/openwrt/openwrt/pull/15415
Signed-off-by: Robert Marko <robimarko@gmail.com>
WPJ419 is still manually defining dma nodes(And even some labels), so lets
convert it to use the existing upstream labels for DMA nodes.
Link: https://github.com/openwrt/openwrt/pull/15415
Signed-off-by: Robert Marko <robimarko@gmail.com>
Currently, a lot of boards are still not using the existing label to
reference the crypto node, so lets rectify this.
Link: https://github.com/openwrt/openwrt/pull/15415
Signed-off-by: Robert Marko <robimarko@gmail.com>
Currently, a lot of boards are still not using the existing label to
reference the prng node, so lets rectify this.
Link: https://github.com/openwrt/openwrt/pull/15415
Signed-off-by: Robert Marko <robimarko@gmail.com>
Currently, a lot of boards are still not using the existing label to
reference the watchdog node, so lets rectify this.
Link: https://github.com/openwrt/openwrt/pull/15415
Signed-off-by: Robert Marko <robimarko@gmail.com>
The way to register the switch MDIO bus and PHYs on the bus in upstream
Linux is more strict and requires each PHY to explicitely state the
interrupt instead of assuming it in case the 'interrupts' property in DT
is missing.
Add missing interrupts for the PHYs of the build-in 4x1GE switch of the
MT7988 SoC.
Fixes: 4354b34f6f ("generic: 6.6: sync mt7530 DSA driver with upstream")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
To fix issue #15304
Correct br-lan ports 1-4 so that phy-handle matches reg nr not port label.
Fixes: eb13076e77 ("mediatek: fix DTS defining mt7530 switch phys but not referencing them")
Signed-off-by: Magnus Lindström <magnus1089@hotmail.com>
The Gemini works fine with kernel v6.6.
As per the example for ipq806x, drop support for anything
older than v6.6, there is no point in supporting it,
and the new DTS SoC directory just makes it hard to
maintain.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Backport driver from upcoming Linux 6.10 and put a pending fix on top
to make sure the netdev trigger offloading behaves as expected.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Support for Renesas Arm families was added in commit 1ff4f4df23
("armsr: armv8: enable CONFIG_ARCH_RENESAS"), but this did not
enable the console/tty hardware for these SoCs, which is derived
from the SuperH family (CONFIG_SERIAL_SH_SCI).
Link: https://github.com/openwrt/openwrt/issues/15284
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Due to a change in kernel 6.2, the GPIO numbers on certain
architectures (including arm64) have changed. This script
will update any defined GPIO switches to the new numbering.
See https://lists.openwrt.org/pipermail/openwrt-devel/2024-March/042448.html
for more information.
In the future, the GPIO switch mechanism will likely be
replaced with something using libgpiod.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
A change in kernel 6.2[1] caused the base numbers of GPIOs to
change significantly on some architectures like aarch64.
We have to number our GPIOs accordingly.
Ideally the board.d scripts should look through sysfs
to find the basenum (like cat "/sys/devices/platform/soc/2000000.i2c/
i2c-0/0-0076/gpio/gpiochip640/base"), but the problem is
that this occurs before modules are loaded, meaning I2C and other
runtime devices may be missing.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
[1] https://lore.kernel.org/lkml/cover.1662116601.git.christophe.leroy@csgroup.eu/T/
Introduce new configuration options prompted by 6.6 (relative to 6.1).
The kernel arm64 defconfig is used as guide for 'core' options, while
video/camera/other media drivers are turned off by default.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
This is an automatically generated commit which aids following Kernel patch history,
as git will see the move and copy as a rename thus defeating the purpose.
See: https://lists.openwrt.org/pipermail/openwrt-devel/2023-October/041673.html
for the original discussion.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
LAN Leds on Meraki MR52 are wrong and needs to be swapped to actually
reflect real ports (lan1<->lan2).
Fixes: #15388
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Link: https://github.com/openwrt/openwrt/pull/15410
[ wrap commit to 80 columns and improve commit title ]
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
According to the Realtek SDK code, the RTL8214FC, RTL8218B and RTL8218FB
all have the same chip ID 0x6276. Let's add a constant for it, as we're
using it in more than one location.
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
Respect the phy-is-integrated property on ethernet-phy nodes.
There are RTL8393M switches where the PHYs at address 48 and 49 are
provided by an external RTL8214FC. Hardcoding them to use the internal
SerDes makes it impossible to use the ports connected to such an
external PHY. Respect the phy-is-integrated property on ethernet-phy
nodes as a first step to support such ports.
The potential impact for this should be limited to RTL8393 based
switches, and looking at the commit messages and device tree files of
the supported switches based on this SoC, the SFP and/or combo ports are
either not working (D-Link DGS-1210-52, Netgear GS750E, TP-Link
SG2452P/T1600G-52PS), use PHYs at a different address (Panasonic
SwitchM48EG PN28480K), or already have the phy-is-integrated property
set on the PHYs at address 48 and 49.
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
Acked-by: Daniel Golle <daniel@makrotopia.org>
There was a typo in commit 5709254690 ("mediatek: bpi-r4: store random
MAC addresses for the BPi-R4"). Let's fix it and also add support for
the bpi-r4-poe variant.
Fixes: 5709254690 ("mediatek: bpi-r4: store random MAC addresses for the BPi-R4")
Signed-off-by: Martin Schiller <ms@dev.tdt.de>
In commit cd4de3251c ("mediatek: wait for fitblk rootfs"), the linux
6.6 files and patches has been forgotton to be fixed.
Fixes: cd4de3251c ("mediatek: wait for fitblk rootfs")
Signed-off-by: Martin Schiller <ms@dev.tdt.de>
In commit cd4de3251c ("mediatek: wait for fitblk rootfs"), the linux
6.6 files and patches has been forgotton to be fixed.
Fixes: cd4de3251c ("mediatek: wait for fitblk rootfs")
Signed-off-by: Martin Schiller <ms@dev.tdt.de>
This is an automatically generated commit which aids following Kernel patch history,
as git will see the move and copy as a rename thus defeating the purpose.
See: https://lists.openwrt.org/pipermail/openwrt-devel/2023-October/041673.html
for the original discussion.
Signed-off-by: Antonio Flores <antflores627@gmail.com>
This is an automatically generated commit.
When doing `git bisect`, consider `git bisect --skip`.
Signed-off-by: Antonio Flores <antflores627@gmail.com>
Enable building multiple test programs and related kernel modules, with
initial support for the bpf_testmod.ko module required since kernel 6.4.
Explicitly disable LTO and clean up makefile variables and formatting.
Fix a musl-related build failure by adding a kernel 6.6 patch:
360-selftests-bpf-portability-of-unprivileged-tests.patch
Signed-off-by: Tony Ambardar <itugrok@yahoo.com>
Adding the aliases also for Linux 6.6 was forgotten and is required for
U-Boot to hand down persistent MAC addresses to Linux.
Fixes: 5709254690 ("mediatek: bpi-r4: store random MAC addresses for the BPi-R4")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Now that DSA is enabled and the MAC addresses are set properly, we can
use it.
Signed-off-by: Corey Minyard <minyard@acm.org>
Link: https://github.com/openwrt/openwrt/pull/15358
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
The code that was there was just taking whatever was left in the
registers, which was just wrong. Set the addresses using the value from
the u-boot environment, the same way the OEM firmware does.
Signed-off-by: Corey Minyard <minyard@acm.org>
Link: https://github.com/openwrt/openwrt/pull/15358
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This commit converts the EAP1300 to DSA setup.
Signed-off-by: Corey Minyard <minyard@acm.org>
Link: https://github.com/openwrt/openwrt/pull/15358
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
It's needed to get the MAC addresses for the Engenius EAP1300.
Signed-off-by: Corey Minyard <minyard@acm.org>
Link: https://github.com/openwrt/openwrt/pull/15358
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Commit 6136ebabc5 ("ipq40xx: 6.6: fix DTS to use reference for usb
node") fixed only some of the reference to USB node but many others were
still using the old broken usb3/usb2. Fix every reference to those node
and move them on using the tag name.
Fixes: 6136ebabc5 ("ipq40xx: 6.6: fix DTS to use reference for usb node")
Link: https://github.com/openwrt/openwrt/pull/15392
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
The patch "710-pci-pcie-mediatek-add-support-for-coherent-DMA.patch"
makes use of "syscon_regmap_lookup_by_phandle" which requires that
"syscon" be in the compatible list.
Without this patch, PCIe probe will fail with the following error:
[ 1.287467] mtk-pcie 1a143000.pcie: host bridge /pcie@1a143000 ranges:
[ 1.294019] mtk-pcie 1a143000.pcie: Parsing ranges property...
[ 1.299901] mtk-pcie 1a143000.pcie: MEM 0x0020000000..0x0027ffffff -> 0x0020000000
[ 1.307954] mtk-pcie 1a143000.pcie: missing hifsys node
[ 1.313185] mtk-pcie: probe of 1a143000.pcie failed with error -22
Fixes: 4c6e9a9943 ("kernel: bump 6.6 to 6.6.30")
Signed-off-by: Rany Hany <rany_hany@riseup.net>
This adds support for the bpi-r4 variant with internal 2.5G PHY and
additional ethernet port instead of second sfp.
Signed-off-by: Martin Schiller <ms@dev.tdt.de>
Move the common parts of the mt7988a-bananapi-bpi-r4.dts to a dtsi file.
This is done to prepare support for the 2.5G Ethernet Variant.
Signed-off-by: Martin Schiller <ms@dev.tdt.de>
No changes other than the merging itself are intended in this commit.
Signed-off-by: Rodrigo Balerdi <lanchon@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/15345
Signed-off-by: Robert Marko <robimarko@gmail.com>
Apply stylistic changes to facilitate DTS merging with WHW03 V1.
Signed-off-by: Rodrigo Balerdi <lanchon@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/15345
Signed-off-by: Robert Marko <robimarko@gmail.com>
Hardware:
=========
SOC: Qualcomm IPQ4019
WiFi 1: QCA4019 IEEE 802.11b/g/n
WiFi 2: QCA4019 IEEE 802.11a/n/ac
WiFi 3: QCA9886 IEEE 802.11a/n/ac
Bluetooth: Qualcomm CSR8510 (A10)
Zigbee: Silicon Labs EM3581 NCP + Skyworks SE2432L
Ethernet: Qualcomm Atheros QCA8072 (2-port)
Flash: Samsung KLM4G1FEPD (4GB eMMC)
RAM (NAND): 512MB
LED Controller: NXP PCA9633 (I2C)
Buttons: Single reset button (GPIO).
Ethernet:
=========
The device has 2 ethernet ports, configured as follows by default:
- left port: WAN
- right port: LAN
Wifi:
=====
The Wifi radios are turned off by default. To configure the router,
you will need to connect your computer to the LAN port of the device.
Bluetooth and Zigbee:
=====================
Configuration included but not tested.
Storage:
========
For compatibility with stock firmware, all of OpenWrt runs in a 136 MiB
eMMC partition (of which there are two copies, see below). You can also
use partition /dev/mmcblk0p19 "syscfg" (3.4 GiB) any way you see fit.
During very limited tests, stock firmware did not mount this partition.
However, backing up its stock content before use is recommended anyway.
Firmware:
=========
The device uses a dual firmware mechanism: it automatically reverts to
the previous firmware after 3 failed boot attempts.
You can switch to the inactive firmware copy by changing the "boot_part"
U-Boot environment variable. You can also do it by turning on the device
for a couple of seconds and then back off, 3 times in a row.
Installation:
=============
OpenWrt's "factory" image can be installed via the stock web UI:
1. Login to the UI. (The default password is printed on the label.)
2. Enter support mode by clicking on the "CA" link at the bottom.
3. Click "Connectivity", "Choose file", "Start", and ignore warnings.
This port is based on work done by flipy (https://github.com/flipy).
Signed-off-by: Rodrigo Balerdi <lanchon@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/15345
Signed-off-by: Robert Marko <robimarko@gmail.com>
Hardware spec:
- Rockchip RK3568 Quad-core ARM Cortex-A55 CPU 2GHz
- GPU Mali-G52 1-Core-2EE OpenGL ES3.2 Vu1kn 1.1 OpenCL 2.0
- Memory2G DDR3 SDRAM (option 4G)
- Storage Onboard 16GB eMMC Flash, Micro SD-Card slot, SATA 3.0 Port,SPI flash
- Network 5 x 10/100/1000 Mbit/s Ethernet MT7531
- Display 1 HDMI port, 2 DSI interface(1 DSI can change to LVDS by software)
- Camera 1 CSI camera interface
- Audio Output HDMI & I2S & Speaker & Headphone
- USB port USB 3.0 PORT (x2), micro USB OTG (x1)
- PCIE 1 mini pcie interface & 1 M.2 key-e interface
- Remote IR Receiver (x1)
- GPIO 40 Pin Header : GPIO (x28) and Power (+5V, +3.3V and GND).
- Switches Reset button, Power button, U-boot button
- LED Power Status
- Power Source 12 volt 2A via DC Power
Installation:
Uncompress the OpenWrt sysupgrade and write image to the SD card using dd (dd if=*.img of=/*)
Boot from the SD card
1-hold down the MaskRom button
2-Connect DC power
3-Wait 5 seconds, release the button.
eMMC Installation:
1-Uncompress the OpenWrt sysupgrade image
2-fash to eMMC
dd if=openwrt-rockchip-armv8-sinovoip_bpi-r2-pro-squashfs-sysupgrade.img of=/dev/mmcblk1
sync
3-remove SD card
reboot
Signed-off-by: Antonio Flores <antflores627@gmail.com>
Rockchip SoCs used to have a random number generator as part of their
crypto device, and support for it has to be added to the corresponding
driver.
Newer Rockchip SoCs like the RK3568 have an independent True Random
Number Generator device. Import pending patchset which adds a driver for
it, include it in Kconfig and enable it in the device tree.
Doing so significantly reduces the time needed to boot devices based on
those SoCs, from about 27 seconds until Ethernet is up and running to
less than 13 seconds with a minimal snapshot image.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Add target for Loongson LoongArch64-based boards.
LoongArch is a new RISC ISA developed by Loongson. It's a bit like
MIPS or RISC-V. LoongArch includes both 32-bit and 64-bit versions
(LoongArch32/LoongArch64).
Loongson 3A5000 and 3A6000 are the two existing CPUs of LoongArch64
and is used for PC products. It's BIOS supports ACPI and UEFI-only
boot. These CPUs supports SMP and SMT.
At present only LoongArch64 is supported by linux kernel.
Toolchain requirement:
binutils >= 2.40
gcc >= 13.1
For details, please check the following links:
https://lwn.net/Articles/861951/https://loongson.github.io/LoongArch-Documentation/README-EN.html
Signed-off-by: Weijie Gao <hackpascal@gmail.com>
This reverts commit 3fe239fcf8.
Now that we switched to Linux 6.6 this is no longer needed, and resulted
in a left-over file because it's removal was not included in the commit
removing all the other files intended for Linux 6.1.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Remove unnecessary 'if' macros for previous kernel versions.
After removing kernel 6.1 the kernel is always >= 6.6 so the conditions
are unnecessary.
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
[removed some more and also no longer include version.h]
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Remove unnecessary 'if' macros for previous kernel versions.
After removing kernel 6.1 the kernel is always >= 6.6 so the conditions
are unnecessary.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Import pending patch to fix the cmdline parsing of the "blkdevparts="
parameter which has been broken somewhen between Linux 6.1 and Linux 6.6.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Now that 6.6 is the default, remove the 6.1 config and the hack that
was required for the arm32 DTS dir change.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
AVM FRITZ!Repeater 1200 does not use QCA807x PHY at all and thus it
disables all of the individual PHY nodes, however this is not enough
anymore since the conversion to PHY package.
Now its now enough to disable the PHY-s in the package alone, but the PHY
package node itself must also be disabled.
Fixes: 1b931c33a2 ("ipq40xx: adapt to new Upstream QCA807x PHY driver")
Fixes: #15355
Link: https://github.com/openwrt/openwrt/pull/15365
Signed-off-by: Robert Marko <robimarko@gmail.com>
It appears that the CFE boot loader found in the XG6846
cannot load kernels over a certain size, and the old
relocate hack is not working.
What to do? We can build a small U-Boot into the image,
make CFE boot that, place the kernel immediately after
U-Boot, and use U-Boot to boot the system instead.
The compiled u-boot.bin becomes around ~300KB and with
LZMA compression it will swiftly fit into 128KB, so
we use two 64KB erase blocks right after the CFE to
store an imagetag:ed U-Boot.
Reviewed-by: Paul Donald <newtwen+github@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds a device tree and build options for the XG6846
switch/router to the BMIPS target.
Hardware:
- SoC: Broadcom BCM6328
- CPU: BMIPS4350 V7.5
- RAM: 64 MB DDR
- NOR Flash: 16 MB parallel (CFE and OS)
- Ethernet LAN: 4x 1Gbit
- Ethernet WAN: 2x 1Gbit, fiber and TP
- Buttons: reset
- LEDs: 7 or 8, power and USB LEDs are GPIO-based, the
LAN LEDs are controlled by the Marvell DSA Switch.
- USB: on some versions
- UART: yes
The device ODM (original device manufacturer) is XAVi
http://www.xavi.com.tw/
It is possible to boot the initramfs version
openwrt-bmips-bcm6328-inteno_xg6846-initramfs.elf from
CFE by interrupting the boot on the UART console and downloading
it from a TFTP server e.g.:
CFE> r 192.168.1.2:openwrt-bmips-bcm6328-inteno_xg6846-initramfs.elf
Installation to target flash is not possible using CFE because
the image becomes too big for the CFE version found in these
devices. A separate U-Boot two-stage solution exists for
actually booting the device.
This device is called a "managed ethernet switch" by the vendor
and "media converter" or "fiber modem" by some of the ISPs
using it: the main purpose is to convert fiber connections to
ethernet, most devices just act as switches bridging the
fiber SFP to ethernet TP.
The device has a Marvell MV88E6352 DSA switch managed by
a BCM6328 BMIPS SoC.
This port makes it possible to use the XG6846 to grab an IP
number from the fiber connection and use all four LAN
connections out, turning it into a proper router.
This support is based mostly on the observations by the people on
the forum thread "Help with Inteno XG6846" where users NPeca75,
mrhaav, systemcrash and csom helped out to reverse engineer the
device. Then I made it work on the BMIPS target, figured out
the two-level switch hierarchy and settings.
Link: https://forum.openwrt.org/t/help-with-inteno-xg6846/68276/14
Signed-off-by: Paul Donald <newtwen+github@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Since we split the Inteno XG6846 "firmware" partition with the
uImage MTD splitter, we need to compile in support for this
splitting method into the BCM6328.
Reviewed-by: Paul Donald <newtwen+github@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Commit [ca8c30208d5e][1] updates procd to handle muliple "console=" on the
kernel command line. This affects Raspberry Pi builds because cmdline.txt
specifies a UART console and a virtual console on HDMI, in that order.
When procd finds multiple consoles on the command line, it attempts to
open /dev/console. Linux uses the [last console][2] for /dev/console, so
procd opens the virtual console on Raspberry Pi. This completely disables
the UART console and causes [strange behavior][3] on the virtual console.
Prior to ca8c30208d5e, procd would always open the first console, which is
the UART console.
The simplest fix without reverting ca8c30208d5e is to swap the order of
console options in cmdline.txt. By putting the UART console last, procd
handles the serial console correctly as before.
[1]: https://git.openwrt.org/?p=project/procd.git;a=commit;h=ca8c30208d5e1aaa2c0e3f732c4c9944735e9850
[2]: https://www.kernel.org/doc/html/latest/admin-guide/serial-console.html
[3]: https://forum.openwrt.org/t/rasberry-pi-4-model-b-keyboards-gone-wild/195594
Signed-off-by: Elbert Mai <code@elbertmai.com>
Currently, the MT7530 DSA subdriver configures the MT7530 switch to provide
direct access to switch PHYs, meaning, the switch PHYs listen on the MDIO
bus the switch listens on. The PHY muxing feature makes use of this.
This is problematic as the PHY may be attached before the switch is
initialised, in which case, the PHY will fail to be attached.
Since commit 91374ba537bd ("net: dsa: mt7530: support OF-based registration
of switch MDIO bus") on mainline Linux, we can describe the switch PHYs on
the MDIO bus of the switch on the device tree.
When the PHY is described this way, the switch will be initialised first,
then the switch MDIO bus will be registered. Only after these steps, the
PHY will be attached.
Describe the switch PHYs on mt7621.dtsi and remove defining the switch PHY
on the SoC's mdio bus node. When the PHY muxing is in use, the interrupts
for the muxed PHY won't work, therefore delete the "interrupts" property on
the devices where the PHY muxing feature is in use.
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
The ethernet-phy@4 node doesn't exist for WAVLINK WL-WN573HX1. Remove it
and the duplicate gmac0 node.
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Currently, the pinctrl-0 property on the ethernet node is modified to
exclude the rgmii1 and rgmii2 pin groups to be claimed with rgmii1 and
rgmii2 functions, respectively. Remove the modification of this property as
we need these pin groups to be claimed with the said functions for this
device.
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
1. Enable this feature only for 32-bit CPUs as MIPS64 can not
access the full range unmapped uncached memory.
2. Backport this fix to the 6.1 old LTS kernel.
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
There was no config in the uboot-envtools package, so there is no
generated /etc/fw_env.config for the fw_printenv and fw_setenv utils.
Since uboot-envtools 2024.01, there is a way to make these utils work
without /etc/fw_env.config if the DT has an env partition with the prop.:
compatible = "u-boot,env";
So, this commit adds the prop. above to the appsblenv:0 partition
in the yuncore ax880 DTS file.
Signed-off-by: Isaev Ruslan <legale.legale@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/15305
Signed-off-by: Robert Marko <robimarko@gmail.com>
Turn on SoC pull-ups on I2C pins, since there are no discrete pull-up
resistors on the bus.
Increase clock to 400 kHz. Both chips on the bus support 400 kHz. I
tested the ISL28022 at 4,000 reads/sec and didn't see any garbled output
or bus hangs, even with SoC drive strength reduced to 2 for the test.
Signed-off-by: Ryan Salsbury <ryanrs@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/15334
Signed-off-by: Robert Marko <robimarko@gmail.com>
ipq60xx bootcount script include /lib/functions that produce warning
when the script is enabled on image compilation. This script is already
included by /etc/rc.common hence it's not needed.
While at it also fix the format of the switch case.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Convert the Enterasys WS-AP3710i access point to use the simpleImage
wrapper.
This is necessary, as the bootlaoder does not align the DTB correctly
(and does not support altering the FDT loadaddress). Booting images with
kernels 5.15 and later can break depending on the alignment on the DTB
within the FIT image.
Signed-off-by: David Bauer <mail@david-bauer.net>
This refreshes the configuration on top of kernel 6.6 and activates it
as test kernel configuration.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Tony Ambardar <itugrok@yahoo.com>
This is an automatically generated commit which aids following Kernel patch
history, as git will see the move and copy as a rename thus defeating the
purpose.
For the original discussion see:
https://lists.openwrt.org/pipermail/openwrt-devel/2023-October/041673.html
Signed-off-by: Tony Ambardar <itugrok@yahoo.com>
Despite coming with multiple I2C EEPROMs supposedly dedicated for that
purpose, the BPi-R4 does not seem to have factory assigned MAC addresses.
Hence, just like for all other BPi boards, store a randomly generated
MAC address on first boot and derive WAN and Wi-Fi MAC addresses from
that as well. Not perfect, but better than random on every boot.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Allow selecting 6.1 as testing kernel on zynq.
Tested-by: Luis Araneda <luaraneda@gmail.com> # Zybo Z7-20
Signed-off-by: Nick Hainke <vincent@systemli.org>
This is an automatically generated commit which aids following Kernel patch history,
as git will see the move and copy as a rename thus defeating the purpose.
See: https://lists.openwrt.org/pipermail/openwrt-devel/2023-October/041673.html
for the original discussion.
Signed-off-by: Nick Hainke <vincent@systemli.org>
For this particualar device we get random MAC's for Wifi on each (re-)boot.
This is because art partition/pre caldata do not contain valid MAC addresses.
As we have now a new/better approach with ath11k_patch_mac we can use it for
this device too.
I'm using this approach for like two weeks and its working flawlessly.
Signed-off-by: Ulrich Stark <pwned-pixel@posteo.de>
qualcommax: IPQ807x: ZyXEL NBG7815: Fix random Wifi MAC
Changing order to 3/phy0/5G-1, 2/phy1/2G, 4/phy2/5G-2.
Signed-off-by: Ulrich Stark <pwned-pixel@posteo.de>
Enable USB 3.0 controller, disable USB 2.0 controller.
The USB 2.0 port on the AP-303H is actually connected to the USB 3.0
controller's HS phy. Enable the HS phy only, since the SS lanes are not
brought out to the connector.
Signed-off-by: Ryan Salsbury <ryanrs@gmail.com>
Use NVMEM to assign "factory sticker" MAC address to WAN ethernet
interface. Set LAN address to sticker + 1.
Signed-off-by: Ryan Salsbury <ryanrs@gmail.com>
Importing pending patch "net: dsa: mt7530: move MT753X_MTRAP operations
for MT7530" broke WAN connectivity on most MT7621 which use PHY-muxing
to hook up either port 0 or port 4 to GMAC1.
Remove it for now until the author submits a fixed version.
Fixes: https://github.com/openwrt/openwrt/issues/15279
Fixes: https://github.com/openwrt/openwrt/issues/15273
Fixes: d40691a5fb ("generic: 6.1, 6.6: mt7530: import pending patches")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
The backports introduced in commit d40756563c ("kernel: backport
phylink changes from mainline Linux") broke the mv88e6xxx DSA driver.
A backport to fix this was added to the kirkwood target, but as it is
used in multiple targets, and there's a kmod package for it, the fix
should be in generic backports.
This fixes the switch on the WatchGuard Firebox M300 when running the
6.1 testing kernel.
There is no need to backport the fix for the 6.6 kernel, as it was
included in 6.6.5.
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
Set DEVICE_DTS_DIR to /qcom by default instead of limiting it to
TESTING_KERNEL since we moved 6.6 to default version.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Set DEVICE_DTS_DIR to /qcom by default instead of limiting it to
TESTING_KERNEL since we moved 6.6 to default version.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
For packets not belonging to a local socket, use fraglist GRO instead of
regular GRO. This make segmenting packets very cheap and avoids the need for
selectively disabling GRO
Signed-off-by: Felix Fietkau <nbd@nbd.name>
For the ARM arch on 6.6, DTS files are moved into their vendor directories,
mimicking arm64. Reflect this in the image Makefile.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
This is an automatically generated commit which aids following Kernel patch history,
as git will see the move and copy as a rename thus defeating the purpose.
See: https://lists.openwrt.org/pipermail/openwrt-devel/2023-October/041673.html
for the original discussion.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
Now that 6.6 is the default, remove the 6.1 config and the hack that
was required for the arm32 DTS dir change.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
In commit 6a8b831593 ("mpc85xx: p1010: change wrapper address of
simple image devices"), we adjusted the wrapper address in the recipe
code for all mpc85xx simpleimage devices, including the Extreme
Networks WS-AP3825i. However, we did not also adjust the
KERNEL_LOADADDR and KERNEL_ENTRY config values for this board. This
broke the simpleimage wrapper loader, causing GitHub issue #15237.
Adjust those config values so we go back to pointing at the right
address. We don't exactly need the memory, but it's also not exactly a
punishment in this case.
Run-tested on a ws-ap3825i.
Fixes: commit 6a8b831593 ("mpc85xx: p1010: change wrapper address of
simple image devices")
Tested-by: Martin Kennedy <hurricos@gmail.com>
Signed-off-by: Martin Kennedy <hurricos@gmail.com>
The compatible string for the MediaTek MT7988 SoC ended up being
'mediatek,mt7988a' instead of 'mediatek,mt7988' in the now upstream
dtsi. Adapt the cpufreq driver so support for frequency scaling is
again usable.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
net: dsa: mt7530: explain exposing MDIO bus of MT7531AE better
net: dsa: mt7530: do not pass port variable to mt7531_rgmii_setup()
net: dsa: mt7530: use priv->ds->num_ports instead of MT7530_NUM_PORTS
net: dsa: mt7530: get rid of mac_port_validate member of mt753x_info
net: dsa: mt7530: refactor MT7530_PMEEECR_P()
net: dsa: mt7530: get rid of function sanity check
net: dsa: mt7530: define MAC speed capabilities per switch model
net: dsa: mt7530: return mt7530_setup_mdio & mt7531_setup_common on error
net: dsa: mt7530: move MT753X_MTRAP operations for MT7530
net: dsa: mt7530: refactor MT7530_HWTRAP and MT7530_MHWTRAP
net: dsa: mt7530: refactor MT7530_MFC and MT7531_CFC, add MT7531_QRY_FFP
net: dsa: mt7530: rename mt753x_bpdu_port_fw enum to mt753x_to_cpu_fw
net: dsa: mt7530: rename p5_intf_sel and use only for MT7530 switch
net: dsa: mt7530: refactor MT7530_PMCR_P()
net: dsa: mt7530: disable EEE abilities on failure on MT7531 and MT7988
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Import patches for the MT7530 DSA driver from net-next tree:
cae425cb43fe net: dsa: allow DSA switch drivers to provide their own phylink mac ops
dd0c9855b413 net: dsa: introduce dsa_phylink_to_port()
7c5e37d7ee78 net: dsa: mt7530: simplify core operations
868ff5f4944a net: dsa: mt7530-mdio: read PHY address of switch from device tree
2c606d138518 net: dsa: mt7530: fix port mirroring for MT7988 SoC switch
d59cf049c837 net: dsa: mt7530: fix mirroring frames received on local port
62d6d91db98a net: dsa: mt7530: provide own phylink MAC operations
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
For all boards currently working with the mt7530 DSA driver we can
be sure that the address of the switch on the MDIO bus is 31 --
simply because that address is hard-coded in the driver and the
address from the Device Tree is being ignore.
An upcoming patch will add support for MT753x ICs which are programmed
to addresses different from 0x1f using bootstrap pins. As a result the
address from the Device Tree will then be taken into account, which
will break currently working boards which got the address set to
anything else than 31.
While at it also unify the syntax in Device Tree to always us a decimal
value for the 'reg' property.
* mt7622-buffalo-wsr-3200ax4s.dts
Cosmetic change 'reg = <0x1f>' -> 'reg = <31>'
* mt7622-dlink-eagle-pro-ai-ax3200-a1.dtsi
Wrong address: 0 -> 31
* mt7622-elecom-wrc-x3200gst3.dts
Wrong address: 0 -> 31
* mt7622-linksys-e8450.dtsi
Wrong address: 0 -> 31
* mt7622-ruijie-rg-ew3200.dtsi
Wrong address: 0 -> 31
* mt7622-xiaomi-redmi-router-ax6s.dts
Wrong address: 0 -> 31
* mt7629-iptime-a6004mx.dts
Wrong address: 2 -> 31
* mt7981b-zbtlink-zbt-z8102ax.dts
Cosmetic change 'reg = <0x1f>' -> 'reg = <31>'
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
The Upstream Linux community has discontinued support for the target.
Maintaining support for it downstream would require too much effort.
Moreover, it seems that the supported hardware is no longer deemed worthy
of it.
Signed-off-by: Nick Hainke <vincent@systemli.org>
Use 'mediatek,mt7988a' instead of 'mediatek,mt7988' as compatible
string to be in-sync with upstream and no longer break the cpufreq
driver which was also kept in sync with upstream.
Fixes: 56dd6b473b ("mediatek: sync cpufreq support with changed compatible string")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Kernel 6.6 checks for orphan sections and prints a warning about them,
which in turn will make CI fails as we have Werror enabled there.
Issue is that cache-v7-min.S produces .init.text section which is an
orphan section since it is not being handled by the vmlinux.lds.S linker
script.
So, lets put the generated .init.text section under .text.
Fixes: f0d8ce4f48 ("bcm53xx: add testing support for kernel 6.6")
Signed-off-by: Robert Marko <robimarko@gmail.com>
