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generic: v6.1, v6.6: add patch to fix PHY-muxing on MT7530
Move accepted patches to backport folder, re-add previously removed patch which caused havoc on MT7621 and add the (still pending) fix. Fixes: d40691a5fb ("generic: 6.1, 6.6: mt7530: import pending patches") Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This commit is contained in:
parent
db89030cb2
commit
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@ -0,0 +1,117 @@
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From 2982f395c9a513b168f1e685588f70013cba2f5f Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
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Date: Mon, 22 Apr 2024 10:15:14 +0300
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Subject: [PATCH 07/15] net: dsa: mt7530: move MT753X_MTRAP operations for
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MT7530
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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On MT7530, the media-independent interfaces of port 5 and 6 are controlled
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by the MT7530_P5_DIS and MT7530_P6_DIS bits of the hardware trap. Deal with
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these bits only when the relevant port is being enabled or disabled. This
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ensures that these ports will be disabled when they are not in use.
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Do not set MT7530_CHG_TRAP on mt7530_setup_port5() as that's already being
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done on mt7530_setup().
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Instead of globally setting MT7530_P5_MAC_SEL, clear it, then set it only
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on the appropriate case.
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If PHY muxing is detected, clear MT7530_P5_DIS before calling
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mt7530_setup_port5().
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Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
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---
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drivers/net/dsa/mt7530.c | 38 +++++++++++++++++++++++++++-----------
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1 file changed, 27 insertions(+), 11 deletions(-)
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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@@ -873,8 +873,7 @@ static void mt7530_setup_port5(struct ds
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val = mt7530_read(priv, MT753X_MTRAP);
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- val |= MT7530_CHG_TRAP | MT7530_P5_MAC_SEL | MT7530_P5_DIS;
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- val &= ~MT7530_P5_RGMII_MODE & ~MT7530_P5_PHY0_SEL;
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+ val &= ~MT7530_P5_PHY0_SEL & ~MT7530_P5_MAC_SEL & ~MT7530_P5_RGMII_MODE;
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switch (priv->p5_mode) {
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/* MUX_PHY_P0: P0 -> P5 -> SoC MAC */
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@@ -884,15 +883,13 @@ static void mt7530_setup_port5(struct ds
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/* MUX_PHY_P4: P4 -> P5 -> SoC MAC */
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case MUX_PHY_P4:
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- val &= ~MT7530_P5_MAC_SEL & ~MT7530_P5_DIS;
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-
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/* Setup the MAC by default for the cpu port */
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mt7530_write(priv, MT753X_PMCR_P(5), 0x56300);
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break;
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/* GMAC5: P5 -> SoC MAC or external PHY */
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default:
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- val &= ~MT7530_P5_DIS;
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+ val |= MT7530_P5_MAC_SEL;
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break;
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}
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@@ -1186,6 +1183,14 @@ mt7530_port_enable(struct dsa_switch *ds
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mutex_unlock(&priv->reg_mutex);
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+ if (priv->id != ID_MT7530 && priv->id != ID_MT7621)
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+ return 0;
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+
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+ if (port == 5)
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+ mt7530_clear(priv, MT753X_MTRAP, MT7530_P5_DIS);
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+ else if (port == 6)
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+ mt7530_clear(priv, MT753X_MTRAP, MT7530_P6_DIS);
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+
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return 0;
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}
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@@ -1204,6 +1209,14 @@ mt7530_port_disable(struct dsa_switch *d
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PCR_MATRIX_CLR);
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mutex_unlock(&priv->reg_mutex);
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+
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+ if (priv->id != ID_MT7530 && priv->id != ID_MT7621)
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+ return;
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+
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+ if (port == 5)
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+ mt7530_set(priv, MT753X_MTRAP, MT7530_P5_DIS);
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+ else if (port == 6)
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+ mt7530_set(priv, MT753X_MTRAP, MT7530_P6_DIS);
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}
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static int
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@@ -2392,11 +2405,11 @@ mt7530_setup(struct dsa_switch *ds)
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mt7530_rmw(priv, MT7530_TRGMII_RD(i),
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RD_TAP_MASK, RD_TAP(16));
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- /* Enable port 6 */
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- val = mt7530_read(priv, MT753X_MTRAP);
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- val &= ~MT7530_P6_DIS & ~MT7530_PHY_INDIRECT_ACCESS;
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- val |= MT7530_CHG_TRAP;
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- mt7530_write(priv, MT753X_MTRAP, val);
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+ /* Allow modifying the trap and directly access PHY registers via the
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+ * MDIO bus the switch is on.
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+ */
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+ mt7530_rmw(priv, MT753X_MTRAP, MT7530_CHG_TRAP |
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+ MT7530_PHY_INDIRECT_ACCESS, MT7530_CHG_TRAP);
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if ((val & MT7530_XTAL_MASK) == MT7530_XTAL_40MHZ)
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mt7530_pll_setup(priv);
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@@ -2479,8 +2492,11 @@ mt7530_setup(struct dsa_switch *ds)
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break;
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}
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- if (priv->p5_mode == MUX_PHY_P0 || priv->p5_mode == MUX_PHY_P4)
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+ if (priv->p5_mode == MUX_PHY_P0 ||
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+ priv->p5_mode == MUX_PHY_P4) {
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+ mt7530_clear(priv, MT753X_MTRAP, MT7530_P5_DIS);
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mt7530_setup_port5(ds, interface);
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+ }
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}
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#ifdef CONFIG_GPIOLIB
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@ -17,7 +17,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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@@ -2642,7 +2642,9 @@ mt7531_setup(struct dsa_switch *ds)
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@@ -2658,7 +2658,9 @@ mt7531_setup(struct dsa_switch *ds)
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0);
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}
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@ -28,7 +28,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
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/* Setup VLAN ID 0 for VLAN-unaware bridges */
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ret = mt7530_setup_vlan0(priv);
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@@ -3001,6 +3003,8 @@ mt753x_setup(struct dsa_switch *ds)
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@@ -3017,6 +3019,8 @@ mt753x_setup(struct dsa_switch *ds)
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ret = mt7530_setup_mdio(priv);
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if (ret && priv->irq)
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mt7530_free_irq_common(priv);
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@ -24,7 +24,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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@@ -2660,6 +2660,8 @@ mt7531_setup(struct dsa_switch *ds)
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@@ -2676,6 +2676,8 @@ mt7531_setup(struct dsa_switch *ds)
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static void mt7530_mac_port_get_caps(struct dsa_switch *ds, int port,
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struct phylink_config *config)
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{
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@ -33,7 +33,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
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switch (port) {
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/* Ports which are connected to switch PHYs. There is no MII pinout. */
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case 0 ... 4:
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@@ -2691,6 +2693,8 @@ static void mt7531_mac_port_get_caps(str
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@@ -2707,6 +2709,8 @@ static void mt7531_mac_port_get_caps(str
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{
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struct mt7530_priv *priv = ds->priv;
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@ -42,7 +42,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
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switch (port) {
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/* Ports which are connected to switch PHYs. There is no MII pinout. */
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case 0 ... 4:
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@@ -2730,14 +2734,17 @@ static void mt7988_mac_port_get_caps(str
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@@ -2746,14 +2750,17 @@ static void mt7988_mac_port_get_caps(str
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case 0 ... 3:
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__set_bit(PHY_INTERFACE_MODE_INTERNAL,
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config->supported_interfaces);
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@ -62,7 +62,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
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}
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}
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@@ -2907,9 +2914,7 @@ static void mt753x_phylink_get_caps(stru
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@@ -2923,9 +2930,7 @@ static void mt753x_phylink_get_caps(stru
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{
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struct mt7530_priv *priv = ds->priv;
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@ -17,7 +17,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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@@ -3204,13 +3204,6 @@ mt7530_probe_common(struct mt7530_priv *
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@@ -3220,13 +3220,6 @@ mt7530_probe_common(struct mt7530_priv *
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if (!priv->info)
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return -EINVAL;
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@ -19,7 +19,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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@@ -3035,10 +3035,10 @@ static int mt753x_get_mac_eee(struct dsa
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@@ -3048,10 +3048,10 @@ static int mt753x_get_mac_eee(struct dsa
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struct ethtool_eee *e)
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{
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struct mt7530_priv *priv = ds->priv;
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@ -32,7 +32,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
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return 0;
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}
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@@ -3052,11 +3052,11 @@ static int mt753x_set_mac_eee(struct dsa
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@@ -3065,11 +3065,11 @@ static int mt753x_set_mac_eee(struct dsa
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if (e->tx_lpi_timer > 0xFFF)
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return -EINVAL;
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@ -19,7 +19,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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@@ -1398,7 +1398,7 @@ mt7530_port_set_vlan_unaware(struct dsa_
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@@ -1404,7 +1404,7 @@ mt7530_port_set_vlan_unaware(struct dsa_
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mt7530_rmw(priv, MT7530_PPBV1_P(port), G0_PORT_VID_MASK,
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G0_PORT_VID_DEF);
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@ -28,7 +28,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
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if (dsa_is_user_port(ds, i) &&
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dsa_port_is_vlan_filtering(dsa_to_port(ds, i))) {
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all_user_ports_removed = false;
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@@ -2415,7 +2415,7 @@ mt7530_setup(struct dsa_switch *ds)
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@@ -2419,7 +2419,7 @@ mt7530_setup(struct dsa_switch *ds)
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/* Enable and reset MIB counters */
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mt7530_mib_reset(ds);
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@ -37,7 +37,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
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/* Clear link settings and enable force mode to force link down
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* on all ports until they're enabled later.
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*/
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@@ -2523,7 +2523,7 @@ mt7531_setup_common(struct dsa_switch *d
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@@ -2530,7 +2530,7 @@ mt7531_setup_common(struct dsa_switch *d
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mt7530_clear(priv, MT753X_MFC, BC_FFP_MASK | UNM_FFP_MASK |
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UNU_FFP_MASK);
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@ -46,7 +46,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
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/* Clear link settings and enable force mode to force link down
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* on all ports until they're enabled later.
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*/
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@@ -2610,7 +2610,7 @@ mt7531_setup(struct dsa_switch *ds)
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@@ -2617,7 +2617,7 @@ mt7531_setup(struct dsa_switch *ds)
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priv->p5_sgmii = !!(val & PAD_DUAL_SGMII_EN);
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/* Force link down on all ports before internal reset */
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@ -17,7 +17,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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@@ -2760,7 +2760,7 @@ mt7530_mac_config(struct dsa_switch *ds,
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@@ -2776,7 +2776,7 @@ mt7530_mac_config(struct dsa_switch *ds,
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mt7530_setup_port6(priv->ds, interface);
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}
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@ -26,7 +26,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
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phy_interface_t interface,
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struct phy_device *phydev)
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{
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@@ -2811,7 +2811,7 @@ mt7531_mac_config(struct dsa_switch *ds,
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@@ -2827,7 +2827,7 @@ mt7531_mac_config(struct dsa_switch *ds,
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if (phy_interface_mode_is_rgmii(interface)) {
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dp = dsa_to_port(ds, port);
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phydev = dp->slave->phydev;
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@ -19,7 +19,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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@@ -2610,7 +2610,10 @@ mt7531_setup(struct dsa_switch *ds)
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@@ -2626,7 +2626,10 @@ mt7531_setup(struct dsa_switch *ds)
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if (!priv->p5_sgmii) {
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mt7531_pll_setup(priv);
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} else {
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@ -0,0 +1,117 @@
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From 2982f395c9a513b168f1e685588f70013cba2f5f Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
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Date: Mon, 22 Apr 2024 10:15:14 +0300
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Subject: [PATCH 07/15] net: dsa: mt7530: move MT753X_MTRAP operations for
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MT7530
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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On MT7530, the media-independent interfaces of port 5 and 6 are controlled
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by the MT7530_P5_DIS and MT7530_P6_DIS bits of the hardware trap. Deal with
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these bits only when the relevant port is being enabled or disabled. This
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ensures that these ports will be disabled when they are not in use.
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Do not set MT7530_CHG_TRAP on mt7530_setup_port5() as that's already being
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done on mt7530_setup().
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Instead of globally setting MT7530_P5_MAC_SEL, clear it, then set it only
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on the appropriate case.
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If PHY muxing is detected, clear MT7530_P5_DIS before calling
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mt7530_setup_port5().
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Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
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---
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drivers/net/dsa/mt7530.c | 38 +++++++++++++++++++++++++++-----------
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1 file changed, 27 insertions(+), 11 deletions(-)
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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@@ -880,8 +880,7 @@ static void mt7530_setup_port5(struct ds
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val = mt7530_read(priv, MT753X_MTRAP);
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- val |= MT7530_CHG_TRAP | MT7530_P5_MAC_SEL | MT7530_P5_DIS;
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- val &= ~MT7530_P5_RGMII_MODE & ~MT7530_P5_PHY0_SEL;
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+ val &= ~MT7530_P5_PHY0_SEL & ~MT7530_P5_MAC_SEL & ~MT7530_P5_RGMII_MODE;
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switch (priv->p5_mode) {
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/* MUX_PHY_P0: P0 -> P5 -> SoC MAC */
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@@ -891,15 +890,13 @@ static void mt7530_setup_port5(struct ds
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/* MUX_PHY_P4: P4 -> P5 -> SoC MAC */
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case MUX_PHY_P4:
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- val &= ~MT7530_P5_MAC_SEL & ~MT7530_P5_DIS;
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-
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/* Setup the MAC by default for the cpu port */
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mt7530_write(priv, MT753X_PMCR_P(5), 0x56300);
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break;
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/* GMAC5: P5 -> SoC MAC or external PHY */
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default:
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- val &= ~MT7530_P5_DIS;
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+ val |= MT7530_P5_MAC_SEL;
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break;
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}
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@@ -1193,6 +1190,14 @@ mt7530_port_enable(struct dsa_switch *ds
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mutex_unlock(&priv->reg_mutex);
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+ if (priv->id != ID_MT7530 && priv->id != ID_MT7621)
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+ return 0;
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+
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+ if (port == 5)
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+ mt7530_clear(priv, MT753X_MTRAP, MT7530_P5_DIS);
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+ else if (port == 6)
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+ mt7530_clear(priv, MT753X_MTRAP, MT7530_P6_DIS);
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+
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return 0;
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}
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@@ -1211,6 +1216,14 @@ mt7530_port_disable(struct dsa_switch *d
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PCR_MATRIX_CLR);
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mutex_unlock(&priv->reg_mutex);
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+
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+ if (priv->id != ID_MT7530 && priv->id != ID_MT7621)
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+ return;
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+
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+ if (port == 5)
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+ mt7530_set(priv, MT753X_MTRAP, MT7530_P5_DIS);
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+ else if (port == 6)
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+ mt7530_set(priv, MT753X_MTRAP, MT7530_P6_DIS);
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}
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static int
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@@ -2401,11 +2414,11 @@ mt7530_setup(struct dsa_switch *ds)
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mt7530_rmw(priv, MT7530_TRGMII_RD(i),
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RD_TAP_MASK, RD_TAP(16));
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- /* Enable port 6 */
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- val = mt7530_read(priv, MT753X_MTRAP);
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- val &= ~MT7530_P6_DIS & ~MT7530_PHY_INDIRECT_ACCESS;
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- val |= MT7530_CHG_TRAP;
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- mt7530_write(priv, MT753X_MTRAP, val);
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+ /* Allow modifying the trap and directly access PHY registers via the
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+ * MDIO bus the switch is on.
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+ */
|
||||
+ mt7530_rmw(priv, MT753X_MTRAP, MT7530_CHG_TRAP |
|
||||
+ MT7530_PHY_INDIRECT_ACCESS, MT7530_CHG_TRAP);
|
||||
|
||||
if ((val & MT7530_XTAL_MASK) == MT7530_XTAL_40MHZ)
|
||||
mt7530_pll_setup(priv);
|
||||
@@ -2488,8 +2501,11 @@ mt7530_setup(struct dsa_switch *ds)
|
||||
break;
|
||||
}
|
||||
|
||||
- if (priv->p5_mode == MUX_PHY_P0 || priv->p5_mode == MUX_PHY_P4)
|
||||
+ if (priv->p5_mode == MUX_PHY_P0 ||
|
||||
+ priv->p5_mode == MUX_PHY_P4) {
|
||||
+ mt7530_clear(priv, MT753X_MTRAP, MT7530_P5_DIS);
|
||||
mt7530_setup_port5(ds, interface);
|
||||
+ }
|
||||
}
|
||||
|
||||
#ifdef CONFIG_GPIOLIB
|
@ -17,7 +17,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
|
||||
|
||||
--- a/drivers/net/dsa/mt7530.c
|
||||
+++ b/drivers/net/dsa/mt7530.c
|
||||
@@ -2651,7 +2651,9 @@ mt7531_setup(struct dsa_switch *ds)
|
||||
@@ -2667,7 +2667,9 @@ mt7531_setup(struct dsa_switch *ds)
|
||||
0);
|
||||
}
|
||||
|
||||
@ -28,7 +28,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
|
||||
|
||||
/* Setup VLAN ID 0 for VLAN-unaware bridges */
|
||||
ret = mt7530_setup_vlan0(priv);
|
||||
@@ -3004,6 +3006,8 @@ mt753x_setup(struct dsa_switch *ds)
|
||||
@@ -3020,6 +3022,8 @@ mt753x_setup(struct dsa_switch *ds)
|
||||
ret = mt7530_setup_mdio(priv);
|
||||
if (ret && priv->irq)
|
||||
mt7530_free_irq_common(priv);
|
@ -24,7 +24,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
|
||||
|
||||
--- a/drivers/net/dsa/mt7530.c
|
||||
+++ b/drivers/net/dsa/mt7530.c
|
||||
@@ -2669,6 +2669,8 @@ mt7531_setup(struct dsa_switch *ds)
|
||||
@@ -2685,6 +2685,8 @@ mt7531_setup(struct dsa_switch *ds)
|
||||
static void mt7530_mac_port_get_caps(struct dsa_switch *ds, int port,
|
||||
struct phylink_config *config)
|
||||
{
|
||||
@ -33,7 +33,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
|
||||
switch (port) {
|
||||
/* Ports which are connected to switch PHYs. There is no MII pinout. */
|
||||
case 0 ... 4:
|
||||
@@ -2700,6 +2702,8 @@ static void mt7531_mac_port_get_caps(str
|
||||
@@ -2716,6 +2718,8 @@ static void mt7531_mac_port_get_caps(str
|
||||
{
|
||||
struct mt7530_priv *priv = ds->priv;
|
||||
|
||||
@ -42,7 +42,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
|
||||
switch (port) {
|
||||
/* Ports which are connected to switch PHYs. There is no MII pinout. */
|
||||
case 0 ... 4:
|
||||
@@ -2739,14 +2743,17 @@ static void mt7988_mac_port_get_caps(str
|
||||
@@ -2755,14 +2759,17 @@ static void mt7988_mac_port_get_caps(str
|
||||
case 0 ... 3:
|
||||
__set_bit(PHY_INTERFACE_MODE_INTERNAL,
|
||||
config->supported_interfaces);
|
||||
@ -62,7 +62,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
|
||||
}
|
||||
}
|
||||
|
||||
@@ -2916,9 +2923,7 @@ static void mt753x_phylink_get_caps(stru
|
||||
@@ -2932,9 +2939,7 @@ static void mt753x_phylink_get_caps(stru
|
||||
{
|
||||
struct mt7530_priv *priv = ds->priv;
|
||||
|
@ -17,7 +17,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
|
||||
|
||||
--- a/drivers/net/dsa/mt7530.c
|
||||
+++ b/drivers/net/dsa/mt7530.c
|
||||
@@ -3216,13 +3216,6 @@ mt7530_probe_common(struct mt7530_priv *
|
||||
@@ -3232,13 +3232,6 @@ mt7530_probe_common(struct mt7530_priv *
|
||||
if (!priv->info)
|
||||
return -EINVAL;
|
||||
|
@ -19,7 +19,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
|
||||
|
||||
--- a/drivers/net/dsa/mt7530.c
|
||||
+++ b/drivers/net/dsa/mt7530.c
|
||||
@@ -3032,10 +3032,10 @@ static int mt753x_get_mac_eee(struct dsa
|
||||
@@ -3051,10 +3051,10 @@ static int mt753x_get_mac_eee(struct dsa
|
||||
struct ethtool_eee *e)
|
||||
{
|
||||
struct mt7530_priv *priv = ds->priv;
|
||||
@ -32,7 +32,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -3049,11 +3049,11 @@ static int mt753x_set_mac_eee(struct dsa
|
||||
@@ -3068,11 +3068,11 @@ static int mt753x_set_mac_eee(struct dsa
|
||||
if (e->tx_lpi_timer > 0xFFF)
|
||||
return -EINVAL;
|
||||
|
@ -19,7 +19,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
|
||||
|
||||
--- a/drivers/net/dsa/mt7530.c
|
||||
+++ b/drivers/net/dsa/mt7530.c
|
||||
@@ -1391,7 +1391,7 @@ mt7530_port_set_vlan_unaware(struct dsa_
|
||||
@@ -1411,7 +1411,7 @@ mt7530_port_set_vlan_unaware(struct dsa_
|
||||
mt7530_rmw(priv, MT7530_PPBV1_P(port), G0_PORT_VID_MASK,
|
||||
G0_PORT_VID_DEF);
|
||||
|
||||
@ -28,7 +28,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
|
||||
if (dsa_is_user_port(ds, i) &&
|
||||
dsa_port_is_vlan_filtering(dsa_to_port(ds, i))) {
|
||||
all_user_ports_removed = false;
|
||||
@@ -2406,7 +2406,7 @@ mt7530_setup(struct dsa_switch *ds)
|
||||
@@ -2428,7 +2428,7 @@ mt7530_setup(struct dsa_switch *ds)
|
||||
/* Enable and reset MIB counters */
|
||||
mt7530_mib_reset(ds);
|
||||
|
||||
@ -37,7 +37,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
|
||||
/* Clear link settings and enable force mode to force link down
|
||||
* on all ports until they're enabled later.
|
||||
*/
|
||||
@@ -2514,7 +2514,7 @@ mt7531_setup_common(struct dsa_switch *d
|
||||
@@ -2539,7 +2539,7 @@ mt7531_setup_common(struct dsa_switch *d
|
||||
mt7530_clear(priv, MT753X_MFC, BC_FFP_MASK | UNM_FFP_MASK |
|
||||
UNU_FFP_MASK);
|
||||
|
||||
@ -46,7 +46,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
|
||||
/* Clear link settings and enable force mode to force link down
|
||||
* on all ports until they're enabled later.
|
||||
*/
|
||||
@@ -2601,7 +2601,7 @@ mt7531_setup(struct dsa_switch *ds)
|
||||
@@ -2626,7 +2626,7 @@ mt7531_setup(struct dsa_switch *ds)
|
||||
priv->p5_sgmii = !!(val & PAD_DUAL_SGMII_EN);
|
||||
|
||||
/* Force link down on all ports before internal reset */
|
@ -17,7 +17,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
|
||||
|
||||
--- a/drivers/net/dsa/mt7530.c
|
||||
+++ b/drivers/net/dsa/mt7530.c
|
||||
@@ -2769,7 +2769,7 @@ mt7530_mac_config(struct dsa_switch *ds,
|
||||
@@ -2785,7 +2785,7 @@ mt7530_mac_config(struct dsa_switch *ds,
|
||||
mt7530_setup_port6(priv->ds, interface);
|
||||
}
|
||||
|
||||
@ -26,7 +26,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
|
||||
phy_interface_t interface,
|
||||
struct phy_device *phydev)
|
||||
{
|
||||
@@ -2820,7 +2820,7 @@ mt7531_mac_config(struct dsa_switch *ds,
|
||||
@@ -2836,7 +2836,7 @@ mt7531_mac_config(struct dsa_switch *ds,
|
||||
if (phy_interface_mode_is_rgmii(interface)) {
|
||||
dp = dsa_to_port(ds, port);
|
||||
phydev = dp->slave->phydev;
|
@ -19,7 +19,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
|
||||
|
||||
--- a/drivers/net/dsa/mt7530.c
|
||||
+++ b/drivers/net/dsa/mt7530.c
|
||||
@@ -2619,7 +2619,10 @@ mt7531_setup(struct dsa_switch *ds)
|
||||
@@ -2635,7 +2635,10 @@ mt7531_setup(struct dsa_switch *ds)
|
||||
if (!priv->p5_sgmii) {
|
||||
mt7531_pll_setup(priv);
|
||||
} else {
|
@ -0,0 +1,79 @@
|
||||
From patchwork Sat Apr 27 11:24:42 2024
|
||||
Content-Type: text/plain; charset="utf-8"
|
||||
MIME-Version: 1.0
|
||||
Content-Transfer-Encoding: 8bit
|
||||
X-Patchwork-Submitter: =?utf-8?b?QXLEsW7DpyDDnE5BTCB2aWEgQjQgUmVsYXk=?=
|
||||
<devnull+arinc.unal.arinc9.com@kernel.org>
|
||||
X-Patchwork-Id: 13645655
|
||||
From: =?utf-8?b?QXLEsW7DpyDDnE5BTCB2aWEgQjQgUmVsYXk=?=
|
||||
<devnull+arinc.unal.arinc9.com@kernel.org>
|
||||
Date: Sat, 27 Apr 2024 14:24:42 +0300
|
||||
Subject: [PATCH net-next] net: dsa: mt7530: do not set MT7530_P5_DIS when
|
||||
PHY muxing is being used
|
||||
Precedence: bulk
|
||||
X-Mailing-List: netdev@vger.kernel.org
|
||||
List-Id: <netdev.vger.kernel.org>
|
||||
List-Subscribe: <mailto:netdev+subscribe@vger.kernel.org>
|
||||
List-Unsubscribe: <mailto:netdev+unsubscribe@vger.kernel.org>
|
||||
MIME-Version: 1.0
|
||||
Message-Id:
|
||||
<20240427-for-netnext-mt7530-do-not-disable-port5-when-phy-muxing-v1-1-793cdf9d7707@arinc9.com>
|
||||
To: Daniel Golle <daniel@makrotopia.org>, DENG Qingfang <dqfext@gmail.com>,
|
||||
Sean Wang <sean.wang@mediatek.com>, Andrew Lunn <andrew@lunn.ch>,
|
||||
Florian Fainelli <f.fainelli@gmail.com>,
|
||||
Vladimir Oltean <olteanv@gmail.com>,
|
||||
"David S. Miller" <davem@davemloft.net>, Eric Dumazet <edumazet@google.com>,
|
||||
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
|
||||
Matthias Brugger <matthias.bgg@gmail.com>,
|
||||
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
|
||||
Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
|
||||
linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org,
|
||||
=?utf-8?b?QXLEsW7DpyDDnE5BTA==?= <arinc.unal@arinc9.com>
|
||||
X-Mailer: b4 0.13.0
|
||||
X-Patchwork-Delegate: kuba@kernel.org
|
||||
|
||||
From: Arınç ÜNAL <arinc.unal@arinc9.com>
|
||||
|
||||
When the PHY muxing feature is in use, port 5 won't be defined in the
|
||||
device tree. Because of this, the type member of the dsa_port structure for
|
||||
this port will be assigned DSA_PORT_TYPE_UNUSED. The dsa_port_setup()
|
||||
function calls ds->ops->port_disable() when the port type is
|
||||
DSA_PORT_TYPE_UNUSED.
|
||||
|
||||
The MT7530_P5_DIS bit is unset when PHY muxing is being used.
|
||||
mt7530_port_disable() which is assigned to ds->ops->port_disable() is
|
||||
called afterwards. Currently, mt7530_port_disable() sets MT7530_P5_DIS
|
||||
which breaks network connectivity when PHY muxing is being used.
|
||||
|
||||
Therefore, do not set MT7530_P5_DIS when PHY muxing is being used.
|
||||
|
||||
Fixes: 377174c5760c ("net: dsa: mt7530: move MT753X_MTRAP operations for MT7530")
|
||||
Reported-by: Daniel Golle <daniel@makrotopia.org>
|
||||
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
|
||||
---
|
||||
Hello.
|
||||
|
||||
I've sent this to net-next as the patch it fixes is on the current
|
||||
development cycle.
|
||||
---
|
||||
drivers/net/dsa/mt7530.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
|
||||
---
|
||||
base-commit: 5c4c0edca68a5841a8d53ccd49596fe199c8334c
|
||||
change-id: 20240427-for-netnext-mt7530-do-not-disable-port5-when-phy-muxing-7ff5fd0995d7
|
||||
|
||||
Best regards,
|
||||
|
||||
--- a/drivers/net/dsa/mt7530.c
|
||||
+++ b/drivers/net/dsa/mt7530.c
|
||||
@@ -1213,7 +1213,7 @@ mt7530_port_disable(struct dsa_switch *d
|
||||
if (priv->id != ID_MT7530 && priv->id != ID_MT7621)
|
||||
return;
|
||||
|
||||
- if (port == 5)
|
||||
+ if (port == 5 && priv->p5_mode == GMAC5)
|
||||
mt7530_set(priv, MT753X_MTRAP, MT7530_P5_DIS);
|
||||
else if (port == 6)
|
||||
mt7530_set(priv, MT753X_MTRAP, MT7530_P6_DIS);
|
@ -0,0 +1,79 @@
|
||||
From patchwork Sat Apr 27 11:24:42 2024
|
||||
Content-Type: text/plain; charset="utf-8"
|
||||
MIME-Version: 1.0
|
||||
Content-Transfer-Encoding: 8bit
|
||||
X-Patchwork-Submitter: =?utf-8?b?QXLEsW7DpyDDnE5BTCB2aWEgQjQgUmVsYXk=?=
|
||||
<devnull+arinc.unal.arinc9.com@kernel.org>
|
||||
X-Patchwork-Id: 13645655
|
||||
From: =?utf-8?b?QXLEsW7DpyDDnE5BTCB2aWEgQjQgUmVsYXk=?=
|
||||
<devnull+arinc.unal.arinc9.com@kernel.org>
|
||||
Date: Sat, 27 Apr 2024 14:24:42 +0300
|
||||
Subject: [PATCH net-next] net: dsa: mt7530: do not set MT7530_P5_DIS when
|
||||
PHY muxing is being used
|
||||
Precedence: bulk
|
||||
X-Mailing-List: netdev@vger.kernel.org
|
||||
List-Id: <netdev.vger.kernel.org>
|
||||
List-Subscribe: <mailto:netdev+subscribe@vger.kernel.org>
|
||||
List-Unsubscribe: <mailto:netdev+unsubscribe@vger.kernel.org>
|
||||
MIME-Version: 1.0
|
||||
Message-Id:
|
||||
<20240427-for-netnext-mt7530-do-not-disable-port5-when-phy-muxing-v1-1-793cdf9d7707@arinc9.com>
|
||||
To: Daniel Golle <daniel@makrotopia.org>, DENG Qingfang <dqfext@gmail.com>,
|
||||
Sean Wang <sean.wang@mediatek.com>, Andrew Lunn <andrew@lunn.ch>,
|
||||
Florian Fainelli <f.fainelli@gmail.com>,
|
||||
Vladimir Oltean <olteanv@gmail.com>,
|
||||
"David S. Miller" <davem@davemloft.net>, Eric Dumazet <edumazet@google.com>,
|
||||
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
|
||||
Matthias Brugger <matthias.bgg@gmail.com>,
|
||||
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
|
||||
Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
|
||||
linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org,
|
||||
=?utf-8?b?QXLEsW7DpyDDnE5BTA==?= <arinc.unal@arinc9.com>
|
||||
X-Mailer: b4 0.13.0
|
||||
X-Patchwork-Delegate: kuba@kernel.org
|
||||
|
||||
From: Arınç ÜNAL <arinc.unal@arinc9.com>
|
||||
|
||||
When the PHY muxing feature is in use, port 5 won't be defined in the
|
||||
device tree. Because of this, the type member of the dsa_port structure for
|
||||
this port will be assigned DSA_PORT_TYPE_UNUSED. The dsa_port_setup()
|
||||
function calls ds->ops->port_disable() when the port type is
|
||||
DSA_PORT_TYPE_UNUSED.
|
||||
|
||||
The MT7530_P5_DIS bit is unset when PHY muxing is being used.
|
||||
mt7530_port_disable() which is assigned to ds->ops->port_disable() is
|
||||
called afterwards. Currently, mt7530_port_disable() sets MT7530_P5_DIS
|
||||
which breaks network connectivity when PHY muxing is being used.
|
||||
|
||||
Therefore, do not set MT7530_P5_DIS when PHY muxing is being used.
|
||||
|
||||
Fixes: 377174c5760c ("net: dsa: mt7530: move MT753X_MTRAP operations for MT7530")
|
||||
Reported-by: Daniel Golle <daniel@makrotopia.org>
|
||||
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
|
||||
---
|
||||
Hello.
|
||||
|
||||
I've sent this to net-next as the patch it fixes is on the current
|
||||
development cycle.
|
||||
---
|
||||
drivers/net/dsa/mt7530.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
|
||||
---
|
||||
base-commit: 5c4c0edca68a5841a8d53ccd49596fe199c8334c
|
||||
change-id: 20240427-for-netnext-mt7530-do-not-disable-port5-when-phy-muxing-7ff5fd0995d7
|
||||
|
||||
Best regards,
|
||||
|
||||
--- a/drivers/net/dsa/mt7530.c
|
||||
+++ b/drivers/net/dsa/mt7530.c
|
||||
@@ -1220,7 +1220,7 @@ mt7530_port_disable(struct dsa_switch *d
|
||||
if (priv->id != ID_MT7530 && priv->id != ID_MT7621)
|
||||
return;
|
||||
|
||||
- if (port == 5)
|
||||
+ if (port == 5 && priv->p5_mode == GMAC5)
|
||||
mt7530_set(priv, MT753X_MTRAP, MT7530_P5_DIS);
|
||||
else if (port == 6)
|
||||
mt7530_set(priv, MT753X_MTRAP, MT7530_P6_DIS);
|
Loading…
x
Reference in New Issue
Block a user