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lantiq: vmmc kernel-in-tree driver: use platform_get_irq to get irqs

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This is required for linux-6.1 compatibility.

IRQs are not automatically mapped from HW to virtual IRQ numbers when
the IRQ domain is registered. This happens when the IRQ number is read
from the device tree based on the IRQ domain from the device tree now.
In kernel 5.15 it was done when the IRQ domain was registered.

Signed-off-by: Martin Schiller <ms@dev.tdt.de>
This commit is contained in:
Martin Schiller 2024-04-15 16:54:07 +02:00
parent 5c9817775e
commit ece380cf28
2 changed files with 196 additions and 0 deletions
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97
target/linux/lantiq/patches-5.15/0200-MIPS-lantiq-xway-vmmc-use-platform_get_irq-to-get-ir.patch Normal file
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@ -0,0 +1,97 @@
From 2b873c59fd313aee57864f96d64a228f2ea7c208 Mon Sep 17 00:00:00 2001
From: Martin Schiller <ms@dev.tdt.de>
Date: Mon, 13 May 2024 10:42:24 +0200
Subject: [PATCH] MIPS: lantiq: xway: vmmc: use platform_get_irq to get irqs
from dts
Let's fetch the irqs from the dts here and expose them to the voice
driver like it is done for the cp1 base memory.
ToDo:
Maybe it is possible to drop this driver completely and merge this
handling to the voice driver.
Signed-off-by: Martin Schiller <ms@dev.tdt.de>
---
arch/mips/lantiq/xway/vmmc.c | 53 ++++++++++++++++++++++++++++++++++++
1 file changed, 53 insertions(+)
--- a/arch/mips/lantiq/xway/vmmc.c
+++ b/arch/mips/lantiq/xway/vmmc.c
@@ -13,6 +13,10 @@
static unsigned int *cp1_base;
+static int ad0_irq;
+static int ad1_irq;
+static int vc_irq[4];
+
unsigned int *ltq_get_cp1_base(void)
{
if (!cp1_base)
@@ -22,16 +26,65 @@ unsigned int *ltq_get_cp1_base(void)
}
EXPORT_SYMBOL(ltq_get_cp1_base);
+unsigned int ltq_get_mps_ad0_irq(void)
+{
+ if (!ad0_irq)
+ panic("no ad0 irq was set\n");
+
+ return ad0_irq;
+}
+EXPORT_SYMBOL(ltq_get_mps_ad0_irq);
+
+unsigned int ltq_get_mps_ad1_irq(void)
+{
+ if (!ad1_irq)
+ panic("no ad1 irq was set\n");
+
+ return ad1_irq;
+}
+EXPORT_SYMBOL(ltq_get_mps_ad1_irq);
+
+unsigned int ltq_get_mps_vc_irq(int idx)
+{
+ if (!vc_irq[idx])
+ panic("no vc%d irq was set\n", idx);
+
+ return vc_irq[idx];
+}
+EXPORT_SYMBOL(ltq_get_mps_vc_irq);
+
static int vmmc_probe(struct platform_device *pdev)
{
#define CP1_SIZE (1 << 20)
int gpio_count;
dma_addr_t dma;
+ int i;
cp1_base =
(void *) CPHYSADDR(dma_alloc_coherent(&pdev->dev, CP1_SIZE,
&dma, GFP_KERNEL));
+ ad0_irq = platform_get_irq(pdev, 4);
+ if (ad0_irq < 0) {
+ dev_err(&pdev->dev, "failed to get MPS AD0 irq: %d\n", ad0_irq);
+ return ad0_irq;
+ }
+
+ ad1_irq = platform_get_irq(pdev, 5);
+ if (ad1_irq < 0) {
+ dev_err(&pdev->dev, "failed to get MPS AD1 irq: %d\n", ad1_irq);
+ return ad1_irq;
+ }
+
+ for (i = 0; i < 4; i++) {
+ vc_irq[i] = platform_get_irq(pdev, i);
+ if (vc_irq[i] < 0) {
+ dev_err(&pdev->dev, "failed to get MPS VC%d irq: %d\n",
+ i, vc_irq[i]);
+ return vc_irq[i];
+ }
+ }
+
gpio_count = of_gpio_count(pdev->dev.of_node);
while (gpio_count > 0) {
enum of_gpio_flags flags;

99
target/linux/lantiq/patches-6.1/0200-MIPS-lantiq-xway-vmmc-use-platform_get_irq-to-get-ir.patch Normal file
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@ -0,0 +1,99 @@
From 2b873c59fd313aee57864f96d64a228f2ea7c208 Mon Sep 17 00:00:00 2001
From: Martin Schiller <ms@dev.tdt.de>
Date: Mon, 13 May 2024 10:42:24 +0200
Subject: [PATCH] MIPS: lantiq: xway: vmmc: use platform_get_irq to get irqs
from dts
Let's fetch the irqs from the dts here and expose them to the voice
driver like it is done for the cp1 base memory.
ToDo:
Maybe it is possible to drop this driver completely and merge this
handling to the voice driver.
Signed-off-by: Martin Schiller <ms@dev.tdt.de>
---
arch/mips/lantiq/xway/vmmc.c | 53 ++++++++++++++++++++++++++++++++++++
1 file changed, 53 insertions(+)
--- a/arch/mips/lantiq/xway/vmmc.c
+++ b/arch/mips/lantiq/xway/vmmc.c
@@ -14,6 +14,10 @@
static unsigned int *cp1_base;
+static int ad0_irq;
+static int ad1_irq;
+static int vc_irq[4];
+
unsigned int *ltq_get_cp1_base(void)
{
if (!cp1_base)
@@ -23,6 +27,33 @@ unsigned int *ltq_get_cp1_base(void)
}
EXPORT_SYMBOL(ltq_get_cp1_base);
+unsigned int ltq_get_mps_ad0_irq(void)
+{
+ if (!ad0_irq)
+ panic("no ad0 irq was set\n");
+
+ return ad0_irq;
+}
+EXPORT_SYMBOL(ltq_get_mps_ad0_irq);
+
+unsigned int ltq_get_mps_ad1_irq(void)
+{
+ if (!ad1_irq)
+ panic("no ad1 irq was set\n");
+
+ return ad1_irq;
+}
+EXPORT_SYMBOL(ltq_get_mps_ad1_irq);
+
+unsigned int ltq_get_mps_vc_irq(int idx)
+{
+ if (!vc_irq[idx])
+ panic("no vc%d irq was set\n", idx);
+
+ return vc_irq[idx];
+}
+EXPORT_SYMBOL(ltq_get_mps_vc_irq);
+
static int vmmc_probe(struct platform_device *pdev)
{
#define CP1_SIZE (1 << 20)
@@ -30,11 +61,33 @@ static int vmmc_probe(struct platform_de
int gpio_count;
dma_addr_t dma;
int error;
+ int i;
cp1_base =
(void *) CPHYSADDR(dma_alloc_coherent(&pdev->dev, CP1_SIZE,
&dma, GFP_KERNEL));
+ ad0_irq = platform_get_irq(pdev, 4);
+ if (ad0_irq < 0) {
+ dev_err(&pdev->dev, "failed to get MPS AD0 irq: %d\n", ad0_irq);
+ return ad0_irq;
+ }
+
+ ad1_irq = platform_get_irq(pdev, 5);
+ if (ad1_irq < 0) {
+ dev_err(&pdev->dev, "failed to get MPS AD1 irq: %d\n", ad1_irq);
+ return ad1_irq;
+ }
+
+ for (i = 0; i < 4; i++) {
+ vc_irq[i] = platform_get_irq(pdev, i);
+ if (vc_irq[i] < 0) {
+ dev_err(&pdev->dev, "failed to get MPS VC%d irq: %d\n",
+ i, vc_irq[i]);
+ return vc_irq[i];
+ }
+ }
+
gpio_count = gpiod_count(&pdev->dev, NULL);
while (gpio_count > 0) {
gpio = devm_gpiod_get_index(&pdev->dev,