This router has the same hardware as TP-LINK TL-WR841N/ND v11 (same
FCC ID, same TFTP image name...).
Flash instruction (WebUI):
Download *-factory.bin image and upload it via the firmwary upgrade
function of the stock firmware WebUI.
Flash instruction (TFTP):
1. Set PC to fixed ip address 192.168.0.66
2. Download *-factory.bin image and rename it to wr841nv11_tp_recovery.bin
(it's really v11, not v12)
3. Start a tftp server with the image file in its root directory
4. Turn off the router
5. Press and hold Reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time
the firmware should be transferred from the tftp server
8. Wait ~30 second to complete recovery.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
The TL-WR841N/ND v10 is mostly identical to the v9. Apart from some minor
changes, it contains a newer revision of the QCA9533 SoC and the CPU clock
is significantly higher.
Flash instruction (WebUI):
Download *-factory.bin image and upload it via the firmwary upgrade
function of the stock firmware WebUI.
Flash instruction (TFTP):
1. Set PC to fixed ip address 192.168.0.66
2. Download *-factory.bin image and rename it to wr841nv10_tp_recovery.bin
3. Start a tftp server with the image file in its root directory
4. Turn off the router
5. Press and hold Reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time
the firmware should be transferred from the tftp server
8. Wait ~30 second to complete recovery.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This commit ports support for the ALFA Network AP121F, a pocket-size
router with 1 Ethernet and 2.4 GHz WiFi based on the AR9331 SoC, to the
ath79 target (it was already supported in ar71xx; see commit 0c6165d2
for more details).
Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
[pepe2k@gmail.com: fixed GPIO polarity, included USB support, changed
DTS nodes order, moved WLAN LED trigger define to DTS, made U-Boot env
partition writable]
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
The lines-initial-states property was an early attempt to set the latch
bit of the shift register on driver probe. It is not implemented in the
driver and was rejected upstream. The latch bit was always set by a GPIO
hog, so this property is safe to drop.
Signed-off-by: David Bauer <mail@david-bauer.net>
Hardware spec of DIR-842 C2:
SoC: QCA9563
DRAM: 128MB DDR2
Flash: 16MB SPI-NOR
Switch: QCA8337N
WiFi 5.8GHz: QCA9888
WiFi 2.4Ghz: QCA9563
USB: 2.0
Flash instructions:
1. Upgrade the factory.bin through the factory web interface or
the u-boot failsafe interface.
The firmware will boot up correctly for the first time.
Do not power off the device after OpenWrt has booted.
Otherwise the u-boot will enter failsafe mode as the checksum
of the firmware has been changed.
2. Upgrade the sysupgrade.bin in OpenWrt.
After upgrading completes the u-boot won't complain about the
firmware checksum and it's OK to use now.
3. If you powered off the device before upgrading the sysupgrade.bin,
just upgrade the factory.bin through the u-boot failsafe interface
and then goto step 2.
Signed-off-by: Jackson Lim <jackcolentern@gmail.com>
[Reword reset-hog comment, fix formatting]
Signed-off-by: David Bauer <mail@david-bauer.net>
TP-Link Archer C60 v2 is a dual-band AC1350 router,
based on Qualcomm/Atheros QCA9561 + QCA9886.
Specification:
- 775/650/258 MHz (CPU/DDR/AHB)
- 64 MB of RAM (DDR2)
- 8 MB of FLASH (SPI NOR)
- 3T3R 2.4 GHz
- 2T2R 5 GHz
- 5x 10/100 Mbps Ethernet
- 7x LED, 2x button
- UART header on PCB
Flash instruction (WebUI):
Download *-factory.bin image and upload it via the firmwary upgrade
function of the stock firmware WebUI.
Flash instruction (TFTP):
1. Set PC to fixed IP address 192.168.0.66
2. Download *-factory.bin image and rename it to tp_recovery.bin
3. Start a tftp server with the file tp_recovery.bin in its root
directory
4. Turn off the router
5. Press and hold reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time the firmware should
be transferred from the tftp server
8. Wait ~30 second to complete recovery
Flash instruction (under U-Boot, using UART):
tftp 0x81000000 ...-sysupgrade.bin
erase 0x9f030000 +$filesize
cp.b $fileaddr 0x9f030000 $filesize
reset
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
TP-Link Archer C60v1 is a dual-band AC1350 router,
based on Qualcomm/Atheros QCA9561+QCA9886.
Specification:
- 775/650/258 MHz (CPU/DDR/AHB)
- 64 MB of RAM (DDR2)
- 8 MB of FLASH (SPI NOR)
- 3T3R 2.4 GHz
- 2T2R 5 GHz
- 5x 10/100 Mbps Ethernet
- 7x LED, 2x button
- UART header on PCB
Flash instruction (WebUI):
Download *-factory.bin image and upload it via the firmwary upgrade
function of the stock firmware WebUI.
Flash instruction (TFTP):
1. Set PC to fixed ip address 192.168.0.66
2. Download *-factory.bin image and rename it to tp_recovery.bin
3. Start a tftp server with the file tp_recovery.bin in its root directory
4. Turn off the router
5. Press and hold Reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time
the firmware should be transferred from the tftp server
8. Wait ~30 second to complete recovery.
Flash instruction under U-Boot, using UART:
1. tftp 0x81000000 ...-sysupgrade.bin
2. erase 0x9f020000 +$filesize
3. cp.b $fileaddr 0x9f020000 $filesize
4. reset
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
TP-Link CPE510-v2/v3 is an outdoor wireless CPE for 5 GHz with
one Ethernet port based on Atheros AR9344
Specifications:
- Based on the same underlying hardware as the TP-Link CPE510
- Power, LAN, and 4 green LEDs
- 1 10/100Mbps Shielded Ethernet Port (Passive PoE in)
- Built-in 13dBi 2x2 dual-polarized directional MIMO antenna
- Adjustable transmission power from 0 to 23dBm/200mw
Flashing instructions:
Flash factory image through stock firmware WEB UI
or through TFTP
To get to TFTP recovery just hold reset button while powering on for
around 4-5 seconds and release.
Rename factory image to recovery.bin
Stock TFTP server IP:192.168.0.100
Stock device TFTP adress:192.168.0.254
Signed-off-by: Andrew Cameron <apcameron@softhome.net>
[whitespace fixes]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Trendnet TEW-823DRU is a dual-band AC1750 router.
The router is based on Qualcomm/Atheros QCA9558 + QCA9880.
Specification:
720 MHz CPU
256 MB of RAM
16 MB of FLASH
3T3R 2.4 GHz
3T3R 5 GHz
5x 10/100/1000 Mbps Ethernet
Firmware can be flashed from the web interface. Tested on 3 routers
with no issues.
Signed-off-by: Pramod Pancha <pancha@vill.com>
[whitespace fixes]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
This board was used in dual-band 802.11n enterprise access points, models
BSAP-1800v2 and BSAP-1840, introduced in 2010 by Bluesocket, which was
acquired by Adtran in 2011, who has now EOL'ed them. They differed only in
that the BSAP-1840's antennae were detachable, while the BSAP-1800v2's were
inside the case. They have an external RJ-45 console port, which works with
standard Cisco 72-3383-01 console cables.
Specification:
- System-On-Chip: AR7161
- CPU/Speed: 600 MHz
- Flash-Chip: Macronix MX25L12845E
- Flash size: 16 MiB
- RAM: 64 MiB
- Wireless No1: Lite-On WN2601A card: AR9160/AR9103 2.4GHz 802.11bgn
- Wireless No2: Lite-On WN2502A card: AR9160/AR9106 5GHz 802.11an
- PHY: Vitesse VSC8601, Rev. B
Installation:
1. Connect to the serial console using a terminal that supports YMODEM at
115200 bps, 8 data bits, no parity, 1 stop bit
2. Interrupt the bootloader using its password, which is: r00t
3. Issue the "fis init" command, confirming if prompted
4. Look at the length of the openwrt-ath79-generic-*-squashfs-kernel.bin
file, and substitute it below, instead of where I have "LeNgTh"
5. Issue the following command, and upload this file using YMODEM protocol
load -r -v -b 0x80060000 -m ymodem
6. Issue the following commands, substituting as mentioned above:
fis create -b 0x80060000 -l LeNgTh vmlinux_2
load -r -v -b 0x80100000 -m ymodem
7. Using YMODEM, upload openwrt-ath79-generic-*-squashfs-rootfs.bin
8. Issue the "fis free" command, and for the first range in its response,
use a hexadecimal calculator to subtract the start from the end in order
to substitute it below, with the leading "0x" to specify it in
hexadecimal, instead of where I have "LeNgTh"
9. Issue the following commands, substituting as mentioned above:
fis create -b 0x80100000 -l LeNgTh -e 0 -r 0 rootfs
reset
10.Wait for the status LED to go solid green
Tested-by: Brian Gonyer <bgonyer@gmail.com>
Signed-off-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
[fixed obsolete $ARGV in platform_do_upgrade]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
It was reported in FS#2385, that Carambola2 doesn't currently have
working watchdog so fix it by adding watchdog node.
Ref: FS#2385
Signed-off-by: Petr Štetiar <ynezz@true.cz>
according to functional block diagram in datasheet, these devices
don't belong to apb bus.
Move these nodes out to match datasheet description.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Specifications:
- SoC: AR9344
- RAM: 128MB
- Flash: 2 * 16MB (MX25L12845)
- Ethernet: 2 * FE LAN & 1 * FE WAN
- WiFi: 2.4G: AR9344 5G: QCA9882
Flash instruction:
1. Hold reset and power up the router
2. Set your IP to 192.168.1.x
3. Open 192.168.1.1 and upload the generated *factory* firmware
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Hardware
--------
CPU: Qualcomm Atheros QCA9558
RAM: 128M DDR2
FLASH: 16MiB
ETH: 1x Atheros AR8035 (PoE in)
WiFi2: QCA9558 3T3R
WiFi5: QCA9880 3T3R
BTN: 1x Reset
LED: 1x LED Power (non-controllable)
1x LED Status (internal)
1x LED LAN (controlled by PHY)
1x LED WLAN
BEEP: 1x GPIO attached piezo beeper
UART: 3.3V GND TX RX (115200-N-8) (3.3V is square pad)
Header is located next to external-LED header.
Installation
------------
Make sure you set a password for the root user as prompted on first
setup!
1. Upload OpenWRT sysupgrade image via SSH to the device.
Use /tmp as the destination folder on the device.
User is root, password the one set in the web interface.
2. Install OpenWRT with
> sysupgrade -n -F /tmp/<openwrt-image-name>
Signed-off-by: David Bauer <mail@david-bauer.net>
Increase the Kernel partition to address the issue discussed here
https://forum.openwrt.org/t/cpe610-v1-sysupgrade-bin-missing-too-big/39637/5
Switch Back to the okli Loader to support increased partition size
Signed-off-by: Andrew Cameron <apcameron@softhome.net>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com> [add <> for e-mail]
In ath79, identifiers tplink_tl-wdr3600 and tplink_tl-wdr4300 have
been used while most other TP-Link devices include the revision.
Although there actually is only one major revision of these
devices, they bear the revision on their bottom (v1.x). TP-Link
also refers to the devices as V1 on its web page.
This patch thus adds -v1 to both so it is more consistent
with other devices and with what you would expect from reading
the on-device sticker and the support pages.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This patch fixes the previous commit that rendered the
devices (mostly leds) useless.
Fixes: 1fa24de8c2 ("ath79: spi-gpio: convert deprecated binding")
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
TP-Link CPE610-v1 is an outdoor wireless CPE for 5 GHz with
one Ethernet port based on Atheros AR9344
Specifications:
- Based on the same underlying hardware as the TP-Link CPE510
- Power, LAN, WLAN5G green LEDs
- 23dBi high-gain directional 2×2 MIMO antenna and a dedicated metal reflector
Flashing instructions:
Flash factory image through stock firmware WEB UI
or through TFTP
To get to TFTP recovery just hold reset button while powering on for
around 4-5 seconds and release.
Rename factory image to recovery.bin
Stock TFTP server IP:192.168.0.100
Stock device TFTP adress:192.168.0.254
Signed-off-by: Andrew Cameron <apcameron@softhome.net>
Upstream commit 6d4cd04 changes how the internal delays of the AR803x
based PHYs are enabled. With this commit, all internal delays are
disabled on driver probe and enabled based on the 'phy-mode' property in
the device-tree.
Before this commit, the RX delay was always enabled upon soft-reset
while the TX delay retained it's previous state. A hard reset enabled
the RX delay while the TX delay was disabled.
Because of this inconsistency, wrongly specified PHY-modes were working
correctly while the hardware was in a different state.
Fix the PHY-modes of some affected devices (and clean up misplaced
properties along the way) to keep the devices working flawlessly with
kernels >= 5.1.
Signed-off-by: David Bauer <mail@david-bauer.net>
The TP-Link Archer C25 is a low-cost dual-band router.
Specification:
- CPU: Atheros QCA9561 775 MHz
- RAM: 64 MB
- Flash: 8 MB
- Wifi: 3x3 2.4 GHz (integrated), 1x1 5 GHz QCA9887
- NET: 5x 10/100 Mbps Ethernet
Some LEDs are controlled by an additional 74HC595 chip, but not
all of them as e.g. for the C59.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This patch harmonizes the label and alias for art partitions
across ath79. Since lower case seems to be more frequent, use that
consistently.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
The info/product-info partition, which frequently contains MAC
adresses, is typically assigned the 'info' alias in DTS, but
then labelled with 'info', 'product-info' or 'config'.
This leads to different aliases if used for setting MAC adresses
in DTS compared to when using e.g. mtd_get_mac_binary. Occationally,
also multiple switch-case entries are used just because of different
labelling.
This patch relabels those partitions in ath79 to consistently use
'info'.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Specifications:
- Atheros AR9331 (400 MHz)
- 64 MB of RAM (DDR2)
- 16 MB of Flash (SPI)
- 1T1R 2.4 Wlan (AR9331)
- 2x 10/100 Mbps Ethernet
- 3x LEDs, 1x gpio button
- 1x USB 2.0, 5V
- UART over usb, 115200n8
Upgrading from ar71xx target:
- Put image into board:
scp openwrt-ath79-generic-8dev_carambola2-squashfs-sysupgrade.bin \
root@192.168.1.1/tmp/
- Run sysupgrade
sysupgrade /tmp/sysupgrade.bin
Upgrading from u-boot:
- Set up tftp server with sysupgrade.bin image
- Go to u-boot (reboot and press ESC when prompted)
- Set TFTP server IP
setenv serverip 192.168.1.254
- Set device ip from same subnet
setenv ipaddr 192.168.1.1
- Copy new firmware to board
tftpboot 0x81000000 sysupgrade.bin
- erase flash
erase 0x9f050000 +${filesize}
- flash firmware
cp.b 0x81000000 0x9f050000 ${filesize}
- Reset board
reset
Signed-off-by: Rytis Zigmantavičius <rytis.z@8devices.com>
[wrapped long line in commit description, whitespace and art address
fix in DTS, keep default lan/wan setup, removed -n in sysupgrade]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
ZBT-WD323 is a dual-LTE router based on AR9344. The detailed
specifications are:
* AR9344 560MHz/450MHz/225MHz (CPU/DDR/AHN).
* 128 MB RAM
* 16MB of flash(SPI-NOR, 22MHz)
* 1x 2.4GHz wifi (Atheros AR9340)
* 3x 10/100Mbos Ethernet (AR8229)
* 1x USB2.0 port
* 2x miniPCIe-slots (USB2.0 only)
* 2x SIM slots (standard size)
* 4x LEDs (1 gpio controlled)
* 1x reset button
* 1x 10 pin terminal block (RS232, RS485, 4x GPIO)
* 2x CP210x UART bridge controllers (used for RS232 and RS485)
* 1x 2 pin 5mm industrial interface (input voltage 12V~36V)
* 1x DC jack
* 1x RTC (PCF8563)
Tested:
- Ethernet switch
- Wifi
- USB port
- MiniPCIe-slots (+ SIM slots)
- Sysupgrade
- Reset button
- RS232
Intallation and recovery:
The board ships with OpenWRT, but sysupgrade does not work as a
different firmware format than what is expected is generated. The
easiest way to install (and recover) the router, is to use the
web-interface provided by the bootloader (Breed).
While the interface is in Chinese, it is easy to use. First, in order to
access the interface, you need to hold down the reset button for around
five seconds. Then, go to 192.168.1.1 in your browser. Click on the
second item in the list on the left to access the recovery page. The
second item on the next page is where you select the firmware. Select
the menu item containing "Atheros SDK" and "16MB" in the dropdown close
to the buttom, and click on the button at the bottom to start
installation/recovery.
Notes:
* RS232 is available on /dev/ttyUSB0 and RS485 on /dev/ttyUSB1
Signed-off-by: Kristian Evensen <kristian.evensen@gmail.com>
[removed unused poll-interval from gpio-keys, i2c-gpio 4.19 compat]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
With a proper probe deferring for ag71xx we don't need to explicitly
probe mdio1 before gmac0.
Drop all "simple-mfd" in SoC dtsi so that gmac orders can be the same
as ar71xx.
This makes eth0/eth1 order the same as those in ar71xx, which means
we don't need a migration script for this anymore and we can merge
incorrectly split gmac/mdio driver back together.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
The register size of the QCA955x currently matches the size stated in
the datasheet. However, there are more hidden GMAC registers which are
needed for the SGMII workaround to work.
Signed-off-by: David Bauer <mail@david-bauer.net>
This patch fixes following missing bits:
- add missing 'compatible' property on firmware partition
- set vendor partition 'userconfig' read-only
Fixes: 30dcbc741d ("ath79: add support for EnGenius ECB1750")
Signed-off-by: Sven Friedmann <sf.openwrt@okay.ms>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
SoC: AR9344
RAM: 128MB
Flash: 16MiB Winbond 25Q128BVFG SPI NOR
5GHz WiFi: AR9380 PCIe 3x3:3 802.11n
2.4GHz WiFi: AR9344 (SoC) AHB 2x2:2 802.11n
5x Gigabit ethernet via AR8327N switch (green + amber LEDs)
2x USB 2.0 via GL850G hub
4x front LEDs from SoC GPIO
1x front WPS button from SoC GPIO
1x bottom reset button from SoC GPIO
Known issues:
AR8327N LEDs only have default functionality, not presented in sysfs.
This is a regression from ar71xx.
UART header JP1, 115200 no parity 1 stop
TX
GND
VCC
(N/P)
RX
See https://openwrt.org/toh/wd/n750 for flashing detail.
Procedures unchanged from ar71xx.
Tested sysupgrade + factory flash from WD Emergency Recovery
Signed-off-by: Ryan Mounce <ryan@mounce.com.au>
The GL.iNet AR750S USB and microSD port is currently not working out of
the box. GPIO 7 is used to control the power of the USB port. Add GPIO
7 as a fixed-regulator for the port. Also add &usb1 to DTS to get the
microSD port to work.
Signed-off-by: Alexander Wördekemper <alexwoerde@web.de>
Commit "generic: ar8216: add mib_poll_interval switch attribute" sets
mib-poll-interval as disabled by default (was set to 2s), so it makes
switch LEDs trigger disfunctional on devices which don't have
mib-poll-interval set.
So this patch sets mib-poll-interval to 500ms on devices which have
ar83xx switch connected to mdio0 bus, as the same value was set for
built in switches in 443fc9ac35 ("ath79: use ar8216 for builtin
switch").
Some measurements performed on TP-Link Archer C7-v5:
mib-type=0, mib-poll-interval=500ms (10s pidstat)
Average: %usr %system %guest %wait %CPU CPU Command
Average: 0.00 1.93 0.00 0.00 1.93 - kworker/0:2
iperf3 (30s): 334 Mbits/sec
mib-type=0, mib-poll-interval=2s (10s pidstat)
Average: %usr %system %guest %wait %CPU CPU Command
Average: 0.00 1.14 0.00 0.00 1.14 - kworker/0:2
iperf3 (30s): 334 Mbits/sec
So it seems like we get 4x faster LED refresh rate for additional 0.8%
CPU load.
Signed-off-by: Petr Štetiar <ynezz@true.cz>
This patch converts the Range Extender to use the
interrupt-driven gpio-keys driver over the polled variant.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
This patch converts the WNDR3700 to use the interrupt-driven
gpio-keys driver over the polled variant.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
All other QCA9563 devices already use this identifier for
the exact SoC. Not that this matters much since as upstream
states in Documentation/devicetree/usage-model.txt:
"First and foremost, the kernel will use data in the DT to
identify the specific machine. In a perfect world, the
specific platform shouldn't matter to the kernel because all
platform details would be described perfectly by the device
tree in a consistent and reliable manner.
[...]
In the majority of cases, the machine identity is irrelevant,
and the kernel will instead select setup code based on the
machine's core CPU or SoC."
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
TP-Link Archer D50 v1 is a dual-band AC1200 router + modem.
The router section is based on Qualcomm/Atheros QCA9531 + QCA9882.
The "DSL" section is based on BCM6318 but it's currently not supported.
Internally eth0 is connected to the Broadcom CPU.
Router section - Specification:
CPU: QCA9531 650/600/200 MHz (CPU/DDR/AHB)
RAM: 64 MB (DDR2)
Flash: 8 MB (SPI NOR)
Wifi 2.4GHz: QCA9531 2T2R
Wifi 5GHz: QCA9982 2T2R
4x 10/100 Mbps Ethernet
8x LED, 3x button
UART header on PCB
Known issues:
DSL not working (eth0) (WIP)
UART connection
---------------
J2 HEADER (Qualcomm CPU)
. TX
. RX
. GND
O VCC
J16 HEADER (Broadcom CPU)
O VCC
. GND
. RX
. TX
The following instructions require a connection to the J2 UART header.
Flash instruction under U-Boot, using UART
------------------------------------------
1. Press any key to stop autobooting and obtain U-Boot CLI access.
2. Setup ip addresses for U-Boot and your tftp server.
3. Issue below commands:
tftpboot 0x81000000 openwrt-ath79-generic-tplink_archer-d50-v1-squashfs-sysupgrade.bin
erase 0x9f020000 +$filesize
cp.b 0x81000000 0x9f020000 $filesize
reset
Initramfs instruction under U-Boot for testing, using UART
----------------------------------------------------------
1. Press any key to stop autobooting and obtain U-Boot CLI access.
2. Setup ip addresses for U-Boot and your tftp server.
3. Issue below commands:
tftpboot 0x81000000 openwrt-ath79-generic-tplink_archer-d50-v1-initramfs-kernel.bin
bootm 0x81000000
Restore the original firmware
-----------------------------
0. Backup every partition using the OpenWrt web interface
1. Download the OEM firmware from the TP-Link website
2. Extract the bin file in a folder (eg. Archer_D50v1_0.8.0_1.3_up_boot(170223)_full_2017-02-24_09.37.45.bin)
3. Remove the U-Boot and the Broadcom image part from the file.
Issue the following command:
dd if="Archer_D50v1_0.8.0_1.3_up_boot(170223)_full_2017-02-24_09.37.45.bin" of="Archer_D50v1_0.8.0_1.3_up_boot(170223)_full_2017-02-24_09.37.45.bin.mod" skip=257 bs=512 count=15616
4. Double check the .mod file size. It must be 7995392 bytes.
5. Flash it using the OpenWrt web interface. Force the update if needed.
WARNING: Remember to NOT keep settings.
5b. (Alternative to 5.) Flash it using the U-Boot and UART connection.
Issue below commands in the U-Boot:
tftpboot 0x81000000 Archer_D50v1_0.8.0_1.3_up_boot(170223)_full_2017-02-24_09.37.45.bin.mod
erase 0x9f020000 +$filesize
cp.b 0x81000000 0x9f020000 $filesize
reset
Signed-off-by: Davide Fioravanti <pantanastyle@gmail.com>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com> [removed
default-state = "off", it's already the default, added pcie node,
fixed typo]
SoC: Atheros AR7161-8C1A @ 680 MHz
RAM: 128MB - 2x Etron Technology EM6AB160TSA-5G
NOR: 16MB - 1x MXIC MX25L12845EMI-10G (SPI-NOR)
WI1: Atheros AR9223-AC1A 802.11bgn
WI2: Atheros AR9220-AC1A 802.11an
ETH: Atheros AR8021-BL1E + PoE
LED: Dual-Color Power/Status, Ethernet, WLAN2G and WLAN5G
BTN: 1 x Reset
I2C: AT97SC4303s TPM (needs driver!)
CON: RS232-level 8P8C/RJ45 Console Port - 9600 Baud
Factory installation:
- Needs a u-boot replacement. See Wiki for
information on how to do a in-circut flash with
a SPI-Flasher like a CH314A or flashrom. Wiki page
can be found at https://openwrt.org/toh/aruba/aruba_ap-105
- Be careful when dis- and reassembling the device to
not squish any of the antenna cables in the process!
- Be sure to make a full 16 MiB backup of your device
before flashing the new u-boot! This is needed if you
ever have interest in reverting back to stock firmware.
Not working:
- TPM (needs a driver)
Signed-off-by: Chris Blake <chrisrblake93@gmail.com>
Specifications:
- QCA9563 at 775 MHz
- 64 MB RAM Zentel A3R12E40CBF-8E
- 16 MB flash Winbond W25Q128FVSG
- 3 (non-detachable) Antennas / 450 Mbit
- 1x/4x WAN/LAN Gbps Ethernet (QCA8337)
- reset and Wi-Fi buttons
TP-Link TL-WR1043N v5 appears to be identical to the TL-WR1043ND v4,
except that the USB port has been removed and there is no longer a
removable antenna option. It also has different partitioning scheme.
The software is more in line with the Archer series in that it uses a
nested bootloader scheme.
(This has been adapted from the OpenWrt Wiki page)
<https://openwrt.org/toh/tp-link/tl-wr1043nd>
Installation on HW rev.5:
Factory firmware can be installed via the WEB interface.
Alternatively, it is also possible to use a TFTP server
for recovery purposes:
- Rename OpenWRT or original firmware to WR1043v5_tp_recovery.bin
- Set static IP of your PC to *192.168.0.66*
- Router will obtain IP 192.168.0.86 for a few seconds while
loading, when reset button pressed at power On.
And finally, there's always u-boot access through the UART.
For information visit the wiki.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
[reworked commit message]
Specification:
- Qualcomm Atheros SoC QCA9558
- 720/600/200 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 16 MB of FLASH (SPI NOR)
- 1x 10/100/1000 Mbps Ethernet
- 3T3R 2.4 GHz (QCA9558 WMAC)
- 3T3R 5.8 Ghz (QCA9880-BR4A, Senao PCE4553AH)
https://fccid.io/A8J-ECB1750
Tested and working:
- lan, wireless, leds, sysupgrade (tftp)
Flash instructions:
1.) tftp recovery
- use a 1GbE switch or direct attached 1GbE link
- setup client ip address 192.168.1.10 and start tftpd
- save "openwrt-ath79-generic-engenius_ecb1750-initramfs-kernel.bin" as "ap.bin" in tfpd root directory
- plugin powercord and hold reset button 10secs.. "ap.bin" will be downloaded and executed
- afterwards login via ssh and do a sysuprade
2.) oem webinterface factory install (not tested)
Use normal webinterface upgrade page und select "openwrt-ath79-generic-engenius_ecb1750-squashfs-factory.bin".
3.) oem webinterface command injection
OEM Firmware already running OpenWrt (Attitude Adjustment 12.09).
Use OEM webinterface and command injection. See wiki for details.
https://openwrt.org/toh/engenius/engenius_ecb1750_1
Signed-off-by: sven friedmann <sf.openwrt@okay.ms>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
[use interrupt-driven "gpio-keys" binding]
These dts itself are incomplete (e.g. missing mtd partitions) and its
deivce support is never added to ath79 target.
Drop these unused dts for now.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
In commit e9652e1696 ("ath79: fix pinmux for ar933x devices") I've
wrongly changed desired register value to 0xf8 although it should've
been set to 0x0.
0xf8 value sets bits 3-7 (ETH_SWITCH_LEDx_EN) to 1 which actually
enables ethernet switch LEDs, so 0x0 is correct value in order to use
the pins as GPIO.
Fixes: e9652e1696 ("ath79: fix pinmux for ar933x devices")
Reported-by: Chuanhong Guo <gch981213@gmail.com>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Simply dumped content of this regs in ar71xx and wrote them to DTS, as a
result port 6 on the switch will appear disconnected as on Archer C7v4.
[AS: testing and PORT6_STATUS fix]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Properly disable the SoC's internal Switch LEDs on the pinmux.
Devices that previously called ath79_gpio_function_disable for
the switch LEDs, just need to reference switch_led_pins in the
pinctrl-0 property of the gpio-leds node.
Signed-off-by: Paul Wassi <p.wassi@gmx.at>
[changed desired pinctrl register value from 0x1f to proper 0xf8]
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
[renamed pinmux name to switch_led_disable_pins to make purpose more clear]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
This devices have LEDs connected to the SoC's GPIOs, so it makes no
sense to fiddle with ar8327 LED regs.
Tested-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
