As the former qca9558_tplink_archer-c7.dtsi is also used for
Archer C5 v1 this patch removes the number from the DTSI name
to indicate that.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
The GL.iNet GL-AR750S has been supported by the ar71xx and ath79
platforms with access to its 16 MB NOR flash, but not its 128 MB
SPI NAND flash.
This commit provides support for the NAND through the upstream
SPI-NAND framework.
At this time, the OEM U-Boot appears to only support loading the
kernel from NOR. This configuration is preserved as this time,
with the glinet,gl-ar750s-nand name reserved for a potential,
future, NAND-only boot.
The family of GL-AR750S devices on the ath79 platform now includes:
* glinet,gl-ar750m-nor-nand "nand" target
* glinet,gl-ar750m-nor "nand" target (NAND-aware)
NB: This commit increases the kernel size from 2 MB to 4 MB
"Force-less" sysupgrade is presently supported from the current
versions of following NOR-based firmwre images to the version of
glinet,gl-ar750s-nor firmware produced by this commit:
* glinet,gl-ar750s -- OpenWrt 19.07 ar71xx
* glinet,gl-ar750s -- OpenWrt 19.07 ath79
Users who have sucessfully upgraded to glinet,gl-ar750m-nor may then
flash glinet,gl-ar750m-nor-nand with sysupgrade to transtion to the
NAND-based variant.
Other upgrades to these images, including directly to the NAND-based
glinet,gl-ar750s-nor-nand firmware, can be accomplished through U-Boot.
NB: See "ath79: restrict GL-AR750S kernel build-size to 2 MB" which
enables flashing of NAND factory.img with the current GL-iNet U-Boot,
"U-Boot 1.1.4-gcf378d80-dirty (Aug 16 2018 - 07:51:15)"
The GL-AR750S OEM U-Boot allows upload and flashing of either NOR
firmware (sysupgrade.bin) or NAND firmware (factory.img) through its
HTTP-based GUI. Serial connectivity is not required.
The glinet,gl-ar750s-nor and glinet,gl-ar750s-nor-nand images
generated after this commit flash each other directly.
This commit changes the control of the USB VBUS to gpio-hog from
regulator-fixed introduced by commit 0f6b944c92. This reduces the
compressed kernel size by ~14 kB, with no apparent loss of
functionality. No other ath79-nand boards are using regulator-fixed
at this time.
Note: mtd_get_mac_binary art 0x5006 does not return the proper MAC
and the GL.iNet source indicates that only the 0x0 offset is valid
The ar71xx targets are unmodified.
Cc: Alexander Wördekemper <alexwoerde@web.de>
Signed-off-by: Jeff Kletsky <git-commits@allycomm.com>
The GL.iNet GL-AR300M series of devices includes variants without NAND
and only the 16 MB NOR flash. These include the GL-AR300M16 and the
GL-AR300M-Lite (already with its own board name).
This board-name addition provides disambiguation from the NAND-bearing
GL-AR300M devices, both for OpenWrt code and for end users.
Kernel and firmware support for NAND and UBI will add ~320 kB to the
overall firmware size at this time. This NOR-only option continues to
provide more compact firmware for both the GL-AR300M16 as well as
those who wish to use it as an alternate or primary, NOR-resident
firmware on the GL-AR300M.
The ar71xx targets are unmodified.
Installation
------------
Install through OEM U-Boot (HTTP-based) or `sysupgrade --force` when
booted from NOR and running OEM or OpenWrt, NOR-based firmware.
As one of the intentions is disambiguation from NAND-bearing units,
users who have flashed this firmware onto a device with NAND would
need to use U-Boot or `sysupgrade --force` to flash firmware that
again supports NAND.
There are no additional SUPPORTED_DEVICES as it is not possible to
determine if a device does or does not have NAND based on
either the OEM's or OpenWrt's board names prior to this patch.
Signed-off-by: Jeff Kletsky <git-commits@allycomm.com>
The GL.iNet GL-AR300M has been supported by the ar71xx and ath79
platforms with access to its 16 MB NOR flash, but not its 128 MB
SPI NAND flash.
This commit provides support for the NAND through the upstream
SPI-NAND framework. Devices with both NOR and NAND flash can support
independent firmware on each, with U-Boot able to boot from either.
The OEM U-Boot will fall back to the NOR firmware after three
"unsuccessful" boots.
The family of GL-AR300M devices on the ath79 platform now includes:
* glinet,gl-ar300m-lite "generic" target, NOR-only board
* glinet,gl-ar300m-nand "nand" target
* glinet,gl-ar300m-nor "nand" target (NAND-aware)
NB: This commit increases the kernel size from 2 MB to 4 MB
"Force-less" sysupgrade is presently supported from the current
versions of following NOR-based firmwre images to the version of
glinet,gl-ar300m-nor firmware produced by this commit:
* gl-ar300m -- OEM v3 NOR ar71xx (openwrt-ar300m16-*.bin)
* gl-ar300m -- OpenWrt 18.06 ar71xx
* gl-ar300m -- OpenWrt 19.07 ar71xx
Other upgrades to these images should be performed through U-Boot.
The GL-AR300M OEM U-Boot allows upload and flashing of either NOR
firmware (sysupgrade.bin) or NAND firmware (factory.img) through its
HTTP-based GUI. Serial connectivity is not required.
The glinet,gl-ar300m-nand and glinet,gl-ar300m-nor images generated
after this commit should safely flash each other using sysupgrade.
The boot counter is implemented by the OEM using u-boot-env. At this
time, it does not appear that the switch on the side of the unit can
be used to select NOR vs. NAND boot and the fail-over is only from
NAND to NOR. To save flash wear, it is only reset when running the
glinet,gl-ar300m-nand firmware.
NAND-specific base-files are used to remove impact on existing
generic and tiny targets.
As there is now no "generic" build appropriate for the GL-AR300M16,
(or for users of the GL-AR300M that do not need access to NAND)
it will be introduced in a subsequent commit.
Note: `mtd_get_mac_binary art 0x6` does not return the proper MAC
and the GL.iNet source indicates that only the 0x0 offset is valid
The ar71xx targets are unmodified.
Signed-off-by: Jeff Kletsky <git-commits@allycomm.com>
In several DTS files, button nodes are just named buttonX or
xxx_button. This replaces the names with more specific names matching
the majority of key definitions.
While at it, fix name of keys node in one case.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
The ð0 node is the same for all TP-Link CPE devices in ar9344,
so move it to parent DTSI. While at it, do some minor DTS
harmonizations.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This adds support for a popular low-cost 2.4GHz N based AP
Specifications:
SoC: Qualcomm Atheros QCA9533 (650MHz)
RAM: 64MB
Storage: 8 MB SPI NOR
Wireless: 2.4GHz N based built into SoC 2x2
Ethernet: 2x 100/10 Mbps, integrated into SoC
Installation:
Flash factory image through stock firmware WEB UI
or through TFTP
To get to TFTP recovery just hold reset button while powering on for
around 4-5 seconds and release.
Rename factory image to recovery.bin
Stock TFTP server IP:192.168.0.100
Stock device TFTP adress:192.168.0.254
This also applies some minor changes to the common DTSI:
- use &wmac for label-mac-device, as this one is actually set up in
common DTSI
- move ð0 to parent DTSI
- fix several leading spaces, added/removed newlines
Signed-off-by: Andrew Cameron <apcameron@softhome.net>
[DTS style fixes/improvements, updated commit message/title]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This applies several style adjustments that have been requested in
recent reviews to older DTS files. Despite making the code base more
consistent, this will also help to reduce review time when DTSes
are copy/pasted.
Applied changes:
- Rename gpio-keys/gpio-leds to keys/leds
- Remove node labels that are not used
- Use label property for partitions
- Prefix led node labels with "led_"
- Remove redundant includes
- Harmonize new lines after status property
- Several smaller style fixes
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
TP-Link WBS210 v2 is an outdoor wireless CPE for 2.4 GHz with
two Ethernet ports based on Atheros AR9344
The device is the same as TP-Link CPE220 v2, but with higher TX power (27 dBm
instead of 12 dBm) and two antenna connectors instead of built-in antennas.
Specifications:
- SoC: Atheros AR9344
- RAM: 64MB
- Storage: 8 MB SPI NOR
- Wireless: 2.4GHz 300 Mbps, 2x RP-SMA connector, 27 dBm TX power
- Ethernet: 1x 10/100 Mbps with 24V POE IN, 1x 10/100 Mbps
Installation:
Flash factory image through stock firmware WEB UI
or through TFTP
To get to TFTP recovery just hold reset button while powering on for
around 4-5 seconds and release.
Rename factory image to recovery.bin
Stock TFTP server IP: 192.168.0.100
Stock device TFTP adress: 192.168.0.254
The TP-Link WBS devices use the same GPIOs as the CPE devices,
except for the link4 LED. For this one, WBS devices use "2", while
CPE devices use "16". (Tested on WBS210 v2)
Signed-off-by: Bernhard Geier <freifunk@geierb.de>
[added comment about GPIO]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Specifications:
- QCA9558 Soc
- 720/800 (CPU/DDR)
- 1x 10/100/1000 Mbps WAN Ethernet
- 4x 10/100/1000 Mbps LAN Ethernet
- 64 MB RAM (DDR2)
- 8 MB FLASH
- QCA9558 2.4 GHz 802.11bgn
- 1x USB 2.0
Flash instruction
WebUI:
Download *-factory.bin image, rename to tp_firmware.bin and upload
it via the firmwary upgrade function of the stock firmware WebUI.
Tftp:
Rename OpenWRT or original firmware to wr1045v2_tp_recovery.bin and
Change your computer ip in 192.168.0.66 and subnet mask in 255.255.255.0.
Router will obtain IP 192.168.0.86 for a few seconds while loading,
when reset button pressed at power On.
Signed-off-by: Rasim Kalimullin <neutrino.vm@gmail.com>
[rebased onto base-files split]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
The MAC address for the wmac 2.4 GHz radio of the Ubiquiti UniFi AC
family of devices is actually embedded in the mtd-cal-data, so there
is no need for mtd-mac-address (which was incorrectly forcing wmac
to have the same MAC as eth0). This makes it coherent with the stock
firmware and the ar71xx target:
· XX:XX:XX:X0:XX:XX eth0
· XX:XX:XX:X1:XX:XX ath0/wlan1 (2.4 GHz)
· XX:XX:XX:X2:XX:XX ath1/wlan0 (5 GHz)
Checked on a UniFi AC Mesh, a UniFi AC LR and a UniFi Lite.
Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
For several devices, wmac MAC address is set from art 0x1002
explicitly by using mtd-mac-address although mtd-cal-data is
pulled from art 0x1000.
With the MAC address in 0x1002, the driver should automatically
use it when reading caldata from 0x1000. Thus, remove the
redundant mtd-mac-address for those devices.
This patch addresses the cases where the calibration data partition
is not labelled art, having been overlooked in the first patch.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This fixes several issues introduced with ZyXEL NBG6716 support:
- Inhomogeneous indent
- Wrong ath10k MAC patching function
- Wrong brackets for pad-to in nand.mk
- Add missing DEVICE_MODEL
- Remove k2t.sh include (copy/paste leftover)
Fixes: 99835e0999 ("ath79: add support for ZyXEL NBG6716")
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This patch adds ath79 support for Netgear WNR2200.
Router was previously supported by ar71xx target only (8 MiB variant).
Netgear WNR2200 has two flash versions - 8MiB sold in EU, US etc. and
16 MiB for Russia and China markets. Apart from flash size both variants
share the same hardware specification.
Specification
=============
* Description: Netgear WNR2200
* Loader: U-boot
* SOC: Atheros AR7241 (360 MHz)
* RAM: 64 MiB
* Flash: 8 MiB or 16 MiB (SPI NOR)
- U-boot binary: 256 KiB
- U-boot environment: 64 KiB
- Firmware: 7808 KiB or 16000 KiB
- ART: 64 KiB
* Ethernet: 4 x 10/100 LAN + 1 x 10/100 WAN
* Wireless: 2.4 GHz b/g/n (Atheros AR9287)
* USB: yes, 1 x USB 2.0
* Buttons:
- Reset
- WiFi (rfkill)
- WPS
* LEDs:
- Power (amber/green)
- WAN (amber/green)
- WLAN (blue)
- 4 x LAN (amber/green)
- WPS (green)
* UART: 4-pin connector JP1, 3.3V (Vcc, TX, RX, GND), 115200 8N1
* Power supply: DC 12V 1.5A
* MAC addresses: LAN on case label, WAN +1, WLAN +2
Installation
============
* TFTP recovery
* TFTP via U-boot prompt
* sysupgrade
* Web interface
Test build configuration
========================
CONFIG_TARGET_ath79=y
CONFIG_TARGET_ath79_generic=y
CONFIG_TARGET_ath79_generic_DEVICE_netgear_wnr2200-8m=y
CONFIG_ALL_KMODS=y
CONFIG_DEVEL=y
CONFIG_CCACHE=y
CONFIG_COLLECT_KERNEL_DEBUG=y
CONFIG_IMAGEOPT=y
CONFIG_KERNEL_DEBUG_INFO=y
CONFIG_KERNEL_DEBUG_KERNEL=y
Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
This commit adds support for the Aerohive HiveAP-121. It was previously
already supported in the ar71xx subtarget.
The following is copied from the commit which added ar71xx support:
Specification:
- SoC: Atheros AR9344-BC2A at 560MHz
- WiFi 1: 2.4GHz Atheros AR9340? - SoC
- WiFi 2: 5.0GHz Atheros AR9382-AL1A
- Memory: 128MB from 2x Nanya NT5TU32M16DG-AC
- SPI: 1MB Macronix MX25L8006E
- NAND: 128MB Hynix H27U1G8F2BTR-BC
- Ethernet: Atheros AR8035-A
- USB: 1x 2.0
- TPM: Atmel SC3204
Flashing:
1. Hook into UART (9600 baud) and enter U-Boot. You may need to enter
a password of administrator or AhNf?d@ta06 if prompted.
2. Once in U-Boot, download and flash LEDE factory image over tftp:
dhcp;
setenv serverip tftp-server-ip;
tftpboot 0x81000000 lede-ar71xx-nand-hiveap-121-squashfs-factory.bin;
nand erase 0x800000 0x800000;
nand write 0x81000000 0x800000 0x800000;
reset;
Signed-off-by: David Bauer <mail@david-bauer.net>
For several devices, wmac MAC address is set from art 0x1002
explicitly by using mtd-mac-address although mtd-cal-data is
pulled from art 0x1000.
With the MAC address in 0x1002, the driver should automatically
use it when reading caldata from 0x1000. Thus, remove the
redundant mtd-mac-address for those devices.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Tested-by: Jeff Kletsky <git-commits@allycomm.com>
Tested-by: Karl Palsson <karlp@etactica.com>
Attention: Kernel partition size has been enlarged to 4MB.
To switch, you must update to latest ar71xx-nand snapshort and flash the
sysupgrade-4M-Kernel.bin:
zcat openwrt-ath79-nand-zyxel_nbg6716-squashfs-sysupgrade-4M-Kernel.bin | mtd -r -e ubi write - firmware; reboot -f
You will end up with a fresh config if you do not inject config into the image.
The NBG6716 may come with 128MB or 256MB NAND. ar71xx was able to use all, but
ath79 can only use the first 128MB. Therefore the complete NAND needs to be
overwritten. If not, the old UBI may make problems and lead to reboot loop.
Access the real u-boot shell:
ZyXEL uses a proprietary loader/shell on top of u-boot: "ZyXEL zloader v2.02"
When the device is starting up, the user can enter the the loader shell
by simply pressing a key within the 3 seconds once the following string
appears on the serial console:
| Hit any key to stop autoboot: 3
The user is then dropped to a locked shell.
|NBG6716> HELP
|ATEN x[,y] set BootExtension Debug Flag (y=password)
|ATSE x show the seed of password generator
|ATSH dump manufacturer related data in ROM
|ATRT [x,y,z,u] RAM read/write test (x=level, y=start addr, z=end addr, u=iterations)
|ATGO boot up whole system
|ATUR x upgrade RAS image (filename)
|NBG6716>
In order to escape/unlock a password challenge has to be passed.
Note: the value is dynamic! you have to calculate your own!
First use ATSE $MODELNAME (MODELNAME is the hostname in u-boot env)
to get the challange value/seed.
|NBG6716> ATSE NBG6716
|012345678901
This seed/value can be converted to the password with the help of this
bash script (Thanks to http://www.adslayuda.com/Zyxel650-9.html authors):
- tool.sh -
ror32() {
echo $(( ($1 >> $2) | (($1 << (32 - $2) & (2**32-1)) ) ))
}
v="0x$1"
a="0x${v:2:6}"
b=$(( $a + 0x10F0A563))
c=$(( 0x${v:12:14} & 7 ))
p=$(( $(ror32 $b $c) ^ $a ))
printf "ATEN 1,%X\n" $p
- end of tool.sh -
|# bash ./tool.sh 012345678901
|
|ATEN 1,879C711
copy and paste the result into the shell to unlock zloader.
|NBG6716> ATEN 1,0046B0017430
If the entered code was correct the shell will change to
use the ATGU command to enter the real u-boot shell.
|NBG6716> ATGU
|NBG6716#
Signed-off-by: André Valentin <avalentin@marcant.net>
The GL-AR750S has an internal header for I2C.
Provide DTS definitions for the i2c-gpio driver.
The I2C drivers; kmod-i2c-core, kmod-i2c-gpio
consume ~20 kB of flash and can be loaded as modules,
Default clock measured ~11.2 ms period, ~89 kHz
The board has well-labeled (unpopulated) headers for serial and I2C
along the front edge of the board (the edge with the LEDs). Looking
from the top, rear of the unit (behind Ethernet jacks)
-------------------------------------------
5G_LED 2G_LED PWR_LED
O O O O O O O
3 S S G T R G
V C D N X X N
3 L A D D
Signed-off-by: Jeff Kletsky <git-commits@allycomm.com>
The GL-AR300M series have an internal header for I2C.
Provide DTS definitions for the i2c-gpio driver.
The I2C drivers; kmod-i2c-core, kmod-i2c-gpio
consume ~20 kB of flash and can be loaded as modules,
Default clock measured ~11.4 ms period, ~88 kHz
The board has two sets of (unpopulated) headers. While facing the
back of the board (looking into the Ethernet jacks), and looking from
the top, the one on the left edge of the baord with four holes is the
I2C header. It appears to be labeled J8 on "GL-AR300M-V1.4.0" boards.
| (Patch antenna)
|
|
| O GND
| O SDA / GPIO 17
| O SCL / GPIO 16
| ⊡ 3V3 (square land)
|
| (Ethernet jacks)
https://docs.gl-inet.com/en/3/hardware/ar300m/#pcb-pinout states
"Note: I2C is not working in some early version of the router."
Signed-off-by: Jeff Kletsky <git-commits@allycomm.com>
This patch improves ath79 support for Netgear WNR612v2.
Router functionality becomes identical to ar71xx version.
Changes include:
* software control over LAN LEDs via sysfs
* correct MAC addresses for network interfaces
* correct image size in device definition
* dts: 'keys' renamed to 'ath9k-keys'
* dts: 'label-mac-device' set to eth1 (LAN)
* dts: formatting adjustments
Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
Currently AR724x pinmux for register 0x18040028 controls only JTAG disable bit.
This patch adds new DTS settings to control LAN LEDs and CLKs that allow
full software control over these diodes - exactly the same is done by ar71xx
target in device setup phase for many routers (WNR2000v3 for example).
'switch_led_disable_pins' clears AR724X_GPIO_FUNC_ETH_SWITCH_LED[0-4]_EN bits.
'clks_disable_pins' clears AR724X_GPIO_FUNC_CLK_OBS[1-5]_EN and
AR724X_GPIO_FUNC_GE0_MII_CLK_EN bits. These all should be used together, along
with 'jtag_disable_pins', to allow OS to control all GPIO-connected LEDs and
buttons on device.
Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
Sitecom WLR-7100 v1 002 (marketed as X7 AC1200) is a dual band wireless
router.
Specification
SoC: Atheros AR1022
RAM: 64 MB DDR2
Flash: 8 MB SPI NOR
WIFI: 2.4 GHz 2T2R integrated
5 GHz 2T2R QCA9882 integrated (connected to PCIe lane)
Ethernet: 5x 10/100/1000 Mbps QCA8337N
USB: 1x 2.0
LEDS: 4x GPIO controlled, 5x switch
Buttons: 2x GPIO controlled
UART: row of 4 unpopulated holes near USB port, starting count from
white triangle on PCB
1. VCC 3.3V, 2. GND, 3. TX, 4. RX
baud: 115200, parity: none, flow control: none
Installation
1. Connect to one of LAN (yellow) ethernet ports,
2. Open router configuration interface,
3. Go to Toolbox > Firmware,
4. Browse for OpenWrt factory image with dlf extension and hit Apply,
5. Wait few minutes, after the Power LED will stop blinking, the router
is ready for configuration.
Known issues
5GHz LED doesn't work
Additional information
When TX line on UART is connected, and board is switched on from power
off state, the DDR memory training may fail.
If connected to UART, when prompted for number on boot, one can enter
number 4 to open bootloader (U-Boot) command line.
OEM firmware shell password is: SitecomSenao
useful for creating backup of original firmware.
There is also another revision of this device (v1 001), which may or may
not work with introduced images.
Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
The device did not appear to be reachable unless the connection were
forced to 100Mb or lower. Revert to previously working pll-data.
Also fix the phy-mode to represent the actual state needed for ethernet
to function.
Reported-by: Moritz Schreiber <moritz@mosos.de>
Signed-off-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
[add remark about phy-mode property]
Signed-off-by: David Bauer <mail@david-bauer.net>
This patch contains updated driver for Atheros NAND Flash Controller
written originally by Gabor Juhos for ar71xx (aka 'ar934x-nfc').
ath79 version has adapted to work with kernel 4.19 and Device Tree.
It has also been renamed to 'ar934x-nand' to avoid confusion with
Near-Field Communication technology.
Controller is present on Atheros AR934x SoCs and required for accessing
internal flash storage on routers like Netgear WNDR4300.
This port preserves all NAND programming code while moving platform
configuration to Device Tree and replacing some kernel functions marked
for retirement by 4.19.
Suitable definition is included in 'ar934x.dtsi' ('nand@1b000200' section).
Most important changes to ar71xx version are:
* old kernel sections of code removed
* 'bool swap_dma' provided by platform data is now set by boolean DT
property 'qca,nand-swap-dma'
* board-supplied (mach-*.c code) platform data removed - its elements
become either unused, redundant or replaced by DT methods (like reset)
* IRQ is reserved by devm_request_irq() so free_irq() is not needed anymore
* calls to deprecated nand_scan_ident() + nand_scan_tail() function pair
replaced by using recommended nand_scan() with attach_chip() callback
* ECC is set to hardware by default, can be overriden by standard DT
'nand-ecc-*' properties (software Hamming or BCH are other options)
This driver has been successfully tested on Netgear WNDR4300 running
experimental ath79 OpenWrt master branch.
Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
[add reset control]
Signed-off-by: David Bauer <mail@david-bauer.net>
Modify GL-AR300M-Lite and GL-AR300M (NOR):
* Include qca9531_glinet_gl-ar300m.dtsi directly
rather than qca9531_glinet_gl-ar300m-nor.dts
* Remove redundant inclusion of gpio.h and input.h
Signed-off-by: Jeff Kletsky <git-commits@allycomm.com>
Reviewed-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
The Unifi AC-LR has identical hardware to the Unifi AC-Lite.
The antenna setup is different according to the vendor,
which explains the thicker enclosure.
Therefore, it is helpful to know the exact device variant,
instead of having "Ubiquiti UniFi-AC-LITE/LR".
Signed-off-by: Andreas Ziegler <dev@andreas-ziegler.de>
[fix legacy name in commit message; add old boardname to
SUPPORTED_DEVICES]
Signed-off-by: David Bauer <mail@david-bauer.net>
This patch adds support for the COMFAST CF-E313AC, an outdoor wireless
CPE with two Ethernet ports and a 802.11ac radio.
Specifications:
- QCA9531 SoC
- 650/400/216 MHz (CPU/DDR/AHB)
- 1x 10/100 Mbps WAN Ethernet, 48V PoE-in
- 1x 10/100 Mbps LAN Ethernet, pass-through 48V PoE-out
- 1x manual pass-through PoE switch
- 64 MB RAM (DDR2)
- 16 MB FLASH
- QCA9886 2T2R 5 GHz 802.11ac, 23 dBm
- 12 dBi built-in antenna
- POWER/LAN/WAN/WLAN green LEDs
- 4x RSSI LEDs (2x red, 2x green)
- UART (115200 8N1)
Flashing instructions:
The original firmware is based on OpenWrt so a sysupgrade image can be
installed via the stock web GUI. Settings from the original firmware
will be saved and restored on the new one, so a factory reset will be
needed. To do so, once the new firmware is flashed, enter into failsafe
mode by pressing the reset button several times during the boot
process, while the WAN LED flashes, until it starts flashing faster.
Once in failsafe mode, perform a factory reset as usual.
Alternatively, the U-boot bootloader contains a recovery HTTP server
to upload the firmware. Push the reset button while powering the
device on and keep it pressed for >10 seconds. The device's LEDs will
blink several times and the recovery page will be at
http://192.168.1.1; use it to upload the sysupgrade image.
Note:
Four MAC addresses are stored in the "art" partition (read-only):
- 0x0000: 40:A5:EF:AA:AA:A0
- 0x0006: 40:A5:EF:AA:AA:A2
- 0x1002: 40:A5:EF:AA:AA:A1
- 0x5006: 40:A5:EF:AA.AA:A3 (inside the 5 GHz calibration data)
The stock firmware assigns MAC addresses to physical and virtual
interfaces in a very particular way:
- eth0 corresponds to the physical Ethernet port labeled as WAN
- eth1 corresponds to the physical Ethernet port labeled as LAN
- eth0 belongs to the bridge interface br-wan
- eth1 belongs to the bridge interface br-lan
- eth0 is assigned the MAC from 0x0 (*:A0)
- eth1 is assigned the MAC from 0x1002 (*:A1)
- br-wan is forced to use the MAC from 0x1002 (*:A1)
- br-lan is forced to use the MAC from 0x0 (*:A0)
- radio0 uses the calibration data from 0x5000 (which contains
a valid MAC address, *:A3). However, it is overwritten by the
one at 0x6 (*:A2)
This commit preserves the LAN/WAN roles of the physical Ethernet
ports (as labeled on the router) and the MAC addresses they expose
by default (i.e., *:A0 on LAN, *:A1 on WAN), but swaps the position
of the eth0/eth1 compared to the stock firmware:
- eth0 corresponds to the physical Ethernet port labeled as LAN
- eth1 corresponds to the physical Ethernet port labeled as WAN
- eth0 belongs to the bridge interface br-lan
- eth1 is the interface at @wan
- eth0 is assigned the MAC from 0x0 (*:A0)
- eth1 is assigned the MAC from 0x1002 (*:A1)
- br-lan inherits the MAC from eth0 (*:A0)
- @wan inherits the MAC from eth1 (*:A1)
- radio0's MAC is overwritten to the one at 0x6
This way, eth0/eth1's positions differ from the stock firmware, but
the weird MAC ressignations in br-lan/br-wan are avoided while the
external behaviour of the router is maintained. Additionally, WAN
port is connected to the PHY gmac, allowing to monitor the link
status (e.g., to restart DHCP negotiation when plugging a cable).
Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
This addresses several issues in the DTS file:
- add diag LED support
- remove unused node names
- fix whitespace issues
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This is the result of grepping/searching for several common
whitespace issues like double empty lines, leading spaces, etc.
This patch fixes them for the ath79 target.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
The relationship between GMAC0 and GMAC1 and the kernel devices
eth0 and eth1 was reversed for many ath79 devices by commit 8dde11d521
ath79: dts: drop "simple-mfd" for gmacs in SoC dtsi
The GL-AR300M-Lite is a single-port device, with the "LAN" port of the
GL-AR300M board unpopulated and its sole port now referenced as eth1,
as a result of commit 8dde11d521. The device was unreachable on
first boot or fresh config.
By changing ð1 (GMAC1) to an MFD, GMAC0 is able to associate with
the phy and is known by the kernel as "eth0".
Thanks to Chuanhong Guo for the suggestion of "simple-mfd"
Signed-off-by: Jeff Kletsky <git-commits@allycomm.com>
This converts all remaining devices to use interrupt-driven
gpio-keys compatible instead of gpio-keys-polled.
The poll-interval is removed.
Only ar7240_netgear_wnr612-v2 is kept at gpio-keys-polled, as
this one is using ath9k keys.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Tested-by: Karl Palsson <karlp@etactica.com>
Tested-by: Dmitry Tunin <hanipouspilot@gmail.com>
Add support for the ar71xx supported Netgear WNDR3800CH to ath79.
The device is identical to WNDR3800 except NETGEAR_BOARD_ID.
Signed-off-by: Dmitry Tunin <hanipouspilot@gmail.com>
Reviewed-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This patch adds the label MAC address for several devices in
ath79.
Some devices require setting the MAC address in 02_network:
For the following devices, the netif device can be linked in
device tree, but the MAC address cannot be read:
- alfa-network,ap121f
- avm,fritz300e
- ubnt-xm devices
For the following devices, label MAC address is tied to lan or
wan, so no node to link to exists in device tree:
- adtran,bsap1800-v2
- adtran,bsap1840
- dlink,dir-842-c1/-c2/-c3
- engenius,ecb1750
- iodata,etg3-r
- iodata,wn-ac1167dgr
- iodata,wn-ac1600dgr
- iodata,wn-ac1600dgr2
- iodata,wn-ag300dgr
- nec,wg800hp
- nec,wg1200cr
- trendnet,tew-823dru
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Add ath79 support for Archer C59v2, previously supported by ar71xx.
TP-Link Archer C59v2 is a dual-band AC1350 router based on
Qualcomm/Atheros QCA9561+QCA9886 chips.
Specification:
- 775/650/258 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 16 MB of FLASH (SPI NOR)
- 3T3R 2.4 GHz
- 2T2R 5 GHz
- 5x 10/100 Mbps Ethernet
- USB 2.0 port
- UART header on PCB
Flash instruction:
- via web UI:
1. Download openwrt-ath79-generic-tplink_archer-c59-v2-squashfs-factory.bin
2. Login to router and open the Advanced tab
3. Navigate to System Tools -> Firmware Upgrade
4. Upload firmware using the Manual Upgrade form
- via TFTP:
1. Set PC to fixed ip address 192.168.0.66
2. Download openwrt-ath79-generic-tplink_archer-c59-v2-squashfs-factory.bin
and rename it to tp_recovery.bin
3. Start a tftp server with the file tp_recovery.bin in its root directory
4. Turn off the router
5. Press and hold Reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time
the firmware should be transferred from the tftp server
8. Wait ~30 second to complete recovery.
Signed-off-by: Keith Maika <keithm@aoeex.com>
The Archer C58/C59 have redundant LED and MAC address definitions
in their DTS files. This moves them to the parent DTSI file.
The patch already accounts for the upcoming Archer C59 v2.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This enables using the "eTactica" LED during boot, to indicate failsafe,
and during upgrade, while still leaving the LED alone for normal
operation. This brings the device more in line with how other devices
work, and makes the failsafe functionality easier to use and understand.
Signed-off-by: Karl Palsson <karlp@etactica.com>
The UniFi AC LED mapping is currently off. The blue/white LED are used
as WiFi indicators, while the vendor firmware does not feature WiFI
LEDs.
Instead, the LEDs are used to indicate the devices status. Align the LED
mapping to match the vendor firmware as good as possible.
Signed-off-by: David Bauer <mail@david-bauer.net>
Hardware:
SoC: AR9344
CPU: 560 MHz
Flash: 8 MiB
RAM: 128 MiB
WiFi: Atheros AR9340 2.4GHz 802.11bgn
Atheros AR9300 5GHz 802.11an
Ethernet: AR934X built-in switch, WAN on separate physical interface
USB: 1x 2.0
Flash instruction (WebUI):
Download *-factory.bin image and upload it via the firmwary upgrade
function of the stock firmware WebUI.
Flash instruction (TFTP):
1. Set PC to fixed ip address 192.168.0.66
2. Download *-factory.bin image and rename it to
wdr3500v1_tp_recovery.bin
3. Start a tftp server with the image file in its root directory
4. Turn off the router
5. Press and hold Reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time
the firmware should be transferred from the tftp server
8. Wait ~30 second to complete recovery.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
[removed stray newline]
Signed-off-by: David Bauer <mail@david-bauer.net>
The frequency was filled acording the information from datasheet for
particular chip (Winbond 25Q128BVFG). Unfortunately this led to
coruption and introduced bad blocks on the chip. Reducing the frequency
to commonly used in ath79, made the board more stable and no new bad
blocks were spoted.
Fixes: b3a0c97 ("ath79: add support for jjPlus JA76PF2")
Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
This fixes the previously incorrect phy-mode for the OCEDO Ursus GMAC0.
See 62abbd587d ("ath79: correct various phy-mode properties")
for more details.
Signed-off-by: David Bauer <mail@david-bauer.net>
The button is labelled reboot/restore in documentation, and has always
been used for that. Naming it WPS has always been wrong.
Signed-off-by: Karl Pálsson <karlp@etactica.com>
[matched author to SoB]
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
This patch creates a shared DTSI for the TP-Link devices based
on ar9341 as those share a lot of definitions.
While at it, change from gpio-keys-polled to gpio-keys, remove
unused pll-data and remove some inherited stuff, too.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Specifications:
- SoC: ar9341
- RAM: 32M
- Flash: 4M
- Ethernet: 5x FE ports
- WiFi: ar9341-wmac
Flash instruction:
Upload generated factory firmware on vendor's web interface.
This changes the key assignment compared to ar71xx support of this
device, since of the two keys on the device one is used as combined
Reset/WPS and the second one as WiFi on/off button.
Despite, the reset button required GPIO_ACTIVE_HIGH to work correctly.
Signed-off-by: Lim Guo Wei <limguowei@gmail.com>
[redo commit message]
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
The TP-Link TL-WR842N v3 has a software-controllable Power LED. The WPS
LED is normally only used as a System LED, when the Power LED can't be
controlled by software.
Additionally, the Power LED is also the System LED for this board in
ar71xx.
Signed-off-by: David Bauer <mail@david-bauer.net>
This replaces gpio-export by gpio-hogs and switches buttons
to interrupt-driven gpio-keys.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This is a dual band 11a/11n router with 1x wan and 4x gig lan ports.
There are two versions of this router which can be identified through
the factory web interface, v1 has 128mb ram and a uboot size of 128k,
v2 has 256mb ram and a uboot size of 256k, the remaining hardware and
PCB markings are the same.
Short specification:
SoC: Qualcomm Atheros QCA9558 - 720 MHz
Switch: Atheros AR8327
Second radio : Qualcomm Atheros QCA9880 802.11ac
4 LAN/1 WAN 1000Mps Ethernet
256 MB of RAM (DDR2)
16 MB of FLASH
3x2.4 GHz, 3x5GHz antennas
Steps to install :
Option A : Use vendor UI
Option B (if A is not working) :
(a) Download 'backup' from vendor UI and rename it backup.tar.gz
(b) Open the archive, and update the root password in /etc/shadow by
'$1$9wX3HGfB$X5Sb3kqzzBLdKRUR2kfFd0'
(c) 'Restore' from the archive using the vendor UI. Root password is now
'aaa'
(d) Scp the firwmware to the device:
$ scp <openwrt-sysupgrade>.bin root@192.168.1.1:/
(d) ssh to the device and flash the firmware:
$ cd /
$ mtd -e firmware -r write <openwrt-sysupgrade>.bin firmware
Signed-off-by: Gareth Parker <gareth41@orcon.net.nz>
Signed-off-by: Ding Tengfei <dtf@comfast.cn>
Signed-off-by: Joan Moreau <jom@grosjo.net>
[reformatted commit message]
Signed-off-by: David Bauer <mail@david-bauer.net>
Taken code from https://patchwork.ozlabs.org/patch/884850/ that was never
pushed by the author, and adapted to ath79.
The Comfast E314N-V2 is a 2.4 GHz 2x2 radio with a built-in directional
antenna and a second Ethernet port - very similar to the Ubiquiti
NanoStation M2. The Ethernet port features a pass-through PoE capability,
enabled or disabled with a slide switch.
Specifications :
- System-On-Chip: Qualcomm/Atheros QCA9531
- CPU/Speed: 650 MHz
- Flash size: 8 MiB
- RAM: 64 MiB
- 2 Ethernet 1Gbp
- 1 reset button
- 1 switch to choose PoE from LAN or Wan. 48Vdc
- Wifi 2.4 Ghz (b/g/n)
- UART inside the box (3.3V, pins marked on the PCB)
Firmware can be flashed on these units by the following method:
1.) Apply power to the unit
2.) Immediately AFTER applying power, hold down the reset button
3.) The WAN, LAN, and wireless lights will flash - wait three seconds
(three flashes) and then release the button.
4.) After a second, the lights will flutter quickly and the unit will be
visible at 192.168.1.1. A web page will be available to enable quick
and simple uploading and flashing of firmware.
During the boot process, these units also look for a tftp server at
192.168.1.10. If one is present, the firmware can be uploaded as a file
called firmware-auto.bin
Signed-off-by: Joan Moreau <jom@grosjo.net>
[wrapped commit message - fix commit title capitalization]
Signed-off-by: David Bauer <mail@david-bauer.net>
Specifications:
- SoC: AR9341
- RAM: 64M
- Flash: 16M
- Ethernet: 1 * FE port
- WiFi: ar934x-wmac
- Sound: WM8918 DAC
1 * 3.5mm headphone jack
2 * RCA connectors for speakers
1 * SPDIF out
- USB: 1 * USB2.0 port
Flash instruction:
Upload generated factory image via vendor's web interface.
Notes:
A. Audio stuff:
1. Since AR934x, all pins for peripheral blocks can be mapped to
any available GPIOs. We currently don't have a PCM/I2S driver
for AR934x so pinmux for i2s and SPDIF are bound to i2c gpio
node. This should be moved into I2S node when a PCM/I2S driver
is available.
2. The i2c-gpio node is for WM8918. DT binding for it can't be added
currently due to a missing clock from I2S PLL.
B. Factory image:
Image contains a image header and a tar.gz archive.
1. Header: A 288 byte header that has nothing to do with appended
tarball. Format:
0x0-0x7 and 0x18-0x1F: magic values
0x20: Model number string
0xFC: Action string. It's either "update" or "backup"
0x11C: A 1 byte checksum. It's XOR result of 0x8-0x11B
Firmware doesn't care about the rest of the header as long as
checksum result is correct.
The same header is used for backup and update routines so the
magic values and model number can be obtained by generating a
backup bin and grab values from it.
2. Tarball: It contains two files named uImage and rootfs, which
will be flashed into corresponding mtd partition.
Writing a special utility that can only output a fixed binary
blob is overkill so factory image header is placed under
image/bin instead.
C. LED
The wifi led has "Wi-Fi" marked on the case but vendor's firmware
used it as system status indicator. I did the same in this device
support patch.
D. Firmware
Factory u-boot is built without 'savenv' support so it's impossible
to change kernel offset. A 2MB kernel partition won't be enough in
the future. OKLI loader is used here to migrate this problem:
1. add OKLI image magic support into uImage parser.
2. build an OKLI loader, compress it with lzma and add a normal
uImage header.
3. flash the loader to where the original kernel supposed to be.
4. create a uImage firmware using OKLI loader.
5. flash the created firmware to where rootfs supposed to be.
By doing so, u-boot will start OKLI loader, which will then load
the actual kernel at 0x20000.
The kernel partition is 2MB, which is too much for our loader.
To save this space, "mtd-concat" is used here:
1. create a 64K (1 erase block) partition for OKLI loader and
create another partition with the left space.
2. concatenate rootfs and this partition into a virtual flash.
3. use the virtual flash for firmware partition.
Currently OKLI loader is flashed with factory image only.
sysupgrade won't replace it. Since it only has one function
and it works for several years, its unlikely to have some bugs
that requires a replacement.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Hardware spec of DIR-842 C3:
SoC: QCA9563
DRAM: 128MB DDR2
Flash: 16MB SPI-NOR
Switch: QCA8337N
WiFi 5.8GHz: QCA9888
WiFi 2.4Ghz: QCA9563
USB: circuit onboard, but components are not soldered
Flash instructions:
1. Upgrade the factory.bin through the factory web interface or
the u-boot failsafe interface.
The firmware will boot up correctly for the first time.
Do not power off the device after OpenWrt has booted.
Otherwise the u-boot will enter failsafe mode as the checksum
of the firmware has been changed.
2. Upgrade the sysupgrade.bin in OpenWrt.
After upgrading completes the u-boot won't complain about the
firmware checksum and it's OK to use now.
3. If you powered off the device before upgrading the sysupgrade.bin,
just upgrade the factory.bin through the u-boot failsafe interface
and then goto step 2.
Signed-off-by: Perry Melange <isprotejesvalkata@gmail.com>
According to detective grep, with this patch all devices should
be labelled "TP-Link" consistently.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This seems to be identical to CPE210 v1 despite having removable
antennas.
Specifications:
* SoC: Qualcomm Atheros AR9344 (560 MHz)
* RAM: 64MB
* Storage: 8 MB
* Wireless: 2.4GHz N based built into SoC 2x2
* Ethernet: 2x 100/10 Mbps, integrated into SoC, 24V POE IN
Installation:
Flash factory image through stock firmware WEB UI
or through TFTP:
To get to TFTP recovery just hold reset button while powering on for
around 4-5 seconds and release.
Rename factory image to recovery.bin
Stock TFTP server IP:192.168.0.100
Stock device TFTP address:192.168.0.254
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
TP-Link CPE510-v1 is an outdoor wireless CPE for 5 GHz with
two Ethernet ports based on Atheros AR9334
Specifications:
- 560/450/225 MHz (CPU/DDR/AHB)
- 2x 10/100 Mbps Ethernet, 1x PoE-in, 1x PoE-out
- 64 MB of DDR2 RAM
- 8 MB of SPI-NOR Flash
- 2T2R 5 GHz
- 13 dBi built-in antenna
- Power, LAN0, LAN1 green LEDs
- 4x green RSSI LEDs
Flash factory image through stock firmware WEB UI
or through TFTP:
To get to TFTP recovery just hold reset button while powering on for
around 4-5 seconds and release.
Rename factory image to recovery.bin
Stock TFTP server IP:192.168.0.100
Stock device TFTP address:192.168.0.254
Based on the work of Paul Wassi <p.wassi@gmx.at>
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Specifications:
* SoC: Qualcomm Atheros AR9344 (560 MHz)
* RAM: 64MB
* Storage: 8 MB
* Wireless: 2.4GHz N based built into SoC 2x2
* Ethernet: 2x 100/10 Mbps, integrated into SoC, 24V POE IN
Installation:
Flash factory image through stock firmware WEB UI
or through TFTP:
To get to TFTP recovery just hold reset button while powering on for
around 4-5 seconds and release.
Rename factory image to recovery.bin
Stock TFTP server IP:192.168.0.100
Stock device TFTP address:192.168.0.254
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This puts some common code into a new shared DTSI. Common nodes
are chosen so that the new DTSI can be used for CPE210 v1, too.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This adds support for several TP-Link devices based on TP9343
("a QCA9561 without PCIe and USB"):
- TL-WR940N v3
- TL-WR940N v4
- TL-WR941ND v6
The devices are only different concerning LEDs and MAC address
assignment.
All TL-WR940 are with non-detachable antennas (N), all
TL-WR941 devices are with detachable antennas (ND).
Specification:
- 750 MHz CPU
- 32 MB of RAM
- 4 MB of FLASH
- 2.4 GHz WiFi
- 4x 10/100 Mbps Ethernet
Flash instruction (WebUI):
Download *-factory.bin image and upload it via the firmwary upgrade
function of the stock firmware WebUI.
Flash instruction (TFTP):
1. Set PC to fixed ip address 192.168.0.66
2. Download *-factory.bin image and rename it to * (see below)
3. Start a tftp server with the image file in its root directory
4. Turn off the router
5. Press and hold Reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time
the firmware should be transferred from the tftp server
8. Wait ~30 second to complete recovery.
* TFTP image names:
940 v3: wr941ndv6_tp_recovery.bin
940 v4: wr940nv4_tp_recovery.bin
941 v6: wr941ndv6_tp_recovery.bin
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Hardware spec of DIR-842 C1:
SoC: QCA9563
DRAM: 128MB DDR2
Flash: 16MB SPI-NOR
Switch: QCA8337N
WiFi 5.8GHz: QCA9888
WiFi 2.4Ghz: QCA9563
USB: circuit onboard, but components are not soldered
Flash instructions:
1. Upgrade the factory.bin through the factory web interface or
the u-boot failsafe interface.
The firmware will boot up correctly for the first time.
Do not power off the device after OpenWrt has booted.
Otherwise the u-boot will enter failsafe mode as the checksum
of the firmware has been changed.
2. Upgrade the sysupgrade.bin in OpenWrt.
After upgrading completes the u-boot won't complain about the
firmware checksum and it's OK to use now.
3. If you powered off the device before upgrading the sysupgrade.bin,
just upgrade the factory.bin through the u-boot failsafe interface
and then goto step 2.
Signed-off-by: Jackson Lim <jackcolentern@gmail.com>
[fix whitespace issues]
Signed-off-by: David Bauer <mail@david-bauer.net>
This router has the same hardware as TP-LINK TL-WR841N/ND v11 (same
FCC ID, same TFTP image name...).
Flash instruction (WebUI):
Download *-factory.bin image and upload it via the firmwary upgrade
function of the stock firmware WebUI.
Flash instruction (TFTP):
1. Set PC to fixed ip address 192.168.0.66
2. Download *-factory.bin image and rename it to wr841nv11_tp_recovery.bin
(it's really v11, not v12)
3. Start a tftp server with the image file in its root directory
4. Turn off the router
5. Press and hold Reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time
the firmware should be transferred from the tftp server
8. Wait ~30 second to complete recovery.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
The TL-WR841N/ND v10 is mostly identical to the v9. Apart from some minor
changes, it contains a newer revision of the QCA9533 SoC and the CPU clock
is significantly higher.
Flash instruction (WebUI):
Download *-factory.bin image and upload it via the firmwary upgrade
function of the stock firmware WebUI.
Flash instruction (TFTP):
1. Set PC to fixed ip address 192.168.0.66
2. Download *-factory.bin image and rename it to wr841nv10_tp_recovery.bin
3. Start a tftp server with the image file in its root directory
4. Turn off the router
5. Press and hold Reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time
the firmware should be transferred from the tftp server
8. Wait ~30 second to complete recovery.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This commit ports support for the ALFA Network AP121F, a pocket-size
router with 1 Ethernet and 2.4 GHz WiFi based on the AR9331 SoC, to the
ath79 target (it was already supported in ar71xx; see commit 0c6165d2
for more details).
Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
[pepe2k@gmail.com: fixed GPIO polarity, included USB support, changed
DTS nodes order, moved WLAN LED trigger define to DTS, made U-Boot env
partition writable]
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
The lines-initial-states property was an early attempt to set the latch
bit of the shift register on driver probe. It is not implemented in the
driver and was rejected upstream. The latch bit was always set by a GPIO
hog, so this property is safe to drop.
Signed-off-by: David Bauer <mail@david-bauer.net>
Hardware spec of DIR-842 C2:
SoC: QCA9563
DRAM: 128MB DDR2
Flash: 16MB SPI-NOR
Switch: QCA8337N
WiFi 5.8GHz: QCA9888
WiFi 2.4Ghz: QCA9563
USB: 2.0
Flash instructions:
1. Upgrade the factory.bin through the factory web interface or
the u-boot failsafe interface.
The firmware will boot up correctly for the first time.
Do not power off the device after OpenWrt has booted.
Otherwise the u-boot will enter failsafe mode as the checksum
of the firmware has been changed.
2. Upgrade the sysupgrade.bin in OpenWrt.
After upgrading completes the u-boot won't complain about the
firmware checksum and it's OK to use now.
3. If you powered off the device before upgrading the sysupgrade.bin,
just upgrade the factory.bin through the u-boot failsafe interface
and then goto step 2.
Signed-off-by: Jackson Lim <jackcolentern@gmail.com>
[Reword reset-hog comment, fix formatting]
Signed-off-by: David Bauer <mail@david-bauer.net>
TP-Link Archer C60 v2 is a dual-band AC1350 router,
based on Qualcomm/Atheros QCA9561 + QCA9886.
Specification:
- 775/650/258 MHz (CPU/DDR/AHB)
- 64 MB of RAM (DDR2)
- 8 MB of FLASH (SPI NOR)
- 3T3R 2.4 GHz
- 2T2R 5 GHz
- 5x 10/100 Mbps Ethernet
- 7x LED, 2x button
- UART header on PCB
Flash instruction (WebUI):
Download *-factory.bin image and upload it via the firmwary upgrade
function of the stock firmware WebUI.
Flash instruction (TFTP):
1. Set PC to fixed IP address 192.168.0.66
2. Download *-factory.bin image and rename it to tp_recovery.bin
3. Start a tftp server with the file tp_recovery.bin in its root
directory
4. Turn off the router
5. Press and hold reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time the firmware should
be transferred from the tftp server
8. Wait ~30 second to complete recovery
Flash instruction (under U-Boot, using UART):
tftp 0x81000000 ...-sysupgrade.bin
erase 0x9f030000 +$filesize
cp.b $fileaddr 0x9f030000 $filesize
reset
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
TP-Link Archer C60v1 is a dual-band AC1350 router,
based on Qualcomm/Atheros QCA9561+QCA9886.
Specification:
- 775/650/258 MHz (CPU/DDR/AHB)
- 64 MB of RAM (DDR2)
- 8 MB of FLASH (SPI NOR)
- 3T3R 2.4 GHz
- 2T2R 5 GHz
- 5x 10/100 Mbps Ethernet
- 7x LED, 2x button
- UART header on PCB
Flash instruction (WebUI):
Download *-factory.bin image and upload it via the firmwary upgrade
function of the stock firmware WebUI.
Flash instruction (TFTP):
1. Set PC to fixed ip address 192.168.0.66
2. Download *-factory.bin image and rename it to tp_recovery.bin
3. Start a tftp server with the file tp_recovery.bin in its root directory
4. Turn off the router
5. Press and hold Reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time
the firmware should be transferred from the tftp server
8. Wait ~30 second to complete recovery.
Flash instruction under U-Boot, using UART:
1. tftp 0x81000000 ...-sysupgrade.bin
2. erase 0x9f020000 +$filesize
3. cp.b $fileaddr 0x9f020000 $filesize
4. reset
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
TP-Link CPE510-v2/v3 is an outdoor wireless CPE for 5 GHz with
one Ethernet port based on Atheros AR9344
Specifications:
- Based on the same underlying hardware as the TP-Link CPE510
- Power, LAN, and 4 green LEDs
- 1 10/100Mbps Shielded Ethernet Port (Passive PoE in)
- Built-in 13dBi 2x2 dual-polarized directional MIMO antenna
- Adjustable transmission power from 0 to 23dBm/200mw
Flashing instructions:
Flash factory image through stock firmware WEB UI
or through TFTP
To get to TFTP recovery just hold reset button while powering on for
around 4-5 seconds and release.
Rename factory image to recovery.bin
Stock TFTP server IP:192.168.0.100
Stock device TFTP adress:192.168.0.254
Signed-off-by: Andrew Cameron <apcameron@softhome.net>
[whitespace fixes]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Trendnet TEW-823DRU is a dual-band AC1750 router.
The router is based on Qualcomm/Atheros QCA9558 + QCA9880.
Specification:
720 MHz CPU
256 MB of RAM
16 MB of FLASH
3T3R 2.4 GHz
3T3R 5 GHz
5x 10/100/1000 Mbps Ethernet
Firmware can be flashed from the web interface. Tested on 3 routers
with no issues.
Signed-off-by: Pramod Pancha <pancha@vill.com>
[whitespace fixes]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
This board was used in dual-band 802.11n enterprise access points, models
BSAP-1800v2 and BSAP-1840, introduced in 2010 by Bluesocket, which was
acquired by Adtran in 2011, who has now EOL'ed them. They differed only in
that the BSAP-1840's antennae were detachable, while the BSAP-1800v2's were
inside the case. They have an external RJ-45 console port, which works with
standard Cisco 72-3383-01 console cables.
Specification:
- System-On-Chip: AR7161
- CPU/Speed: 600 MHz
- Flash-Chip: Macronix MX25L12845E
- Flash size: 16 MiB
- RAM: 64 MiB
- Wireless No1: Lite-On WN2601A card: AR9160/AR9103 2.4GHz 802.11bgn
- Wireless No2: Lite-On WN2502A card: AR9160/AR9106 5GHz 802.11an
- PHY: Vitesse VSC8601, Rev. B
Installation:
1. Connect to the serial console using a terminal that supports YMODEM at
115200 bps, 8 data bits, no parity, 1 stop bit
2. Interrupt the bootloader using its password, which is: r00t
3. Issue the "fis init" command, confirming if prompted
4. Look at the length of the openwrt-ath79-generic-*-squashfs-kernel.bin
file, and substitute it below, instead of where I have "LeNgTh"
5. Issue the following command, and upload this file using YMODEM protocol
load -r -v -b 0x80060000 -m ymodem
6. Issue the following commands, substituting as mentioned above:
fis create -b 0x80060000 -l LeNgTh vmlinux_2
load -r -v -b 0x80100000 -m ymodem
7. Using YMODEM, upload openwrt-ath79-generic-*-squashfs-rootfs.bin
8. Issue the "fis free" command, and for the first range in its response,
use a hexadecimal calculator to subtract the start from the end in order
to substitute it below, with the leading "0x" to specify it in
hexadecimal, instead of where I have "LeNgTh"
9. Issue the following commands, substituting as mentioned above:
fis create -b 0x80100000 -l LeNgTh -e 0 -r 0 rootfs
reset
10.Wait for the status LED to go solid green
Tested-by: Brian Gonyer <bgonyer@gmail.com>
Signed-off-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
[fixed obsolete $ARGV in platform_do_upgrade]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
It was reported in FS#2385, that Carambola2 doesn't currently have
working watchdog so fix it by adding watchdog node.
Ref: FS#2385
Signed-off-by: Petr Štetiar <ynezz@true.cz>
according to functional block diagram in datasheet, these devices
don't belong to apb bus.
Move these nodes out to match datasheet description.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Specifications:
- SoC: AR9344
- RAM: 128MB
- Flash: 2 * 16MB (MX25L12845)
- Ethernet: 2 * FE LAN & 1 * FE WAN
- WiFi: 2.4G: AR9344 5G: QCA9882
Flash instruction:
1. Hold reset and power up the router
2. Set your IP to 192.168.1.x
3. Open 192.168.1.1 and upload the generated *factory* firmware
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Hardware
--------
CPU: Qualcomm Atheros QCA9558
RAM: 128M DDR2
FLASH: 16MiB
ETH: 1x Atheros AR8035 (PoE in)
WiFi2: QCA9558 3T3R
WiFi5: QCA9880 3T3R
BTN: 1x Reset
LED: 1x LED Power (non-controllable)
1x LED Status (internal)
1x LED LAN (controlled by PHY)
1x LED WLAN
BEEP: 1x GPIO attached piezo beeper
UART: 3.3V GND TX RX (115200-N-8) (3.3V is square pad)
Header is located next to external-LED header.
Installation
------------
Make sure you set a password for the root user as prompted on first
setup!
1. Upload OpenWRT sysupgrade image via SSH to the device.
Use /tmp as the destination folder on the device.
User is root, password the one set in the web interface.
2. Install OpenWRT with
> sysupgrade -n -F /tmp/<openwrt-image-name>
Signed-off-by: David Bauer <mail@david-bauer.net>
Increase the Kernel partition to address the issue discussed here
https://forum.openwrt.org/t/cpe610-v1-sysupgrade-bin-missing-too-big/39637/5
Switch Back to the okli Loader to support increased partition size
Signed-off-by: Andrew Cameron <apcameron@softhome.net>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com> [add <> for e-mail]
In ath79, identifiers tplink_tl-wdr3600 and tplink_tl-wdr4300 have
been used while most other TP-Link devices include the revision.
Although there actually is only one major revision of these
devices, they bear the revision on their bottom (v1.x). TP-Link
also refers to the devices as V1 on its web page.
This patch thus adds -v1 to both so it is more consistent
with other devices and with what you would expect from reading
the on-device sticker and the support pages.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This patch fixes the previous commit that rendered the
devices (mostly leds) useless.
Fixes: 1fa24de8c2 ("ath79: spi-gpio: convert deprecated binding")
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
TP-Link CPE610-v1 is an outdoor wireless CPE for 5 GHz with
one Ethernet port based on Atheros AR9344
Specifications:
- Based on the same underlying hardware as the TP-Link CPE510
- Power, LAN, WLAN5G green LEDs
- 23dBi high-gain directional 2×2 MIMO antenna and a dedicated metal reflector
Flashing instructions:
Flash factory image through stock firmware WEB UI
or through TFTP
To get to TFTP recovery just hold reset button while powering on for
around 4-5 seconds and release.
Rename factory image to recovery.bin
Stock TFTP server IP:192.168.0.100
Stock device TFTP adress:192.168.0.254
Signed-off-by: Andrew Cameron <apcameron@softhome.net>
Upstream commit 6d4cd04 changes how the internal delays of the AR803x
based PHYs are enabled. With this commit, all internal delays are
disabled on driver probe and enabled based on the 'phy-mode' property in
the device-tree.
Before this commit, the RX delay was always enabled upon soft-reset
while the TX delay retained it's previous state. A hard reset enabled
the RX delay while the TX delay was disabled.
Because of this inconsistency, wrongly specified PHY-modes were working
correctly while the hardware was in a different state.
Fix the PHY-modes of some affected devices (and clean up misplaced
properties along the way) to keep the devices working flawlessly with
kernels >= 5.1.
Signed-off-by: David Bauer <mail@david-bauer.net>
The TP-Link Archer C25 is a low-cost dual-band router.
Specification:
- CPU: Atheros QCA9561 775 MHz
- RAM: 64 MB
- Flash: 8 MB
- Wifi: 3x3 2.4 GHz (integrated), 1x1 5 GHz QCA9887
- NET: 5x 10/100 Mbps Ethernet
Some LEDs are controlled by an additional 74HC595 chip, but not
all of them as e.g. for the C59.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This patch harmonizes the label and alias for art partitions
across ath79. Since lower case seems to be more frequent, use that
consistently.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
The info/product-info partition, which frequently contains MAC
adresses, is typically assigned the 'info' alias in DTS, but
then labelled with 'info', 'product-info' or 'config'.
This leads to different aliases if used for setting MAC adresses
in DTS compared to when using e.g. mtd_get_mac_binary. Occationally,
also multiple switch-case entries are used just because of different
labelling.
This patch relabels those partitions in ath79 to consistently use
'info'.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Specifications:
- Atheros AR9331 (400 MHz)
- 64 MB of RAM (DDR2)
- 16 MB of Flash (SPI)
- 1T1R 2.4 Wlan (AR9331)
- 2x 10/100 Mbps Ethernet
- 3x LEDs, 1x gpio button
- 1x USB 2.0, 5V
- UART over usb, 115200n8
Upgrading from ar71xx target:
- Put image into board:
scp openwrt-ath79-generic-8dev_carambola2-squashfs-sysupgrade.bin \
root@192.168.1.1/tmp/
- Run sysupgrade
sysupgrade /tmp/sysupgrade.bin
Upgrading from u-boot:
- Set up tftp server with sysupgrade.bin image
- Go to u-boot (reboot and press ESC when prompted)
- Set TFTP server IP
setenv serverip 192.168.1.254
- Set device ip from same subnet
setenv ipaddr 192.168.1.1
- Copy new firmware to board
tftpboot 0x81000000 sysupgrade.bin
- erase flash
erase 0x9f050000 +${filesize}
- flash firmware
cp.b 0x81000000 0x9f050000 ${filesize}
- Reset board
reset
Signed-off-by: Rytis Zigmantavičius <rytis.z@8devices.com>
[wrapped long line in commit description, whitespace and art address
fix in DTS, keep default lan/wan setup, removed -n in sysupgrade]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
ZBT-WD323 is a dual-LTE router based on AR9344. The detailed
specifications are:
* AR9344 560MHz/450MHz/225MHz (CPU/DDR/AHN).
* 128 MB RAM
* 16MB of flash(SPI-NOR, 22MHz)
* 1x 2.4GHz wifi (Atheros AR9340)
* 3x 10/100Mbos Ethernet (AR8229)
* 1x USB2.0 port
* 2x miniPCIe-slots (USB2.0 only)
* 2x SIM slots (standard size)
* 4x LEDs (1 gpio controlled)
* 1x reset button
* 1x 10 pin terminal block (RS232, RS485, 4x GPIO)
* 2x CP210x UART bridge controllers (used for RS232 and RS485)
* 1x 2 pin 5mm industrial interface (input voltage 12V~36V)
* 1x DC jack
* 1x RTC (PCF8563)
Tested:
- Ethernet switch
- Wifi
- USB port
- MiniPCIe-slots (+ SIM slots)
- Sysupgrade
- Reset button
- RS232
Intallation and recovery:
The board ships with OpenWRT, but sysupgrade does not work as a
different firmware format than what is expected is generated. The
easiest way to install (and recover) the router, is to use the
web-interface provided by the bootloader (Breed).
While the interface is in Chinese, it is easy to use. First, in order to
access the interface, you need to hold down the reset button for around
five seconds. Then, go to 192.168.1.1 in your browser. Click on the
second item in the list on the left to access the recovery page. The
second item on the next page is where you select the firmware. Select
the menu item containing "Atheros SDK" and "16MB" in the dropdown close
to the buttom, and click on the button at the bottom to start
installation/recovery.
Notes:
* RS232 is available on /dev/ttyUSB0 and RS485 on /dev/ttyUSB1
Signed-off-by: Kristian Evensen <kristian.evensen@gmail.com>
[removed unused poll-interval from gpio-keys, i2c-gpio 4.19 compat]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
With a proper probe deferring for ag71xx we don't need to explicitly
probe mdio1 before gmac0.
Drop all "simple-mfd" in SoC dtsi so that gmac orders can be the same
as ar71xx.
This makes eth0/eth1 order the same as those in ar71xx, which means
we don't need a migration script for this anymore and we can merge
incorrectly split gmac/mdio driver back together.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
The register size of the QCA955x currently matches the size stated in
the datasheet. However, there are more hidden GMAC registers which are
needed for the SGMII workaround to work.
Signed-off-by: David Bauer <mail@david-bauer.net>
This patch fixes following missing bits:
- add missing 'compatible' property on firmware partition
- set vendor partition 'userconfig' read-only
Fixes: 30dcbc741d ("ath79: add support for EnGenius ECB1750")
Signed-off-by: Sven Friedmann <sf.openwrt@okay.ms>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
SoC: AR9344
RAM: 128MB
Flash: 16MiB Winbond 25Q128BVFG SPI NOR
5GHz WiFi: AR9380 PCIe 3x3:3 802.11n
2.4GHz WiFi: AR9344 (SoC) AHB 2x2:2 802.11n
5x Gigabit ethernet via AR8327N switch (green + amber LEDs)
2x USB 2.0 via GL850G hub
4x front LEDs from SoC GPIO
1x front WPS button from SoC GPIO
1x bottom reset button from SoC GPIO
Known issues:
AR8327N LEDs only have default functionality, not presented in sysfs.
This is a regression from ar71xx.
UART header JP1, 115200 no parity 1 stop
TX
GND
VCC
(N/P)
RX
See https://openwrt.org/toh/wd/n750 for flashing detail.
Procedures unchanged from ar71xx.
Tested sysupgrade + factory flash from WD Emergency Recovery
Signed-off-by: Ryan Mounce <ryan@mounce.com.au>
The GL.iNet AR750S USB and microSD port is currently not working out of
the box. GPIO 7 is used to control the power of the USB port. Add GPIO
7 as a fixed-regulator for the port. Also add &usb1 to DTS to get the
microSD port to work.
Signed-off-by: Alexander Wördekemper <alexwoerde@web.de>
Commit "generic: ar8216: add mib_poll_interval switch attribute" sets
mib-poll-interval as disabled by default (was set to 2s), so it makes
switch LEDs trigger disfunctional on devices which don't have
mib-poll-interval set.
So this patch sets mib-poll-interval to 500ms on devices which have
ar83xx switch connected to mdio0 bus, as the same value was set for
built in switches in 443fc9ac35 ("ath79: use ar8216 for builtin
switch").
Some measurements performed on TP-Link Archer C7-v5:
mib-type=0, mib-poll-interval=500ms (10s pidstat)
Average: %usr %system %guest %wait %CPU CPU Command
Average: 0.00 1.93 0.00 0.00 1.93 - kworker/0:2
iperf3 (30s): 334 Mbits/sec
mib-type=0, mib-poll-interval=2s (10s pidstat)
Average: %usr %system %guest %wait %CPU CPU Command
Average: 0.00 1.14 0.00 0.00 1.14 - kworker/0:2
iperf3 (30s): 334 Mbits/sec
So it seems like we get 4x faster LED refresh rate for additional 0.8%
CPU load.
Signed-off-by: Petr Štetiar <ynezz@true.cz>
This patch converts the Range Extender to use the
interrupt-driven gpio-keys driver over the polled variant.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
This patch converts the WNDR3700 to use the interrupt-driven
gpio-keys driver over the polled variant.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
All other QCA9563 devices already use this identifier for
the exact SoC. Not that this matters much since as upstream
states in Documentation/devicetree/usage-model.txt:
"First and foremost, the kernel will use data in the DT to
identify the specific machine. In a perfect world, the
specific platform shouldn't matter to the kernel because all
platform details would be described perfectly by the device
tree in a consistent and reliable manner.
[...]
In the majority of cases, the machine identity is irrelevant,
and the kernel will instead select setup code based on the
machine's core CPU or SoC."
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
TP-Link Archer D50 v1 is a dual-band AC1200 router + modem.
The router section is based on Qualcomm/Atheros QCA9531 + QCA9882.
The "DSL" section is based on BCM6318 but it's currently not supported.
Internally eth0 is connected to the Broadcom CPU.
Router section - Specification:
CPU: QCA9531 650/600/200 MHz (CPU/DDR/AHB)
RAM: 64 MB (DDR2)
Flash: 8 MB (SPI NOR)
Wifi 2.4GHz: QCA9531 2T2R
Wifi 5GHz: QCA9982 2T2R
4x 10/100 Mbps Ethernet
8x LED, 3x button
UART header on PCB
Known issues:
DSL not working (eth0) (WIP)
UART connection
---------------
J2 HEADER (Qualcomm CPU)
. TX
. RX
. GND
O VCC
J16 HEADER (Broadcom CPU)
O VCC
. GND
. RX
. TX
The following instructions require a connection to the J2 UART header.
Flash instruction under U-Boot, using UART
------------------------------------------
1. Press any key to stop autobooting and obtain U-Boot CLI access.
2. Setup ip addresses for U-Boot and your tftp server.
3. Issue below commands:
tftpboot 0x81000000 openwrt-ath79-generic-tplink_archer-d50-v1-squashfs-sysupgrade.bin
erase 0x9f020000 +$filesize
cp.b 0x81000000 0x9f020000 $filesize
reset
Initramfs instruction under U-Boot for testing, using UART
----------------------------------------------------------
1. Press any key to stop autobooting and obtain U-Boot CLI access.
2. Setup ip addresses for U-Boot and your tftp server.
3. Issue below commands:
tftpboot 0x81000000 openwrt-ath79-generic-tplink_archer-d50-v1-initramfs-kernel.bin
bootm 0x81000000
Restore the original firmware
-----------------------------
0. Backup every partition using the OpenWrt web interface
1. Download the OEM firmware from the TP-Link website
2. Extract the bin file in a folder (eg. Archer_D50v1_0.8.0_1.3_up_boot(170223)_full_2017-02-24_09.37.45.bin)
3. Remove the U-Boot and the Broadcom image part from the file.
Issue the following command:
dd if="Archer_D50v1_0.8.0_1.3_up_boot(170223)_full_2017-02-24_09.37.45.bin" of="Archer_D50v1_0.8.0_1.3_up_boot(170223)_full_2017-02-24_09.37.45.bin.mod" skip=257 bs=512 count=15616
4. Double check the .mod file size. It must be 7995392 bytes.
5. Flash it using the OpenWrt web interface. Force the update if needed.
WARNING: Remember to NOT keep settings.
5b. (Alternative to 5.) Flash it using the U-Boot and UART connection.
Issue below commands in the U-Boot:
tftpboot 0x81000000 Archer_D50v1_0.8.0_1.3_up_boot(170223)_full_2017-02-24_09.37.45.bin.mod
erase 0x9f020000 +$filesize
cp.b 0x81000000 0x9f020000 $filesize
reset
Signed-off-by: Davide Fioravanti <pantanastyle@gmail.com>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com> [removed
default-state = "off", it's already the default, added pcie node,
fixed typo]
SoC: Atheros AR7161-8C1A @ 680 MHz
RAM: 128MB - 2x Etron Technology EM6AB160TSA-5G
NOR: 16MB - 1x MXIC MX25L12845EMI-10G (SPI-NOR)
WI1: Atheros AR9223-AC1A 802.11bgn
WI2: Atheros AR9220-AC1A 802.11an
ETH: Atheros AR8021-BL1E + PoE
LED: Dual-Color Power/Status, Ethernet, WLAN2G and WLAN5G
BTN: 1 x Reset
I2C: AT97SC4303s TPM (needs driver!)
CON: RS232-level 8P8C/RJ45 Console Port - 9600 Baud
Factory installation:
- Needs a u-boot replacement. See Wiki for
information on how to do a in-circut flash with
a SPI-Flasher like a CH314A or flashrom. Wiki page
can be found at https://openwrt.org/toh/aruba/aruba_ap-105
- Be careful when dis- and reassembling the device to
not squish any of the antenna cables in the process!
- Be sure to make a full 16 MiB backup of your device
before flashing the new u-boot! This is needed if you
ever have interest in reverting back to stock firmware.
Not working:
- TPM (needs a driver)
Signed-off-by: Chris Blake <chrisrblake93@gmail.com>
Specifications:
- QCA9563 at 775 MHz
- 64 MB RAM Zentel A3R12E40CBF-8E
- 16 MB flash Winbond W25Q128FVSG
- 3 (non-detachable) Antennas / 450 Mbit
- 1x/4x WAN/LAN Gbps Ethernet (QCA8337)
- reset and Wi-Fi buttons
TP-Link TL-WR1043N v5 appears to be identical to the TL-WR1043ND v4,
except that the USB port has been removed and there is no longer a
removable antenna option. It also has different partitioning scheme.
The software is more in line with the Archer series in that it uses a
nested bootloader scheme.
(This has been adapted from the OpenWrt Wiki page)
<https://openwrt.org/toh/tp-link/tl-wr1043nd>
Installation on HW rev.5:
Factory firmware can be installed via the WEB interface.
Alternatively, it is also possible to use a TFTP server
for recovery purposes:
- Rename OpenWRT or original firmware to WR1043v5_tp_recovery.bin
- Set static IP of your PC to *192.168.0.66*
- Router will obtain IP 192.168.0.86 for a few seconds while
loading, when reset button pressed at power On.
And finally, there's always u-boot access through the UART.
For information visit the wiki.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
[reworked commit message]
Specification:
- Qualcomm Atheros SoC QCA9558
- 720/600/200 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 16 MB of FLASH (SPI NOR)
- 1x 10/100/1000 Mbps Ethernet
- 3T3R 2.4 GHz (QCA9558 WMAC)
- 3T3R 5.8 Ghz (QCA9880-BR4A, Senao PCE4553AH)
https://fccid.io/A8J-ECB1750
Tested and working:
- lan, wireless, leds, sysupgrade (tftp)
Flash instructions:
1.) tftp recovery
- use a 1GbE switch or direct attached 1GbE link
- setup client ip address 192.168.1.10 and start tftpd
- save "openwrt-ath79-generic-engenius_ecb1750-initramfs-kernel.bin" as "ap.bin" in tfpd root directory
- plugin powercord and hold reset button 10secs.. "ap.bin" will be downloaded and executed
- afterwards login via ssh and do a sysuprade
2.) oem webinterface factory install (not tested)
Use normal webinterface upgrade page und select "openwrt-ath79-generic-engenius_ecb1750-squashfs-factory.bin".
3.) oem webinterface command injection
OEM Firmware already running OpenWrt (Attitude Adjustment 12.09).
Use OEM webinterface and command injection. See wiki for details.
https://openwrt.org/toh/engenius/engenius_ecb1750_1
Signed-off-by: sven friedmann <sf.openwrt@okay.ms>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
[use interrupt-driven "gpio-keys" binding]
These dts itself are incomplete (e.g. missing mtd partitions) and its
deivce support is never added to ath79 target.
Drop these unused dts for now.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
In commit e9652e1696 ("ath79: fix pinmux for ar933x devices") I've
wrongly changed desired register value to 0xf8 although it should've
been set to 0x0.
0xf8 value sets bits 3-7 (ETH_SWITCH_LEDx_EN) to 1 which actually
enables ethernet switch LEDs, so 0x0 is correct value in order to use
the pins as GPIO.
Fixes: e9652e1696 ("ath79: fix pinmux for ar933x devices")
Reported-by: Chuanhong Guo <gch981213@gmail.com>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Simply dumped content of this regs in ar71xx and wrote them to DTS, as a
result port 6 on the switch will appear disconnected as on Archer C7v4.
[AS: testing and PORT6_STATUS fix]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Properly disable the SoC's internal Switch LEDs on the pinmux.
Devices that previously called ath79_gpio_function_disable for
the switch LEDs, just need to reference switch_led_pins in the
pinctrl-0 property of the gpio-leds node.
Signed-off-by: Paul Wassi <p.wassi@gmx.at>
[changed desired pinctrl register value from 0x1f to proper 0xf8]
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
[renamed pinmux name to switch_led_disable_pins to make purpose more clear]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
This devices have LEDs connected to the SoC's GPIOs, so it makes no
sense to fiddle with ar8327 LED regs.
Tested-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Add some read-only properties to protect partitions from
accidental changes.
Also fixed two whitespaces error on the way.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This corrects the PLL value for 10 Mbit/s links on the OCEDO Raccoon.
Prior to this patch, 10 Mbit/s links would not transmit data.
It is worth mentioning that the vendor firmware used the same PLL
settings and 10Mbit/s was also not working there.
All other link-modes are working correctly without any packet loss.
Signed-off-by: David Bauer <mail@david-bauer.net>
Reverting this commit as I've missed the fact, that the button is
already present in the included DTSI file.
Signed-off-by: Petr Štetiar <ynezz@true.cz>
This adds support for the TP-Link WR842N v3 which is already supported on ar71xx
target (0b45bec22c).
Specification:
* SoC: QCA9533 ver 2 rev 0
* 16 MB Flash (gd25q128)
* 64 MB RAM
* 1 WAN 10/100 MBit/s (blue connector)
* 4 LAN 10/100 MBit/s (AR8229; 4 ports; yellow connectors)
* Atheros AR9531 (2,4GHz, two fixed antennas)
* USB
* Reset / WPS button
* WiFi button (rf kill)
* 8 green leds; 1 red/green led
* serial console (115200 8N1, according to the OpenWrt-wiki some soldering is needed)
Installation:
* flash via vendor WebUI (the filename must not exceed certain length)
* sysupgrade from installed OpenWrt (also ar71xx)
Thanks to Holger Drefs for providing the hardware
Tested-by: @kofec (github)
Signed-off-by: Sven Roederer <devel-sven@geroedel.de>
This is sold as a dual-band 802.11ac range extender. It has a sliding
switch for Extender mode or Access Point mode, a WPS button, a recessed
Reset button, a hard-power button, and a multitude of LED's, some
multiplexed via an NXP 74AHC164D chip. The internal serial header pinout is
Vcc, Tx, Rx, GND, with GND closest to the corner of the board. You may
connect at 115200 bps, 8 data bits, no parity, 1 stop bit.
Specification:
- System-On-Chip: QCA9558
- CPU/Speed: 720 MHz
- Flash-Chip: Winbond 25Q128FVSG
- Flash size: 16 MiB
- RAM: 128 MiB
- Wireless No1: QCA9558 on-chip 2.4GHz 802.11bgn, 3x3
- Wireless No2: QCA99x0 chip 5GHz 802.11an+ac, 4x4
- PHY: Atheros AR8035-A
Installation:
If you can get to the stock firmware's firmware upgrade option, just feed
it the factory.img and boot as usual. As an alternative, TFTP the
factory.img to the bootloader.
Signed-off-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
[whitespace fix in DTS and reorder of make variables]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
The GPIO for the reset button for the Archer C7v5 changed from
ar71xx to ath79. An investigation based on tests revealed
that the A7v5 responds on "11", while the C7v5 responds on
"5" as set for ar71xx.
Thus, we just define this in the DTS files instead of in the
common DTSI.
Tested-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Definition is split here without obvious reason. Just merge it
(and align order to that from C7 v4).
Tested-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
The Ubiquiti Network airCube ISP is a cube shaped 2.4 GHz with internal
2x2 MIMO antennas. It can be supplied via a USB connector or via PoE.
There are for 10/100 Mbps ports (1 * WAN + 3 * LAN). There is an
optional PoE passthrough from the first LAN port to the WAN port.
SoC: Qualcomm / Atheros QCA9533-BL3A
RAM: 64 MB DDR2
Flash: 16 MB SPI NOR
Ethernet: 4x 10/100 Mbps (1 WAN + 3 LAN)
LEDS: 1x via a SPI controller (not yet supported)
Buttons: 1x Reset
Serial: 1x (only RX and TX); 115200 baud, 8N1
Missing points:
- LED not yet supported
- Factory upgrade via web IF or TFTP recovery not yet supported
(Needs RSA signed images, for details see PR#1958)
The serial port is on a four pin connextor labeled J1 and located
between Ethernet and USB connector. The pinout is:
1. 3V3 (out)
2. Rx (in)
3. Tx (out)
4. GND
Upgrading via serial port / U-Boot:
- Connect the serial port via a level converter
- Power the system and stop U-Boot with pressing any key when `Hit any
key to stop autoboot` is displayed. Note: Pressing space multiple
times untill U-Boot reaches that location works well.
- Connect a PC with the IP 192.168.1.100 (or some other in that net)
running a TFTP-Server to one of the LAN ports. Copy the sysupgrade
image to the server.
- Set the U-Boot server IP with
setenv serverip 192.168.1.100
- Load the flash image to RAM with
tftpboot 0x81000000 sysupgrade.bin
- Erase the flash with
erase 0x9f050000 0x9ffaffff
- Write the new flash content with
cp 0x81000000 0x9f050000 ${filesize}
- Reset the device with
reset
Signed-off-by: Christian Mauderer <oss@c-mauderer.de>
[removed full stop in subject and added lockdown note to commit message]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
SOC: Qualcomm Atheros QCA9558
RAM: 128MB
FLASH: 16MB (Macronix MX25L12845EMI-10G)
WLAN1: QCA9558 2.4GHz 802.11bgn 3SS
WLAN2: QCA9880 5GHz 802.11ac 3SS
LED: Power, LAN1, LAN2, 2.4GHz, 5GHz
Serial:Next to SPI Flash,
Pinout is 3V3 - GND - TX - RX (Square Pin is 3V3)
The Serial setting is 115200-8-N-1
INSTALLATION:
1. Serve an OpenWrt ramdisk image named "ursus.bin".
Set your IP-address to 192.168.100.8/24.
2. Connect to the serial. Power up the device and interrupt
the boot process.
3. Set the correct bootcmd with
> setenv bootcmd run bootcmd_1
> saveenv
4. Run
> tftpboot 0x81000000 ursus.bin
> bootm 0x81000000
5. Wait for OpenWrt to boot up.
6. Transfer OpenWrt sysupdate image and flash via sysupgrade.
Signed-off-by: Markus Scheck <markus.scheck1@gmail.com>
Tested-by: David Bauer <mail@david-bauer.net>
[whitespace fix, renamed LED labels and SoC type fix]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
This PR adds support for a popular low-cost 2.4GHz N based AP
Specifications:
- SoC: Qualcomm Atheros QCA9533 (650MHz)
- RAM: 64MB
- Storage: 8 MB SPI NOR
- Wireless: 2.4GHz N based built into SoC 2x2
- Ethernet: 1x 100/10 Mbps, integrated into SoC, 24V POE IN
Installation:
Flash factory image through stock firmware WEB UI
or through TFTP
To get to TFTP recovery just hold reset button while powering on
for around 4-5 seconds and release.
Rename factory image to recovery.bin
Stock TFTP server IP:192.168.0.100
Stock device TFTP adress:192.168.0.254
This is based on the support patch for the identical CPE210 v3
by Mario Schroen <m.schroen@web.de>.
Tested-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
[renamed dtsi filename]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Specifications:
* SoC: Qualcomm Atheros QCA9533 (650MHz)
* RAM: 64MB
* Storage: 8 MB SPI NOR
* Wireless: 2.4GHz N based built into SoC 2x2
* Ethernet: 1x 100/10 Mbps, integrated into SoC, 24V POE IN
Installation:
Flash factory image through stock firmware WEB UI or TFTP
To get to TFTP recovery just hold reset button while powering
on for around 4-5 seconds and release.
Rename factory image to recovery.bin
Stock TFTP server IP:192.168.0.100
Stock device TFTP adress:192.168.0.254
Thanks to robimarko for the work inside the ar71xx tree.
Thanks to adrianschmutzler for deep discussion and fixes.
Signed-off-by: Mario Schroen <m.schroen@web.de>
[Split into DTS/DTSI, read-only config partition in DTSI]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
[renamed dtsi filename, light subject touches]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
COMFAST CF-E5/E7 is a outdoor 4G LTE AP with PoE support, based on
Qualcomm/Atheros QCA9531.
Short specification:
2x 10/100 Mbps Ethernet, with 24v PoE support
64 MB of RAM (DDR2)
16 MB of FLASH (SPI)
2T2R 2.4 GHz, 802.11b/g/n
built-in 1x 3 dBi antennas
output power (max): 80 mW (19 dBm)
Qucetel EC20 LTE MODULE(1x external detachable antenna)
Flash instruction:
Original firmware is based on OpenWrt.
Use sysupgrade image directly in vendor GUI.
Signed-off-by: Ding Tengfei <dtf@comfast.cn>
[commit subject fix]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
This commit adds support for TP-Link TL-WR710N v1 router.
CPU: Atheros AR9331 400MHz
RAM: 32MB
FLASH: 8MiB
PORTS: 1 Port 100/10 LAN (connected to a switch), 1 Port 100/10 WAN
WiFi: Atheros AR9331 1x2:1 bgn
USB: ChipIdea HDRC USB2.0
LED: SYS
BTN: Reset
Sysupgrade from `ar71xx` works without glitches.
Network interfaces assigned for LAN and WAN ports are `eth1` and `eth0`
respectively, what's consistent with `ar71xx` target. Wireless radio
path is automatically upgraded from `platform/ar933x_wmac` to
`platform/ahb/18100000.wmac`.
Signed-off-by: Marcin Jurkowski <marcin1j@gmail.com>
This adds support for the Chinese version of TL-WR941N v7.
It uses QCA9558+AR8236 while the international version
uses TP9343 instead.
Specification:
- SoC: Qualcomm Atheros QCA9558
- Flash: 4 MB
- RAM: 64 MB
- Ethernet: Atheros AR8236 with 5 FE ports
Flash instruction:
Upload the generated factory firmware on web interface.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
The NanoBeam is a small AR9342 based directional 5 GHz AC CPE with hardware
almost identical to the Ubiquiti NanoStation AC loco. Over the NanoStation
AC loco it has 5 additional LEDs. Four of those LEDs are used as rssi
indicators, the fifth LED is used as an ethernet link/activity indicator.
CPU: Atheros AR9342 SoC
RAM: 64 MB DDR2
Flash: 16 MB NOR SPI
WLAN: QCA988X
Ports: 1x GbE
Flashing procedure is identical to the NanoStation AC loco and can be performed
either via serial or the factory firmware upgrade.
Serial flashing:
1. Connect to serial header on device (8N1 115200)
2. Power on device and enter uboot console
3. Set up tftp server serving an openwrt initramfs build
4. Load initramfs build using the command tftpboot in the uboot cli
5. Boot the loaded image using the command bootm
6. Copy squashfs openwrt sysupgrade build to the booted device
7. Use mtd to write sysupgrade to partition "firmware"
8. Reboot and enjoy
Flashing through factory firmware:
1. Ensure firmware version v8.5.0.36727 is installed. Up/downgrade to this exact version.
2. Patch fwupdate.real binary using `hexdump -Cv /bin/ubntbox | sed 's/14 40 fe fe/00 00 00 00/g' | hexdump -R > /tmp/fwupdate.real`
3. Make the patched fwupdate.real binary executable using `chmod +x /tmp/fwupdate.real`
4. Copy the squashfs factory image to /tmp on the device
5. Flash OpenWRT using `/tmp/fwupdate.real -m <squashfs-factory image>`
6. Wait for the device to reboot
Thanks to @cybermaus for testing!
Tested-by: Maurits van Dueren den Hollander <cybermaus@gmail.com>
Signed-off-by: Tobias Schramm <tobleminer@gmail.com>
Support for the Nanostation M (XW) was added in 40530c8eb with board
name "nanostation-m-xw". The current image for the "Nanostation M"
uses "nano-m" as the board name.
This commit renames it to the full product name as it's used by all
other boards. The legacy boardname of the ar71xx target is added
via SUPPORTED_DEVICES to ease switching to ath79 target.
Signed-off-by: Sven Roederer <devel-sven@geroedel.de>
[touch-ups on the commit message, removed subject remains]
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
jjPlus JA76PF2 (marketed as IntellusPro2) is a network embedded board.
Specification
SoC: Atheros AR7161
RAM: 64 MB DDR
Flash: 16 MB SPI NOR
Ethernet: 2x 10/100/1000 Mbps AR8316
LAN (CN11), WAN/PoE (CN6 - close to power barrel
connector, 48 V)
MiniPCI: 2x
LEDS: 4x, which 3 are GPIO controlled
Buttons: 2x GPIO controlled
Reset (SW1, closer to ethernet ports), WPS (SW2)
Serial: 1x (only RX and TX are wired)
baud: 115200, parity: none, flow control: none
Currently there is one caveat compared to ar71xx target images as the
MAC addresses are random on every reboot. To remedy this one needs to
store the WAN MAC address in RedBoot configuration. OpenWrt on first
boot, after flashing, will read out the address and assign proper ones
to both WAN and LAN ports. It is iportant to NOT keep the old
configuration when doing sysupgrade from ar71xx.
Upgrading from OpenWrt ar71xx image
1. Connect to serial port,
2. Download OpenWrt sysupgrade image to /tmp directory and flash it
with:
sysupgrade -n <openwrt_sysupgrade_image_name>
3. After writing new image OpenWrt will reboot, now interrupt boot
process and enter RedBoot (bootloader) command line by pressing
Ctrl+C,
4. Enter following commands (replace variable accordingly),
set_mac (to view MAC addresses)
alias ethaddr <wan_port_mac_adress>
(confirm storing the value by inputting y and pressing Enter)
reset
5. Now board should restart and boot OpenWrt with proper MAC addresses.
Installation
1. Prepare TFTP server with OpenWrt initramfs image,
2. Connect to WAN ethernet port,
3. Connect to serial port,
4. Power on the board and enter RedBoot (bootloader) command line by
pressing Ctrl+C,
5. Enter following commands (replace variables accordingly):
set_mac (to view MAC addresses)
alias ethaddr <wan_port_mac_address>
(confirm storing the value by inputting y and pressing Enter)
ip_adress -l <board_ip_adress>/24 -h <tftp_server_ip_adress>
load -r -b 0x80060000 <openwrt_initramfs_image_name>
exec -c ""
6. Now board should boot OpenWrt initramfs image,
7. Download OpenWrt sysupgrade image to /tmp directory and flash it
with:
sysupgrade <openwrt_sysupgrade_image_name>
8. Wait few minutes, after the D2 LED will stop blinking, the board
is ready for configuration.
Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
Align the LEDs deffinition with MACH file present in ar71xx target which
has the correct LED functions and colors adescription.
Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
EnGenius EPG5000 (v1.0.0, marketed as IoT Gateway) is a dual band
wireless router.
Specification
SoC: Qualcomm Atheros QCA9558
RAM: 256 MB DDR2
Flash: 16 MB SPI NOR
WIFI: 2.4 GHz 3T3R integrated
5 GHz 3T3R QCA9880 Mini PCIe card
Ethernet: 5x 10/100/1000 Mbps QCA8337N
USB: 1x 2.0
LEDS: 4x GPIO controlled
Buttons: 2x GPIO controlled
UART: 4 pin header, starting count from white triangle on PCB
1. VCC 3.3V, 2. GND, 3. TX, 4. RX
baud: 115200, parity: none, flow control: none
Installation
1. Connect to one of LAN (yellow) ethernet ports,
2. Open router configuration interface,
3. Go to Tools > Firmware,
4. Select OpenWrt factory image with dlf extension and hit Apply,
5. Wait few minutes, after the Power LED will stop blinking, the router
is ready for configuration.
Alternative installation
1. Prepare TFTP server with OpenWrt sysupgrade image,
2. Connect to one of LAN (yellow) ethernet ports,
3. Connect to UART port (leaving out VCC pin!),
4. Power on router,
5. When asked to enter a number 1 or 3 hit 2, this will select flashing
image from TFTP server option,
6. You'll be prompted to enter TFTP server ip (default is 192.168.99.8),
then router ip (default is 192.168.99.9) and for last, image name
downloaded from TFTP server (default is uImageESR1200_1750),
7. After providing all information U-Boot will start flashing the image,
You can observe progress on console, it'll take few minutes and when
the Power LED will stop blinking, router is ready for configuration.
Additional information
If connected to UART, when prompted for number on boot, one can enter
number 4 to open bootloader (U-Boot) command line.
OEM firmware shell password is: aigo3d0a0tdagr
useful for creating backup of original firmware.
When doing upgrade from OpenWrt ar71xx image, it is recomended to not keep
the old configuration.
Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
AR300M-Lite is single-Ethernet variant of the AR300M series
Its eth0 would otherwise be assigned to the WAN interface
making it unreachable firstboot or failsafe.
Installation instructions from OEM (OpenWrt variant):
* Install sysupgrade.bin using OEM's "Advanced" GUI (LuCI),
* Do not preserve settings
* Access rebooted device via Ethernet at OpenWrt default address
Add previously missing LED defaults for all three variants;
-nand, -nor, -lite to the definitions in 01_leds
Non-lite variants thanks to Andreas Ziegler
https://patchwork.ozlabs.org/patch/1049396/
Runtime-tested: GL.iNet AR300M-Lite
Signed-off-by: Jeff Kletsky <git-commits@allycomm.com>
Hardware
--------
SOC: QCA9558
RAM: 128M DDR2
Flash: 16MiB SPI-NOR
ETH: QCA8337N: 2x 10/100/1000 PoE and PoE pass-through
WiFi2: QCA9558 (bgn) 2T2R
WiFi5: 2x mPCIE with AR9582 (an) 2T2R
BTN: 1x Reset
GPIO: multiple GPIO on header, PoE passthrough enable
UART: 3.3V 115200 8N1 header on the board
WDG: ATTiny13 watchdog
JTAG: header on the board
USB: 1x connector and 1x header on the board
PoE: 10-32V input in ETH port 1, passthrough in port 2
mPCIE: 2x populated with radios (but replaceable)
OpenWrt is preinstalled from factory. To install use <your-image>-sysupgade.bin
using the web interface or with sysupgrade -n.
Flash from bootloader (in case failsafe does not work)
1. Connect the LibreRouter with a serial adapter (TTL voltage) to the UART
header in the board.
2. Connect an ETH cable and configure static ip addres 192.168.1.10/24
3. Turn on the device and stop the bootloader sending any key through the serial
interface.
4. Use a TFTP server to serve <your image>-sysupgrade.bin file.
5. Execute the following commands at the bootloader prompt:
ath> tftp 82000000 <your image>-sysupgrade.bin
ath> erase 0x9f050000 +$filesize
ath> cp.b 0x82000000 0x9f050000 $filesize
ath> bootm 0x9f050000
More docs
* Bootloader https://github.com/librerouterorg/u-boot
* Board details (schematics, gerbers): https://github.com/librerouterorg/board
Signed-off-by: Santiago Piccinini <spiccinini@altermundi.net>
TP-Link RE350K v1 (FCC ID: TE7RE350K) is a wall-plug AC1200 Wi-Fi range
extender with 'Kasa Smart' support. Device is based on Qualcomm/Atheros
QCA9558 + QCA9882 + AR8035 platform and is available only on US market.
Specification:
- 720/600/200 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 16 MB of flash (SPI NOR)
- 1x 1 Gbps Ethernet (AR8035)
- 2T2R 2.4 GHz (QCA9558), with ext. PA (SE2565T) and LNA (SKY65971-11)
- 2T2R 5 GHz (QCA9882), with ext. PA (SE5003L1-R) and LNA (SKY65981-11)
- 2x U.FL connector on PCB
- 2x dual-band PCB antennas
- 1x LED, 2x dual-color LED (all driven by GPIO)
- 3x button (app config, led, reset)
- 1x mechanical on/off slide switch
- 1x UART (4-pin, 2.54 mm pitch) header on PCB
- 1x JTAG (8-pin, 1.27 mm pitch) header on PCB
Flash instruction:
Use 'factory' image directly in vendor GUI (default IP: 192.168.0.254,
default credentials: admin/admin).
Warning:
This device does not include any kind of recovery mechanism in U-Boot.
Vendor firmware access:
You can access vendor firmware over serial (RX line requires jumper
resistor in R306 place, near XTAL) with: root/sohoadmin credentials.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
YunCore A770 is a ceiling AC750 AP with 2 Fast Ethernet ports, PoE
(802.3at) support, based on QCA9531 + QCA9887.
Specification:
- 650/597/216 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 16 MB of flash (SPI NOR)
- 2x 10/100 Mbps Ethernet (PoE 802.3at support in WAN port)
- 2T2R 2.4 GHz (QCA9531), with ext. PA and LNA
- 1T1R 5 GHz (QCA9887), with ext. FEM (SKY85728-11)
- 2x regular LED, 1x RGB LED (all driven by GPIO)
- 1x button (reset)
- DC jack for main power input (12 V)
- UART header on PCB
Flash instruction:
1. First, gain root access to the device, following below steps:
- Login into web gui (default password/IP: admin/192.168.188.253).
- Go to 'Advanced' -> 'Management' -> 'System' and download backup of
configuration (bakfile.bin).
- Open the file as tar.gz archive, edit/update 'shadow' file and change
hash of root password to something known.
- Repack the archive, rename it back to 'bakfile.bin' and use to
restore configuration of the device.
- After that, device will reboot and can be accessed over SSH.
2. Then, install OpenWrt:
- Login over SSH and issue command:
fw_setenv bootcmd "bootm 0x9f050000 || bootm 0x9fe80000"
- Upload 'sysupgrade' image and install it (only if previous command
succeeded) with command: 'sysupgrade -n -F openwrt-...'.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
CPU: AR9342 SoC
RAM: 64 MB DDR2
Flash: 8 MB NOR SPI
Ports: 2x100 MBit (24V PoE in, 24V PoE out), AR8236 switch
WLAN: 2.4/5 GHz
UART: 1 UART
LEDs: Power, 2x Ethernet, 4x RSSI LEDs (orange, red, 2x green)
Buttons: Reset
Flashing instructions using recovery method over TFTP
1. Unplug the ethernet cable from the router.
2. Using paper clip press and hold the router's reset button. Make sure
you can feel it depressed by the paper clip. Do not release the button
until step 4.
3. While keeping the reset button pressed in, plug the ethernet cable
back into the AP. Keep the reset button depressed until you see the
device's LEDs flashing in upgrade mode (alternating LED1/LED3 and
LED2/LED4), this may take up to 25 seconds.
4. You may release the reset button, now the device should be in TFTP
transfer mode.
5. Set a static IP on your Computer's NIC. A static IP of 192.168.1.25/24
should work.
6. Plug the PoE injector's LAN cable directly to your computer.
7. Start tftp client and issue following commands:
tftp> binary
tftp> connect 192.168.1.20
tftp> put openwrt-ath79-generic-ubnt-nano-m-xw-squashfs-factory.bin
Tested-by: Joe Ayers <ae6xe@arrl.net>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
This allows resetting gmac registers during initialization.
Also add compatible string for qca955x mdio to enable more mdio
clock dividers.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
This commit makes the TP-Link hardware-revision naming consistent to
match the one used by the vendor. TP-Link refers to the different
revisions as "vX" not "Version X".
Signed-off-by: David Bauer <mail@david-bauer.net>
Commit 34b10b46 made usb match with the corresponding usb label.
The problem is that v4 seems to use in stock firmware the
upper led for usb 1 and the lower led for usb 2.
The led assigned varies between TP-Link models and even
same model versions. For example, Archer C7 v1 and v2 have
the leds in the reverse order.
Revert 34b10b46 and swap led labels instead, now usb port
and led label match and also respect the original behavior.
Tested-by: Oldrich Jedlicka <oldium.pro@gmail.com>
Signed-off-by: David Santamaría Rogado <howl.nsp@gmail.com>
In the production of glinet, the MAC address of ethernet port is
only written at the position where the ART area offset address
is 0, and the MAC address of eth1 is added 1 on the basis of eth0.
Signed-off-by: Luo chongjun <luochongjun@gl-inet.com>
