CONFIG_DEBUG_INFO_COMPRESSED_ZSTD, required by GCC 13.0+
Compress the debug information using zstd. This may provide better compression than zlib, for about the same time costs, but requires newer toolchain support. Requires GCC 13.0+ or Clang 16.0+, binutils 2.40+, and zstd.
Signed-off-by: CharlesMengCA <58993776+CharlesMengCA@users.noreply.github.com>
As shared remove functions now returns void instead of int we need to
use .remove_new instead of .remove.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
A new patch was added meanwhile which will go as fix via netdev tree.
Copy & refresh it for Linux 6.6 as well.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Avoid crashing the kernel when trying to detect early versions of
RealTek RTL8221B 2.5G Ethernet PHY.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Currently, the existing uncompressed kallsym support is causing qualcommax
boards to hang on boot, and only after earlycon and verbose BUG() prints
are enabled the trace is visible:
[ 0.000000] ------------[ cut here ]------------
[ 0.000000] kernel BUG at kernel/kallsyms.c:340!
[ 0.000000] Internal error: Oops - BUG: 00000000f2000800 [#1] SMP
Felix has fixed up the uncompressed kallsyms support so modify the current
patch with the fix.
All credits for the code go to Felix.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Update fitblk driver which has previously been backported to Linux 6.1
so it can build and work with Linux 6.6.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Add missing symbols to config for 6.6.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <hackpascal@gmail.com>
Due to what seems to be an undocumented oddity in MediaTek's MT7988
SoC design the CLK_INFRA_PCIE_PERI_26M_CK_P2 clock requires
CLK_INFRA_PCIE_PERI_26M_CK_P3 to be enabled.
This currently leads to PCIe port 2 not working in Linux.
Reflect the apparent relationship in the clk driver to make sure PCIe
port 2 of the MT7988 SoC works.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Clearing bit MAC_MCR_FORCE_LINK which forces the link down too early
can result in MAC ending up in a broken/blocked state.
Fix this by handling this bit in the .mac_link_up and .mac_link_down
calls instead of in .mac_finish.
Suggested-by: Mason-cw Chang <Mason-cw.Chang@mediatek.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Specifications:
- SoC: Broadcom BCM63168 dual 400MHz MIPS
- Flash: 16MB SPI NOR W25Q128WFG
- RAM: 128MB DDR3 W631GG6KB-15
- Ethernet: 1x 1000M, 3x 100M
- Wifi: BCM435F
- 1x USB 2.0 port
- 3x Button
- 12x LED
Flashing via serial
- Connect to the 3.3V TTL UART on the board
(J6 pinout Vcc Rx Tx Gnd) at 115200-8-N-1
- Press any key in the serial console when powering up the board to enter
the CFE prompt
- Configure an interface on your workstation to static IP 192.168.1.100
and connect it to the board
- Start a TFTP server with the firmware image
- On the CFE prompt, enter the command
"f 192.168.1.100:openwrt-bmips-bcm63268-smartrg_sr505n-squashfs-cfe.bin"
Signed-off-by: Kyle Hendry <kylehendrydev@gmail.com>
[Remove unneeded LED labels]
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
CDNS3 is a SuperSpeed (SS) USB 3.0 Dual-Role-Device (DRD) controller from
Cadence. Add support for this device, and add the required symbols into
the generic configs.
Compile-tested: apm821xx, bcm4908, imx, mpc85xx, pistachio, starfive
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
* Increase flash SPI frequency to 50MHz
The maximum SPI frequency of MX25L6406EM2I is 86 MHz,
but in this patch 50 MHz was chosen as a safe value.
* Update Ethernet MAC addresses
Till now LAN/WAN MAC addresses were flipped
compared to stock firmware.
* Fix Wi-Fi LEDs by adding mt76 led nodes
* Fix LAN port order
LAN ports are in reverse order of switch ports.
* Fix the well-known "LZMA ERROR 1" error by using lzma-loader
* Set uImage name, which enables installation via stock web interface:
1. Upload **initramfs** image file to the web page.
2. Boot into OpenWrt and perform sysupgrade with sysupgrade image.
Signed-off-by: Sungbo Eo <mans0n@gorani.run>
Unlike the recovery image, this initramfs-factory image can be flashed
using the stock firmware web interface (from any active boot partition),
as well as the bootloader recovery web page. Drop the recovery image in
favor of the factory image.
Installation via stock/recovery web interface:
1. Flash **initramfs-factory** image through the web page.
2. Boot into OpenWrt and perform sysupgrade with sysupgrade image.
Signed-off-by: Sungbo Eo <mans0n@gorani.run>
The "0x80001000" address logically comes from "loadaddr-y" variable for
mt7621 subtarget. Let's replace the hardcoded value with the predefined
variable. This change is purely cosmetic.
Signed-off-by: Sungbo Eo <mans0n@gorani.run>
Contrary to common ipTIME NOR devices, the "Config" partition of T5004
and AX2004M contain normal U-Boot environment variables. Renaming the
partition into "u-boot-env" serves for better description, and it also
conforms to common naming practice in OpenWrt.
This patch might also be extended to A3004T, but its u-boot-env
partition layout has not been confirmed yet.
Signed-off-by: Sungbo Eo <mans0n@gorani.run>
AX2004M uses NMBM on its NAND flash, but it was not enabled in DTS as the
device support [1] had been added before NMBM feature in mtk_bmt driver [2].
Let's enable it now.
With this change, there is a low possibility of boot failure after
sysupgrade from older versions. As AX2004M already has gone through
two stable releases in the meantime, it would be safe to warn users
by bumping DEVICE_COMPAT_VERSION.
[1] 37753f34ac ("ramips: add support for ipTIME AX2004M")
[2] 06382d1af7 ("kernel: add support for mediatek NMBM flash mapping support")
Signed-off-by: Sungbo Eo <mans0n@gorani.run>
The COVR-C1200 devices are sold as "Whole Home Mesh Wi-Fi"
sets in packs of two (COVR-C1202) and three (COVR-C1203).
Specifications:
* QCA9563, 16 MiB flash, 128 MiB RAM, 2x3:2 802.11n
* QCA9886 2x2:2 801.11ac Wave 2
* AR8337, 2 Gigabit ports (1: WAN; 2: LAN)
* USB Type-C power connector (5V, 3A)
Installation COVR Point A:
* In factory reset state: OEM Web UI is at 192.168.0.50
no DHCP, skip wizard by directly accessing:
http://192.168.0.50/UpdateFirmware_Simple.html
* After completing setup wizard: Web UI is at 192.168.0.1
DHCP enabled, login with empty password
* Flash factory.bin
* Perform a factory reset to restore OpenWrt UCI defaults
Installation COVR Points B:
* OEM Web UI is at 192.168.0.50, no DHCP, empty password
* Flash factory.bin
* Perform a factory reset to restore OpenWrt UCI defaults
Recovery:
* Keep reset button pressed during power on
* Recovery Web UI is at 192.168.0.50, no DHCP
* Flash factory.bin
used to work best with Chromium-based browsers or curl:
curl -F firmware=@factory.bin \
http://192.168.0.50/upgrade.cgi
since this fails to work on modern Linux systems,
there is also a script dlink_recovery_upload.py
Signed-off-by: Sebastian Schaper <openwrt@sebastianschaper.net>
Include a statement about having to run the installer in the
sysupgrade compat warning for the Linksys E8450 (UBI).
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Probing of the fitblk driver in some situations happens after the kernel
attempts to mount rootfs, which then fails.
Always use 'rootwait' when using fitblk for rootfs.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Cleanup uart1-related node on ELECOM WAB-I1750-PS and enable it for
"SERIAL" port on the case.
"SERIAL" port can be used for OpenWrt console by adding the following
line to /etc/inittab and rebooting:
ttyATH1::askfirst:/usr/libexec/login.sh
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Add aliases with "serialN = &uartN;" of uart0/1 on QCA955x SoCs to
qca955x.dtsi, to enable uart1 on Linux Kernel.
without this:
[ 0.342915] ar933x-uart 18500000.uart: unable to get alias id, err=-19
Additionally, remove "serial0 = &uart;" alias from QCA955x device
dts/dtsi files.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Add HighSpeed UART support to QCA955x series SoCs as a secondary UART
(uart1). This UART is compatible with qca,ar9330-uart.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Rename the DT label of the primary UART on Qualcomm Atheros QCA955x
series SoCs to "uart0" from "uart" for the preparation to add HighSpeed
UART (uart1) support.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
with 6.1, the kernel no longer fitted into the 16 MiB and
kicking down the can and increasing KERNEL_SIZE to 20 MiB
didn't help as the device failed to boot.
Using 'kernel-bin | gzip | uimage gzip' didn't work since the
uboot does not have enough heap to decompress these big kernels.
And finally playing around with uboot was more a hassle than
converting this device to take the simpleImage-boot-route in
the future.
Note: The device now takes even longer on the first boot-up after
the flash due to JFFS2 initializing all the remaining flash.
Be prepared to wait up to 10 minutes before the green status LED
stops blinking and will shine a solid green!
(On the plus site: the device now has ~10 MiB of additional
space for rootfs+rootfs_data).
Note2: This patch includes a kernel patch refresh.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
