The DTS file for the DGS-1210-10P is slightly different from the other
DGS-1210 devices, in that it didn't specify a gpio-restart node when it
was added. The gpio-restart has been found to work on the DGS-1210-10P
as well, so switch it over to the common definitions.
This converts the last device from the product family to the common
definition for the (external) GPIOs.
Tested-by: Michel Thill <jmthill@gmail.com>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
The 'indirect-access-id' property on gpio0 is a remnant from the
original GPIO driver. This property has not been relevant on the SoC's
embedded GPIO controller for a long time, so just drop it.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
The definition for the netgear_wndr4700 had two different
DEVICE_COMPAT_VERSION definitions.
In commit 5815884c3a2 ("apm821xx: migrate to DSA"), an additional
DEVICE_COMPAT_VERSION := 3.0 attribute was added to the device
definition. The old one with version 2.0 stayed and was defined later
overwriting the new one.
Replace the old version 2.0 with the new version 3.0
Fixes: 5815884c3a2a ("apm821xx: migrate to DSA")
Link: https://forum.openwrt.org/t/openwrt-24-10-0-rc6-sixth-release-candidate/222466/43
Link: https://github.com/openwrt/openwrt/pull/17741
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The STM32MP135F-DK board uses the LAN8742 PHY.
Enable CONFIG_SMSC_PHY to have full PHY support.
Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
Link: https://github.com/openwrt/openwrt/pull/17745
Signed-off-by: Robert Marko <robimarko@gmail.com>
ST1202 controller was added recently, but it was not disabled in the
generic config, so lets avoid individual target configs disabling it
and just disable it in generic config.
Link: https://github.com/openwrt/openwrt/pull/17746
Signed-off-by: Robert Marko <robimarko@gmail.com>
Replace eMMC support with upstream version where we declare dummy clock
and dummy regulator instead of a specific compatible. Also drop the
downstream patch for it.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Refresh cpufreq with merged upstream version. Also fix the PM Domain
rebased patch to correctly expose the symbol for non Mediatek target.
Update dtsi with new pm domain name.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Since commit f1c9afd80138 ("ramips: mt7621-dts: mux phy0/4 to gmac1") the
USW-Flex lan1 port has been attached directly to the CPU. This improves
routing performance but hinders switching.
This is a generally accepted trade-off in that commit but for USW-Flex it
is a questionable choice. This switch is designed to deliver PoE to remote
places and using it as a router is unlikely. Meanwhile, the lan1 port is
also PoE-in and will often be the uplink, carrying most of the traffic.
Reverting f1c9afd80138 for USW-Flex restores full 1 Gbps switching
performance on all ports.
Signed-off-by: Anders Melchiorsen <amelchio@nogoto.net>
Link: https://github.com/openwrt/openwrt/pull/17703
Signed-off-by: Robert Marko <robimarko@gmail.com>
The GW82xx-2x has two network ports. By convention, the first
port (eth0) should be the WAN port and the second port (eth1)
should be the LAN port.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Link: https://github.com/openwrt/openwrt/pull/17717
Signed-off-by: Robert Marko <robimarko@gmail.com>
The act of attempting link at gen1 then trying to link at higher speeds
causes a hang with the specific PCIe switch used on the Gateworks Venice
boards. Work around this by linking at the highest speed first as is
common with all other PCI controller drivers.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Link: https://github.com/openwrt/openwrt/pull/17717
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add several dt backports for the Gateworks Venice product family.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Link: https://github.com/openwrt/openwrt/pull/17717
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add a backport of a btsdio patch for the cyw437 bluetooth controller.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Link: https://github.com/openwrt/openwrt/pull/17717
Signed-off-by: Robert Marko <robimarko@gmail.com>
The on-device board name reported by 'ubus call system board' is not present
in the generated profiles.json. This results in upgrade tools being unable
to match the image with the proper device. Let's add a 'SUPPORTED_DEVICES'
entry for the board name to fix this.
Links: https://forum.openwrt.org/t/owut-openwrt-upgrade-tool/200035/441
Links: 2a07270180
Signed-off-by: Eric Fahlgren <ericfahlgren@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17736
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Fix usage of non-existent 'caldata_patch_mac' function
by using the 'caldata_patch_data' function.
Fixes: #17734
Signed-off-by: Paweł Owoc <frut3k7@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17737
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
It's possible to add the driver for the Marvell MV88E6xxx DSA
switches using a module package rather than to compile it into
the kernel. For affected devices this saves a bit of space,
the DSA core alone is around 600 KB on ARM.
I could only find one device actually using this switch (I also
checked upstream DTS files) so I have added the package to that
one device.
In the config CONFIG_NET_DSA_TAG_TRAILER and CONFIG_NET_DSA_OCELOT
were also selected, which seems like mistakes. These taggers are
only used by the MV88E6060 and driver which is a separate switch
from MV88E6xxx and the Ocelot drivers such as
CONFIG_NET_DSA_MSCC_FELIX or CONFIG_NET_DSA_MSCC_SEVILLE
and no qoric platform seems to be using them, nor are they
selected in the config.
Link: https://patchwork.ozlabs.org/project/openwrt/patch/20250113-mv88e6xxx-modularize-v2-2-3064419615cd@linaro.org/
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
It's possible to add the driver for the Marvell MV88E6xxx DSA
switches using a module package rather than to compile it into
the kernel. For affected devices this saves a bit of space,
typically the DSA core is 600 KB so this and some more is saved
for devices with no DSA switch.
When adding the packages I went over both the upstream DTS files
and the OpenWrt-specific DTS files and used grep 'marvell,mv88e6'
to find the devices using these switches.
Link: https://patchwork.ozlabs.org/project/openwrt/patch/20250113-mv88e6xxx-modularize-v2-1-3064419615cd@linaro.org/
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Change devices with RTL8231 GPIO expander definition that can easily be
translated to the new RTL8231 binding and carry over any gpio-hogs. This
will let them use the new RTL8231 MFD driver, without any functional
changes.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
322500403615 service: add default group @ to match all nodes
5f7860306200 ubus: rename unetd_ubus_notify to unetd_ubus_network_notify
d13752814651 enroll: add PEX sub-protocol to support enrolling new nodes into a network
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Update to include the latest upstream improvements and bugfixes, including
pahole now always encoding reproducibly.
Drop the local patch:
100-reproducible-builds.patch
Release Notes: https://lore.kernel.org/bpf/Z4-TDt42dTKZvCo6@x1/
Signed-off-by: Tony Ambardar <itugrok@yahoo.com>
Link: https://github.com/openwrt/openwrt/pull/17705
Signed-off-by: Robert Marko <robimarko@gmail.com>
Import patch "net: phy: realtek: mark existing MMDs as present"
When using Clause-45 mode to access RealTek RTL8221B 2.5G PHYs some
versions of the PHY fail to report the MMDs present on the PHY.
Mark MMDs PMAPMD, PCS and AN which are always existing according to
the datasheet as present to fix that.
Fixes: #16823, #17183, #17232
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Tested-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Tested-by: Juan Pedro Paredes Caballero <juanpedro.paredes@gmail.com>
Set target as source-only for now as only the Reference Board is
supported and needs to better evaluated with real Devices.
Link: https://github.com/openwrt/openwrt/pull/17725
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Enable the Aquantia PHY by default in config-defaults. Target is big
enough to permit embedding the PHY instead of having as an external
module.
Link: https://github.com/openwrt/openwrt/pull/17725
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Update patch with upstream version and automatically refresh with make
target/linux/refresh.
Also backport one additional fix patch for NAND patch and drop a patch
merged upstream.
Link: https://github.com/openwrt/openwrt/pull/17725
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add patch fixing unmet dependency for QCOM PPE. This fix a compilation
error when SFP config is selected.
Link: https://github.com/openwrt/openwrt/pull/17725
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add patches adding partition table common to RDP board and node for AQR
NVMEM.
Link: https://github.com/openwrt/openwrt/pull/17725
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add patch fixing USB regulator as the LDO needs to use ID 5 instead of
ID 2.
Link: https://github.com/openwrt/openwrt/pull/17725
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Backport CPUFreq patch and enable RPM. This is to enable CPU Frequency
scaling and regulators.
Link: https://github.com/openwrt/openwrt/pull/17725
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add initial support for new target with the initial patch for ethernet
support using pending upstream patches for PCS UNIPHY, PPE and EDMA.
Only initramfs currently working as support for new SPI/NAND
implementation, USB, CPUFreq and other devices is still unfinished and
needs to be evaluated.
Link: https://github.com/openwrt/openwrt/pull/17725
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Zyxel GS1900-8 v2 devices have been produced more recently than v1
devices. As there are v1 boards with RTL8380M rev. C SoCs, it can likely
safely be assumed that all v2 devices will also have a recent SoC
revision, supporting the hardware auxiliary MDIO controller.
Make the GS1900-8 v1 use an emulated auxiliary MDIO bus, for backward
compatibility with devices containing an RTL8380M rev. A.
Since the devicetrees are otherwise identical, GS1900-8 v1 devices with
an RTL8380M rev. B or C will also be able to use the (more efficient) v2
image. This includes any currently functioning device with OpenWrt, so
include the old compatible as a supported device for the GS1900-8 v2.
Link: https://github.com/openwrt/openwrt/issues/9534
Signed-off-by: Sander Vanheule <sander@svanheule.net>
The mdio-gpio driver is required to support early revision of RTL8380M
slicon (rev A) where the auxilairy MDIO controller does not function
correctly. Add this driver to the rtl838x kernel so devices with old
SoCs are also able to function correctly.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
In order to be able to define the external GPIO controller on an
emulated MDIO bus, move the controller definition outside of the main
GS1900 include for RTL838x-based devices.
Additionally, a new DTSI is provided defining the RTL8231 on the
emulated MDIO bus.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Some RTL8380M-based devices have been around for a long time and use an
early A revision of the RTL8380M SoC. This revision has an issue with
the auxiliary MDIO controller, causing it to malfunction. This may lead
to device reboots when the controller is used.
Provide a bit-banged MDIO bus, which muxes the auxiliary MDIO pins to
their GPIO function. Although this will result in lower performance,
there should otherwise be no functional differences.
Link: https://github.com/openwrt/openwrt/issues/9534
Signed-off-by: Sander Vanheule <sander@svanheule.net>
As the bootloader is reconfiguring the RTL8231 on these devices anyway,
no pin state can be maintained over warm reboots. This results in for
example the PoE disable pin always being asserted by the bootloader.
Define the GPIO line linked to the RTL8231's reset so the MDIO subsystem
will also reset the expander on boot and ensure the line in the correct
state.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
The USB PHY on the ar9330 and similar SoCs needs the PHY driver. In
OpenWrt 23.05 it was compiled into the kernel. The kernel 6.6
configuration does not compile it in any more, make the
kmod-usb-chipidea driver select it to add it to the images.
Fixes: https://github.com/openwrt/openwrt/issues/17710
Fixes: 04bdf9b3323e ("ath79: disable ath79 USB phy drivers by default")
Link: https://github.com/openwrt/openwrt/pull/17720
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
the wifi leds of the wax206 were not reacting.
This patch enables the green leds to show activity, as the blue ones are very bright.
Also set the label-mac to the gmac0
Signed-off-by: Florian Maurer <f.maurer@outlook.de>
Link: https://github.com/openwrt/openwrt/pull/17694
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Supported devices are listed in the metadata as the first part of the
DTS compatible. This normally follows the format "vendor,device".
When updating the device name of the 180W 1920-8G PoE an underscore was
used, instead of a comma, to join the vendor and device name. This will
lead to warnings for users wanting to sysupgrade a device with an older
compatible, as the device's info does not match the one the metadata.
Fixes: 987c96e88927 ("realtek: rename hpe,1920-8g-poe to match hardware")
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Fixed an issue where both WAN LEDs light up before plugging in the
ethernet cable and no blinking regardless of WAN network activity.
Updated the LED configuration to reflect proper status:
Green indicates 2.5Gb connection speed.
Yellow indicates other connection speed and traffic activity.
This resolves inconsistent WAN LED behavior on Spectrum SAX1V1K routers.
Signed-off-by: Ivan Deng <hongba@rocketmail.com>
Link: https://github.com/openwrt/openwrt/pull/17623
Signed-off-by: Robert Marko <robimarko@gmail.com>
atm_qos struct should be the same both for user and kernel spaces. Via
the __SO_ENCODE() macro it is used to define the SO_ATMQOS socket IOC.
During the VRX518 support introduction, the atm_trafprm sturct nested
into the atm_qos stucture was update with newer fields that are
referenced by the ATM TC layer of the VRX518 TC driver. These new fields
are intended to communicate information for extra traffic classes
supported by the driver. But we are still using vanilla kernel headers
to build the toolchain. Due to the atm.h header incoherency br2684ctl
from linux-atm tools is incapable to configure the ATM bridge netdev:
br2684ctl: Interface "dsl0" created sucessfully
br2684ctl: Communicating over ATM 0.1.2, encapsulation: LLC
br2684ctl: setsockopt SO_ATMQOS 22 <-- EINVAL errno
br2684ctl: Fatal: failed to connect on socket; File descriptor in bad state
There are two options to fix this incoherency. (a) update the header
file in the toolchain to build linux-atm against updated atm_trafprm and
atm_qos structures, or (b) revert atm_trafprm changes.
Since there are no actual users of the extra ATM QoS traffic classes,
just drop these extra traffic classes from vrx518_tc ATM TC layer and
drop the kernel patch updating atm.h.
Besides fixing the compatibility with linux-atm tools, removing the
kernel patch should simplify kernel updates removing unneeded burden of
maintenance.
Run tested with FRITZ!Box 7530 with disabled extra traffic classes and
then removed them entirely before the submission.
CC: John Crispin <john@phrozen.org>
Fixes: cfd42a0098 ("ipq40xx: add Intel/Lantiq ATM hacks")
Suggested-by: Andre Heider <a.heider@gmail.com>
Reported-and-tested-by: nebibigon93@yandex.ru
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Link: https://patchwork.ozlabs.org/project/openwrt/patch/20250122222654.21833-4-ryazanov.s.a@gmail.com/
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
ATM TC layer have some issues which effectively prevent VRX518 from
being used as ADSL modem. Specifically, there one crash during the ATM
layer configuration and wrong PVC ID selection on packet receiving what
breaks RX path. Fix both of the issues. Make subif iface registration
optional to prevent the crash (see more details in the new patch) and
update the hardcoded PVC ID to match the first allocated channel.
Run tested with FRITZ!Box 7530.
Fixes: 474bbe23b7 ("kernel: add Intel/Lantiq VRX518 TC driver")
Reported-and-tested-by: nebibigon93@yandex.ru
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Link: https://patchwork.ozlabs.org/project/openwrt/patch/20250122222654.21833-3-ryazanov.s.a@gmail.com/
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
It looks like VRX518 returns phys addr of data buffer in the 'data_ptr'
field of the RX descriptor and an actual data offset within the buffer
in the 'byte_off' field. In order to map the phys address back to
virtual we need the original phys address of the allocated buffer.
In the same driver applies offset to phys address before the mapping,
what leads to WARN_ON triggering in plat_mem_virt() function with
subsequent kernel panic:
WARNING: CPU: 0 PID: 0 at .../sw_plat.c:764 0xbf306cd0 [vrx518_tc@8af9f5d0+0x25000]
...
Unable to handle kernel NULL pointer dereference at virtual address 00000000
pgd = aff5701e
[00000000] *pgd=00000000
Internal error: Oops: 5 [#1] SMP ARM
Noticed in ATM mode, when chip always returns byte_off = 4.
In order to fix the issue, pass the phys address to plat_mem_virt() as
is and apply byte_off later for proper DMA syncing and on mapped virtual
address when copying RXed data into the skb.
Run tested with FRITZ!Box 7530 on both ADSL and VDSL (thanks Jan) links.
Fixes: 474bbe23b7 ("kernel: add Intel/Lantiq VRX518 TC driver")
Tested-by: Jan Hoffmann <jan@3e8.eu> # VDSL link
Reported-and-tested-by: nebibigon93@yandex.ru # ADSL link
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Link: https://patchwork.ozlabs.org/project/openwrt/patch/20250122222654.21833-2-ryazanov.s.a@gmail.com/
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
