The driver for MediaTek gen3 PCIe hosts de-asserts all reset
signals at the same time using a single register write operation.
Delay the de-assertion of the #PERST signal by 100ms as some PCIe
devices fail to come up otherwise.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Import commits from upstream Linux replacing some downstream patches.
Move accepted patches from pending-{5.15,6.1} to backport-{5.15,6.1}.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Using the I2C host controller on the MT7981 SoC requires 4 clocks to
be enabled. One of them, the pmic clk, is only enabled in case
'mediatek,have-pmic' is also set which has other consequences which
are not desired in this case.
Allow defining a pmic clk even in case the 'mediatek,have-pmic' propterty
is not present and the bus is not used to connect to a pmic, but may
still require to enable the pmic clock.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Unfortunately some device tree properties have slipped under the table
when switching from our downstream device tree.
Bring back 3W power for SFP cages and restore thermal trip points to
make sense again.
Fixes: 7a0ec001ff ("mediatek: sync MT7986 device trees with upstream")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Backport initial LEDs hw control support. Currently this is limited to
only rx/tx and link events for the netdev trigger but the API got
accepted and the additional modes are working on and will be backported
later.
Refresh every patch and add the additional config flag for QCA8K new
LEDs support.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Sync device tree files for MT7986 boards with what landed in upstream
Linux tree to easy maintainance and also allow for a smooth update to
Linux 6.1.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
PCK and MCK should really be P=PMIC and M=MEM, which means that they
should effectively be CLK_PMIC and CLK_ARB.
Suggested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
The USXGMII driver in SDK was heavily refactored, some bugs have been
fixed and it has switched to use phylink_pcs. Follow up with changes
in SDK driver and sync our on-top-of-mainline driver with the SDK
driver.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Pick accepted patches from upstream Linux tree instead of having to
maintain our slightly different downstream patches.
Import pending patch fixing I2C on MT7981 by making sure all clocks
are enabled before accessing I2C registers.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
The Richtek RT5190A is used on the MT7988 reference board. Backport and
enable the driver on the filogic subtarget, so we can support cpufreq
on the MT7988 reference board.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Add driver for the built-in 2.5G Ethernet PHY found in the MT7988 SoC.
To function the PHY also needs firmware files which have not yet been
published via linux-firmware.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Update driver for MediaTek's built-in Gigabit Ethernet PHYs which can be
found in the MT7981 and MT7988 SoCs.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
In order to support Ethernet on the MT7988 SoC add support for NETSYS v3
as well as new paths and USXGMII SerDes to the mtk_eth_soc driver.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This adds provisional pinctrl driver support for the MediaTek MT7988 SoC.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This adds clock drivers for the MediaTek MT7988 SoC
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Manually adjusted before running quilt due to new location in tree:
backport-5.15/780-v5.16-bus-mhi-pci_generic-Introduce-Sierra-EM919X-support.patch
backport-5.15/781-v6.1-bus-mhi-host-always-print-detected-modem-name.patch
pending-5.15/790-bus-mhi-core-add-SBL-state-callback.patch
All other patches automatically rebased.
Build system: x86_64
Build-tested: bcm2711/RPi4B, ramips/tplink_archer-a6-v3, filogic/xiaomi_redmi-router-ax6000-ubootmod
Run-tested: bcm2711/RPi4B, ramips/tplink_archer-a6-v3, filogic/xiaomi_redmi-router-ax6000-ubootmod
Signed-off-by: John Audia <therealgraysky@proton.me>
The OF LED configuration patch fails on MT7621, as the necessary headers
were only included for the mediatek subtarget with an additional patch.
Fixes: 242fe8634e ("generic: add hack for MT753x LED configuration")
Signed-off-by: David Bauer <mail@david-bauer.net>
MEMREAD is a new ioctl for MTD character devices that was first included
in Linux 6.1. It allows userspace applications to use the Linux
kernel's OOB autoplacement mechanism while reading data from NAND
devices. The Yafut tool needs this ioctl to do its job.
Signed-off-by: Michał Kępień <openwrt@kempniu.pl>
Backport new features for MediaTek pinctrl/pinconf drivers from upstream.
This will serve as the base to improve pinconf bias/pull-up/pull-down on
MT7981 and MT7986, and also prepare for upcoming support for MT7988.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Newer MediaTek's SoCs need SPI calibration routines for SPI to work
reliably. Import patches for that from MediaTek's SDK.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Add patch to support PWM on the MT7981 SoC.
This patch will also be submitted to upstream Linux soon.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Add patch to support I2C on the MT7981 SoC.
This change will also be submitted to upstream Linux soon.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
The mxl-gpy driver apparently was built in the assumption that SGMII
auto-negotiation is always switched on at the MAC. This may be true for
few rather recent drivers (why?), but certainly isn't for most drivers
unless 'managed = "in-band-status"' is set in device tree. Add patch to
the mediatek target which reduces mxl-gpy to behave more like an
ordinary PHY driver using out-of-band status.
This allows to use these PHYs without rate-adaptation which seems to be
at least partially broken/racy in some revisions of the PHY and/or
internal PHY firmware.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Backport patch allowing to set the MDIO bus clock frequency.
By default the MDIO bus clock runs on 2.5 MHz, allow increasing it
up to 25 MHz.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
MT7981 and the upcoming MT7988 have built-in Gigabit Ethernet PHYs.
While they share some design properties with the PHYs present in
MT753x, they do need calibration data from the SoC's efuse.
Add driver to support them. Upstreaming it is planned, but there are
still some ongoing discussions with MediaTek.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
