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mediatek: add support for SPI calibration
Newer MediaTek's SoCs need SPI calibration routines for SPI to work reliably. Import patches for that from MediaTek's SDK. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This commit is contained in:
Daniel Golle
parent
3542ee9d1f
commit
5403770105
@ -0,0 +1,130 @@
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From bfd3acc428085742d754a6d328d1a93ebf9451df Mon Sep 17 00:00:00 2001
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From: "SkyLake.Huang" <skylake.huang@mediatek.com>
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Date: Thu, 23 Jun 2022 18:29:51 +0800
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Subject: [PATCH 1/6] drivers: spi-mt65xx: Move chip_config to driver's private
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data
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Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
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---
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drivers/spi/spi-mt65xx.c | 29 +++++++++---------------
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include/linux/platform_data/spi-mt65xx.h | 17 --------------
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2 files changed, 11 insertions(+), 35 deletions(-)
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delete mode 100644 include/linux/platform_data/spi-mt65xx.h
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--- a/drivers/spi/spi-mt65xx.c
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+++ b/drivers/spi/spi-mt65xx.c
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@@ -14,7 +14,6 @@
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#include <linux/of.h>
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#include <linux/gpio/consumer.h>
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#include <linux/platform_device.h>
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-#include <linux/platform_data/spi-mt65xx.h>
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#include <linux/pm_runtime.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/spi-mem.h>
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@@ -142,6 +141,8 @@ struct mtk_spi {
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struct device *dev;
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dma_addr_t tx_dma;
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dma_addr_t rx_dma;
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+ u32 sample_sel;
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+ u32 get_tick_dly;
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};
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static const struct mtk_spi_compatible mtk_common_compat;
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@@ -187,15 +188,6 @@ static const struct mtk_spi_compatible m
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.no_need_unprepare = true,
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};
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-/*
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- * A piece of default chip info unless the platform
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- * supplies it.
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- */
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-static const struct mtk_chip_config mtk_default_chip_info = {
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- .sample_sel = 0,
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- .tick_delay = 0,
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-};
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-
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static const struct of_device_id mtk_spi_of_match[] = {
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{ .compatible = "mediatek,spi-ipm",
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.data = (void *)&mtk_ipm_compat,
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@@ -323,7 +315,6 @@ static int mtk_spi_hw_init(struct spi_ma
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{
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u16 cpha, cpol;
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u32 reg_val;
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- struct mtk_chip_config *chip_config = spi->controller_data;
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struct mtk_spi *mdata = spi_master_get_devdata(master);
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cpha = spi->mode & SPI_CPHA ? 1 : 0;
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@@ -373,7 +364,7 @@ static int mtk_spi_hw_init(struct spi_ma
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else
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reg_val &= ~SPI_CMD_CS_POL;
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- if (chip_config->sample_sel)
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+ if (mdata->sample_sel)
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reg_val |= SPI_CMD_SAMPLE_SEL;
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else
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reg_val &= ~SPI_CMD_SAMPLE_SEL;
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@@ -400,20 +391,20 @@ static int mtk_spi_hw_init(struct spi_ma
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if (mdata->dev_comp->ipm_design) {
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reg_val = readl(mdata->base + SPI_CMD_REG);
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reg_val &= ~SPI_CMD_IPM_GET_TICKDLY_MASK;
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- reg_val |= ((chip_config->tick_delay & 0x7)
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+ reg_val |= ((mdata->get_tick_dly & 0x7)
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<< SPI_CMD_IPM_GET_TICKDLY_OFFSET);
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writel(reg_val, mdata->base + SPI_CMD_REG);
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} else {
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reg_val = readl(mdata->base + SPI_CFG1_REG);
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reg_val &= ~SPI_CFG1_GET_TICK_DLY_MASK;
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- reg_val |= ((chip_config->tick_delay & 0x7)
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+ reg_val |= ((mdata->get_tick_dly & 0x7)
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<< SPI_CFG1_GET_TICK_DLY_OFFSET);
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writel(reg_val, mdata->base + SPI_CFG1_REG);
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}
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} else {
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reg_val = readl(mdata->base + SPI_CFG1_REG);
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reg_val &= ~SPI_CFG1_GET_TICK_DLY_MASK_V1;
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- reg_val |= ((chip_config->tick_delay & 0x3)
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+ reg_val |= ((mdata->get_tick_dly & 0x3)
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<< SPI_CFG1_GET_TICK_DLY_OFFSET_V1);
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writel(reg_val, mdata->base + SPI_CFG1_REG);
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}
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@@ -700,9 +691,6 @@ static int mtk_spi_setup(struct spi_devi
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{
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struct mtk_spi *mdata = spi_master_get_devdata(spi->master);
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- if (!spi->controller_data)
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- spi->controller_data = (void *)&mtk_default_chip_info;
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-
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if (mdata->dev_comp->need_pad_sel && spi->cs_gpiod)
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/* CS de-asserted, gpiolib will handle inversion */
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gpiod_direction_output(spi->cs_gpiod, 0);
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@@ -1115,6 +1103,10 @@ static int mtk_spi_probe(struct platform
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mdata = spi_master_get_devdata(master);
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mdata->dev_comp = of_id->data;
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+ /* Set device configs to default first. Calibrate it later. */
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+ mdata->sample_sel = 0;
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+ mdata->get_tick_dly = 2;
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+
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if (mdata->dev_comp->enhance_timing)
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master->mode_bits |= SPI_CS_HIGH;
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--- a/include/linux/platform_data/spi-mt65xx.h
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+++ /dev/null
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@@ -1,17 +0,0 @@
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-/* SPDX-License-Identifier: GPL-2.0-only */
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-/*
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- * MTK SPI bus driver definitions
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- *
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- * Copyright (c) 2015 MediaTek Inc.
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- * Author: Leilk Liu <leilk.liu@mediatek.com>
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- */
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-
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-#ifndef ____LINUX_PLATFORM_DATA_SPI_MTK_H
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-#define ____LINUX_PLATFORM_DATA_SPI_MTK_H
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-
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-/* Board specific platform_data */
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-struct mtk_chip_config {
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- u32 sample_sel;
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- u32 tick_delay;
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-};
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-#endif
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@ -0,0 +1,236 @@
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From 2ade0172154e50c8a2bfd8634c6eff943cffea29 Mon Sep 17 00:00:00 2001
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From: "SkyLake.Huang" <skylake.huang@mediatek.com>
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Date: Thu, 23 Jun 2022 18:35:52 +0800
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Subject: [PATCH 2/6] drivers: spi: Add support for dynamic calibration
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Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
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---
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drivers/spi/spi.c | 137 ++++++++++++++++++++++++++++++++++++++++
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include/linux/spi/spi.h | 42 ++++++++++++
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2 files changed, 179 insertions(+)
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--- a/drivers/spi/spi.c
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+++ b/drivers/spi/spi.c
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@@ -1234,6 +1234,70 @@ static int spi_transfer_wait(struct spi_
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return 0;
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}
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+int spi_do_calibration(struct spi_controller *ctlr, struct spi_device *spi,
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+ int (*cal_read)(void *priv, u32 *addr, int addrlen, u8 *buf, int readlen), void *drv_priv)
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+{
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+ int datalen = ctlr->cal_rule->datalen;
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+ int addrlen = ctlr->cal_rule->addrlen;
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+ u8 *buf;
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+ int ret;
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+ int i;
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+ struct list_head *cal_head, *listptr;
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+ struct spi_cal_target *target;
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+
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+ /* Calculate calibration result */
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+ int hit_val, total_hit, origin;
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+ bool hit;
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+
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+ /* Make sure we can start calibration */
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+ if(!ctlr->cal_target || !ctlr->cal_rule || !ctlr->append_caldata)
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+ return 0;
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+
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+ buf = kzalloc(datalen * sizeof(u8), GFP_KERNEL);
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+ if(!buf)
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+ return -ENOMEM;
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+
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+ ret = ctlr->append_caldata(ctlr);
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+ if (ret)
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+ goto cal_end;
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+
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+ cal_head = ctlr->cal_target;
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+ list_for_each(listptr, cal_head) {
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+ target = list_entry(listptr, struct spi_cal_target, list);
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+
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+ hit = false;
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+ hit_val = 0;
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+ total_hit = 0;
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+ origin = *target->cal_item;
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+
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+ for(i=target->cal_min; i<=target->cal_max; i+=target->step) {
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+ *target->cal_item = i;
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+ ret = (*cal_read)(drv_priv, ctlr->cal_rule->addr, addrlen, buf, datalen);
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+ if(ret)
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+ break;
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+ dev_dbg(&spi->dev, "controller cal item value: 0x%x\n", i);
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+ if(memcmp(ctlr->cal_rule->match_data, buf, datalen * sizeof(u8)) == 0) {
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+ hit = true;
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+ hit_val += i;
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+ total_hit++;
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+ dev_dbg(&spi->dev, "golden data matches data read!\n");
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+ }
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+ }
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+ if(hit) {
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+ *target->cal_item = DIV_ROUND_CLOSEST(hit_val, total_hit);
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+ dev_info(&spi->dev, "calibration result: 0x%x", *target->cal_item);
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+ } else {
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+ *target->cal_item = origin;
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+ dev_warn(&spi->dev, "calibration failed, fallback to default: 0x%x", origin);
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+ }
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+ }
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+
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+cal_end:
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+ kfree(buf);
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+ return ret? ret: 0;
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+}
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+EXPORT_SYMBOL_GPL(spi_do_calibration);
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+
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static void _spi_transfer_delay_ns(u32 ns)
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{
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if (!ns)
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@@ -2021,6 +2085,75 @@ void spi_flush_queue(struct spi_controll
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/*-------------------------------------------------------------------------*/
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#if defined(CONFIG_OF)
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+static inline void alloc_cal_data(struct list_head **cal_target,
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+ struct spi_cal_rule **cal_rule, bool enable)
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+{
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+ if(enable) {
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+ *cal_target = kmalloc(sizeof(struct list_head), GFP_KERNEL);
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+ INIT_LIST_HEAD(*cal_target);
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+ *cal_rule = kmalloc(sizeof(struct spi_cal_rule), GFP_KERNEL);
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+ } else {
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+ kfree(*cal_target);
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+ kfree(*cal_rule);
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+ }
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+}
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+
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+static int of_spi_parse_cal_dt(struct spi_controller *ctlr, struct spi_device *spi,
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+ struct device_node *nc)
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+{
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+ u32 value;
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+ int rc;
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+ const char *cal_mode;
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+
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+ rc = of_property_read_bool(nc, "spi-cal-enable");
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+ if (rc)
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+ alloc_cal_data(&ctlr->cal_target, &ctlr->cal_rule, true);
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+ else
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+ return 0;
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+
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+ rc = of_property_read_string(nc, "spi-cal-mode", &cal_mode);
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+ if(!rc) {
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+ if(strcmp("read-data", cal_mode) == 0){
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+ ctlr->cal_rule->mode = SPI_CAL_READ_DATA;
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+ } else if(strcmp("read-pp", cal_mode) == 0) {
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+ ctlr->cal_rule->mode = SPI_CAL_READ_PP;
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+ return 0;
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+ } else if(strcmp("read-sfdp", cal_mode) == 0){
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+ ctlr->cal_rule->mode = SPI_CAL_READ_SFDP;
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+ return 0;
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+ }
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+ } else
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+ goto err;
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+
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+ ctlr->cal_rule->datalen = 0;
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+ rc = of_property_read_u32(nc, "spi-cal-datalen", &value);
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+ if(!rc && value > 0) {
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+ ctlr->cal_rule->datalen = value;
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+
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+ ctlr->cal_rule->match_data = kzalloc(value * sizeof(u8), GFP_KERNEL);
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+ rc = of_property_read_u8_array(nc, "spi-cal-data",
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+ ctlr->cal_rule->match_data, value);
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+ if(rc)
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+ kfree(ctlr->cal_rule->match_data);
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+ }
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+
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+ rc = of_property_read_u32(nc, "spi-cal-addrlen", &value);
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+ if(!rc && value > 0) {
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+ ctlr->cal_rule->addrlen = value;
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+
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+ ctlr->cal_rule->addr = kzalloc(value * sizeof(u32), GFP_KERNEL);
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+ rc = of_property_read_u32_array(nc, "spi-cal-addr",
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+ ctlr->cal_rule->addr, value);
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+ if(rc)
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+ kfree(ctlr->cal_rule->addr);
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+ }
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+ return 0;
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+
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+err:
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+ alloc_cal_data(&ctlr->cal_target, &ctlr->cal_rule, false);
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+ return 0;
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+}
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+
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static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi,
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struct device_node *nc)
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{
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@@ -2139,6 +2272,10 @@ of_register_spi_device(struct spi_contro
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if (rc)
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goto err_out;
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+ rc = of_spi_parse_cal_dt(ctlr, spi, nc);
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+ if (rc)
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+ goto err_out;
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+
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/* Store a pointer to the node in the device structure */
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of_node_get(nc);
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spi->dev.of_node = nc;
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--- a/include/linux/spi/spi.h
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+++ b/include/linux/spi/spi.h
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@@ -290,6 +290,40 @@ struct spi_driver {
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struct device_driver driver;
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};
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+enum {
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+ SPI_CAL_READ_DATA = 0,
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+ SPI_CAL_READ_PP = 1, /* only for SPI-NAND */
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+ SPI_CAL_READ_SFDP = 2, /* only for SPI-NOR */
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+};
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+
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+struct nand_addr {
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+ unsigned int lun;
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+ unsigned int plane;
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+ unsigned int eraseblock;
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+ unsigned int page;
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+ unsigned int dataoffs;
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+};
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+
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+/**
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+ * Read calibration rule from device dts node.
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+ * Once calibration result matches the rule, we regard is as success.
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+ */
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+struct spi_cal_rule {
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+ int datalen;
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+ u8 *match_data;
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+ int addrlen;
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+ u32 *addr;
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+ int mode;
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+};
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+
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+struct spi_cal_target {
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+ u32 *cal_item;
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+ int cal_min; /* min of cal_item */
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+ int cal_max; /* max of cal_item */
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+ int step; /* Increase/decrease cal_item */
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+ struct list_head list;
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+};
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+
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static inline struct spi_driver *to_spi_driver(struct device_driver *drv)
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{
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return drv ? container_of(drv, struct spi_driver, driver) : NULL;
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@@ -665,6 +699,11 @@ struct spi_controller {
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void *dummy_rx;
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void *dummy_tx;
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+ /* For calibration */
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+ int (*append_caldata)(struct spi_controller *ctlr);
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+ struct list_head *cal_target;
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+ struct spi_cal_rule *cal_rule;
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+
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int (*fw_translate_cs)(struct spi_controller *ctlr, unsigned cs);
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/*
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@@ -1477,6 +1516,9 @@ spi_register_board_info(struct spi_board
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{ return 0; }
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#endif
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+extern int spi_do_calibration(struct spi_controller *ctlr,
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+ struct spi_device *spi, int (*cal_read)(void *, u32 *, int, u8 *, int), void *drv_priv);
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+
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/* If you're hotplugging an adapter with devices (parport, usb, etc)
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* use spi_new_device() to describe each device. You can also call
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* spi_unregister_device() to start making that device vanish, but
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@ -0,0 +1,41 @@
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From 06640a5da2973318c06e516da16a5b579622e7c5 Mon Sep 17 00:00:00 2001
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From: "SkyLake.Huang" <skylake.huang@mediatek.com>
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Date: Thu, 23 Jun 2022 18:37:55 +0800
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Subject: [PATCH 3/6] drivers: spi-mem: Add spi calibration hook
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Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
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---
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drivers/spi/spi-mem.c | 8 ++++++++
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include/linux/spi/spi-mem.h | 4 ++++
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2 files changed, 12 insertions(+)
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--- a/drivers/spi/spi-mem.c
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+++ b/drivers/spi/spi-mem.c
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@@ -410,6 +410,14 @@ int spi_mem_exec_op(struct spi_mem *mem,
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}
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EXPORT_SYMBOL_GPL(spi_mem_exec_op);
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+int spi_mem_do_calibration(struct spi_mem *mem,
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+ int (*cal_read)(void *priv, u32 *addr, int addrlen, u8 *buf, int readlen),
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+ void *priv)
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+{
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+ return spi_do_calibration(mem->spi->controller, mem->spi, cal_read, priv);
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+}
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+EXPORT_SYMBOL_GPL(spi_mem_do_calibration);
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+
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/**
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* spi_mem_get_name() - Return the SPI mem device name to be used by the
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* upper layer if necessary
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--- a/include/linux/spi/spi-mem.h
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+++ b/include/linux/spi/spi-mem.h
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@@ -366,6 +366,10 @@ bool spi_mem_supports_op(struct spi_mem
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int spi_mem_exec_op(struct spi_mem *mem,
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const struct spi_mem_op *op);
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+int spi_mem_do_calibration(struct spi_mem *mem,
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+ int (*cal_read)(void *, u32 *, int, u8 *, int),
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+ void *priv);
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+
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const char *spi_mem_get_name(struct spi_mem *mem);
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struct spi_mem_dirmap_desc *
|
||||
@ -0,0 +1,43 @@
|
||||
From d278c7a0bf730318a7ccf8d0a8b434c813e23fd0 Mon Sep 17 00:00:00 2001
|
||||
From: "SkyLake.Huang" <skylake.huang@mediatek.com>
|
||||
Date: Thu, 23 Jun 2022 18:39:03 +0800
|
||||
Subject: [PATCH 4/6] drivers: spi-mt65xx: Add controller's calibration
|
||||
paramter
|
||||
|
||||
Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
|
||||
---
|
||||
drivers/spi/spi-mt65xx.c | 16 ++++++++++++++++
|
||||
1 file changed, 16 insertions(+)
|
||||
|
||||
--- a/drivers/spi/spi-mt65xx.c
|
||||
+++ b/drivers/spi/spi-mt65xx.c
|
||||
@@ -800,6 +800,21 @@ static irqreturn_t mtk_spi_interrupt(int
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
+static int mtk_spi_append_caldata(struct spi_controller *ctlr)
|
||||
+{
|
||||
+ struct spi_cal_target *cal_target = kmalloc(sizeof(*cal_target), GFP_KERNEL);
|
||||
+ struct mtk_spi *mdata = spi_master_get_devdata(ctlr);
|
||||
+
|
||||
+ cal_target->cal_item = &mdata->get_tick_dly;
|
||||
+ cal_target->cal_min = 0;
|
||||
+ cal_target->cal_max = 7;
|
||||
+ cal_target->step = 1;
|
||||
+
|
||||
+ list_add(&cal_target->list, ctlr->cal_target);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
static int mtk_spi_mem_adjust_op_size(struct spi_mem *mem,
|
||||
struct spi_mem_op *op)
|
||||
{
|
||||
@@ -1092,6 +1107,7 @@ static int mtk_spi_probe(struct platform
|
||||
master->setup = mtk_spi_setup;
|
||||
master->set_cs_timing = mtk_spi_set_hw_cs_timing;
|
||||
master->use_gpio_descriptors = true;
|
||||
+ master->append_caldata = mtk_spi_append_caldata;
|
||||
|
||||
of_id = of_match_node(mtk_spi_of_match, pdev->dev.of_node);
|
||||
if (!of_id) {
|
||||
@ -0,0 +1,81 @@
|
||||
From 7670ec4a14891a1a182b98a9c403ffbf6b49e4b1 Mon Sep 17 00:00:00 2001
|
||||
From: "SkyLake.Huang" <skylake.huang@mediatek.com>
|
||||
Date: Thu, 23 Jun 2022 18:39:56 +0800
|
||||
Subject: [PATCH 5/6] drivers: mtd: spinand: Add calibration support for
|
||||
spinand
|
||||
|
||||
Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
|
||||
---
|
||||
drivers/mtd/nand/spi/core.c | 54 +++++++++++++++++++++++++++++++++++++
|
||||
1 file changed, 54 insertions(+)
|
||||
|
||||
--- a/drivers/mtd/nand/spi/core.c
|
||||
+++ b/drivers/mtd/nand/spi/core.c
|
||||
@@ -967,6 +967,56 @@ static int spinand_manufacturer_match(st
|
||||
return -ENOTSUPP;
|
||||
}
|
||||
|
||||
+int spinand_cal_read(void *priv, u32 *addr, int addrlen, u8 *buf, int readlen) {
|
||||
+ struct spinand_device *spinand = (struct spinand_device *)priv;
|
||||
+ struct device *dev = &spinand->spimem->spi->dev;
|
||||
+ struct spi_mem_op op = SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, buf, readlen);
|
||||
+ struct nand_pos pos;
|
||||
+ struct nand_page_io_req req;
|
||||
+ u8 status;
|
||||
+ int ret;
|
||||
+
|
||||
+ if(addrlen != sizeof(struct nand_addr)/sizeof(unsigned int)) {
|
||||
+ dev_err(dev, "Must provide correct addr(length) for spinand calibration\n");
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+
|
||||
+ ret = spinand_reset_op(spinand);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ /* We should store our golden data in first target because
|
||||
+ * we can't switch target at this moment.
|
||||
+ */
|
||||
+ pos = (struct nand_pos){
|
||||
+ .target = 0,
|
||||
+ .lun = *addr,
|
||||
+ .plane = *(addr+1),
|
||||
+ .eraseblock = *(addr+2),
|
||||
+ .page = *(addr+3),
|
||||
+ };
|
||||
+
|
||||
+ req = (struct nand_page_io_req){
|
||||
+ .pos = pos,
|
||||
+ .dataoffs = *(addr+4),
|
||||
+ .datalen = readlen,
|
||||
+ .databuf.in = buf,
|
||||
+ .mode = MTD_OPS_AUTO_OOB,
|
||||
+ };
|
||||
+
|
||||
+ ret = spinand_load_page_op(spinand, &req);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ ret = spinand_wait(spinand, &status);
|
||||
+ if (ret < 0)
|
||||
+ return ret;
|
||||
+
|
||||
+ ret = spi_mem_exec_op(spinand->spimem, &op);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
static int spinand_id_detect(struct spinand_device *spinand)
|
||||
{
|
||||
u8 *id = spinand->id.data;
|
||||
@@ -1217,6 +1267,10 @@ static int spinand_init(struct spinand_d
|
||||
if (!spinand->scratchbuf)
|
||||
return -ENOMEM;
|
||||
|
||||
+ ret = spi_mem_do_calibration(spinand->spimem, spinand_cal_read, spinand);
|
||||
+ if (ret)
|
||||
+ dev_err(dev, "Failed to calibrate SPI-NAND (err = %d)\n", ret);
|
||||
+
|
||||
ret = spinand_detect(spinand);
|
||||
if (ret)
|
||||
goto err_free_bufs;
|
||||
@ -0,0 +1,57 @@
|
||||
From f3fe3b15eca7908eaac57f9b8387a5dbc45ec5b2 Mon Sep 17 00:00:00 2001
|
||||
From: "SkyLake.Huang" <skylake.huang@mediatek.com>
|
||||
Date: Thu, 23 Jun 2022 18:40:59 +0800
|
||||
Subject: [PATCH 6/6] drivers: mtd: spi-nor: Add calibration support for
|
||||
spi-nor
|
||||
|
||||
Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
|
||||
---
|
||||
drivers/mtd/nand/spi/core.c | 5 ++++-
|
||||
drivers/mtd/spi-nor/core.c | 15 +++++++++++++++
|
||||
2 files changed, 19 insertions(+), 1 deletion(-)
|
||||
|
||||
--- a/drivers/mtd/nand/spi/core.c
|
||||
+++ b/drivers/mtd/nand/spi/core.c
|
||||
@@ -1008,7 +1008,10 @@ int spinand_cal_read(void *priv, u32 *ad
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
- ret = spinand_wait(spinand, &status);
|
||||
+ ret = spinand_wait(spinand,
|
||||
+ SPINAND_READ_INITIAL_DELAY_US,
|
||||
+ SPINAND_READ_POLL_DELAY_US,
|
||||
+ &status);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
--- a/drivers/mtd/spi-nor/core.c
|
||||
+++ b/drivers/mtd/spi-nor/core.c
|
||||
@@ -3060,6 +3060,18 @@ static void spi_nor_debugfs_init(struct
|
||||
info->id_len, info->id);
|
||||
}
|
||||
|
||||
+static int spi_nor_cal_read(void *priv, u32 *addr, int addrlen, u8 *buf, int readlen)
|
||||
+{
|
||||
+ struct spi_nor *nor = (struct spi_nor *)priv;
|
||||
+
|
||||
+ nor->reg_proto = SNOR_PROTO_1_1_1;
|
||||
+ nor->read_proto = SNOR_PROTO_1_1_1;
|
||||
+ nor->read_opcode = SPINOR_OP_READ;
|
||||
+ nor->read_dummy = 0;
|
||||
+
|
||||
+ return nor->controller_ops->read(nor, *addr, readlen, buf);
|
||||
+}
|
||||
+
|
||||
static const struct flash_info *spi_nor_get_flash_info(struct spi_nor *nor,
|
||||
const char *name)
|
||||
{
|
||||
@@ -3133,6 +3145,9 @@ int spi_nor_scan(struct spi_nor *nor, co
|
||||
if (!nor->bouncebuf)
|
||||
return -ENOMEM;
|
||||
|
||||
+ if(nor->spimem)
|
||||
+ spi_mem_do_calibration(nor->spimem, spi_nor_cal_read, nor);
|
||||
+
|
||||
info = spi_nor_get_flash_info(nor, name);
|
||||
if (IS_ERR(info))
|
||||
return PTR_ERR(info);
|
||||
@ -1,6 +1,6 @@
|
||||
--- a/drivers/spi/spi-mt65xx.c
|
||||
+++ b/drivers/spi/spi-mt65xx.c
|
||||
@@ -1223,10 +1223,16 @@ static int mtk_spi_probe(struct platform
|
||||
@@ -1231,10 +1231,16 @@ static int mtk_spi_probe(struct platform
|
||||
goto err_disable_spi_hclk;
|
||||
}
|
||||
|
||||
@ -18,7 +18,7 @@
|
||||
}
|
||||
|
||||
mdata->spi_clk_hz = clk_get_rate(mdata->spi_clk);
|
||||
@@ -1277,6 +1283,8 @@ static int mtk_spi_probe(struct platform
|
||||
@@ -1285,6 +1291,8 @@ static int mtk_spi_probe(struct platform
|
||||
|
||||
err_disable_runtime_pm:
|
||||
pm_runtime_disable(&pdev->dev);
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user