ar71xx uses `archer-c7-v5` for led prefix, but ath79 sticks to more
generic `tplink` as the DTS is reused by more boards, so we need to
perform migrations of the LED names during upgrade.
Cc: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Commit "generic: ar8216: add mib_poll_interval switch attribute" sets
mib-poll-interval as disabled by default (was set to 2s), so it makes
switch LEDs trigger disfunctional on devices which don't have
mib-poll-interval set.
So this patch sets mib-poll-interval to 500ms on devices which have
ar83xx switch connected to mdio0 bus, as the same value was set for
built in switches in 443fc9ac35 ("ath79: use ar8216 for builtin
switch").
Some measurements performed on TP-Link Archer C7-v5:
mib-type=0, mib-poll-interval=500ms (10s pidstat)
Average: %usr %system %guest %wait %CPU CPU Command
Average: 0.00 1.93 0.00 0.00 1.93 - kworker/0:2
iperf3 (30s): 334 Mbits/sec
mib-type=0, mib-poll-interval=2s (10s pidstat)
Average: %usr %system %guest %wait %CPU CPU Command
Average: 0.00 1.14 0.00 0.00 1.14 - kworker/0:2
iperf3 (30s): 334 Mbits/sec
So it seems like we get 4x faster LED refresh rate for additional 0.8%
CPU load.
Signed-off-by: Petr Štetiar <ynezz@true.cz>
This patch converts the Range Extender to use the
interrupt-driven gpio-keys driver over the polled variant.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
This patch converts the WNDR3700 to use the interrupt-driven
gpio-keys driver over the polled variant.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
All other QCA9563 devices already use this identifier for
the exact SoC. Not that this matters much since as upstream
states in Documentation/devicetree/usage-model.txt:
"First and foremost, the kernel will use data in the DT to
identify the specific machine. In a perfect world, the
specific platform shouldn't matter to the kernel because all
platform details would be described perfectly by the device
tree in a consistent and reliable manner.
[...]
In the majority of cases, the machine identity is irrelevant,
and the kernel will instead select setup code based on the
machine's core CPU or SoC."
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
TP-Link Archer D50 v1 is a dual-band AC1200 router + modem.
The router section is based on Qualcomm/Atheros QCA9531 + QCA9882.
The "DSL" section is based on BCM6318 but it's currently not supported.
Internally eth0 is connected to the Broadcom CPU.
Router section - Specification:
CPU: QCA9531 650/600/200 MHz (CPU/DDR/AHB)
RAM: 64 MB (DDR2)
Flash: 8 MB (SPI NOR)
Wifi 2.4GHz: QCA9531 2T2R
Wifi 5GHz: QCA9982 2T2R
4x 10/100 Mbps Ethernet
8x LED, 3x button
UART header on PCB
Known issues:
DSL not working (eth0) (WIP)
UART connection
---------------
J2 HEADER (Qualcomm CPU)
. TX
. RX
. GND
O VCC
J16 HEADER (Broadcom CPU)
O VCC
. GND
. RX
. TX
The following instructions require a connection to the J2 UART header.
Flash instruction under U-Boot, using UART
------------------------------------------
1. Press any key to stop autobooting and obtain U-Boot CLI access.
2. Setup ip addresses for U-Boot and your tftp server.
3. Issue below commands:
tftpboot 0x81000000 openwrt-ath79-generic-tplink_archer-d50-v1-squashfs-sysupgrade.bin
erase 0x9f020000 +$filesize
cp.b 0x81000000 0x9f020000 $filesize
reset
Initramfs instruction under U-Boot for testing, using UART
----------------------------------------------------------
1. Press any key to stop autobooting and obtain U-Boot CLI access.
2. Setup ip addresses for U-Boot and your tftp server.
3. Issue below commands:
tftpboot 0x81000000 openwrt-ath79-generic-tplink_archer-d50-v1-initramfs-kernel.bin
bootm 0x81000000
Restore the original firmware
-----------------------------
0. Backup every partition using the OpenWrt web interface
1. Download the OEM firmware from the TP-Link website
2. Extract the bin file in a folder (eg. Archer_D50v1_0.8.0_1.3_up_boot(170223)_full_2017-02-24_09.37.45.bin)
3. Remove the U-Boot and the Broadcom image part from the file.
Issue the following command:
dd if="Archer_D50v1_0.8.0_1.3_up_boot(170223)_full_2017-02-24_09.37.45.bin" of="Archer_D50v1_0.8.0_1.3_up_boot(170223)_full_2017-02-24_09.37.45.bin.mod" skip=257 bs=512 count=15616
4. Double check the .mod file size. It must be 7995392 bytes.
5. Flash it using the OpenWrt web interface. Force the update if needed.
WARNING: Remember to NOT keep settings.
5b. (Alternative to 5.) Flash it using the U-Boot and UART connection.
Issue below commands in the U-Boot:
tftpboot 0x81000000 Archer_D50v1_0.8.0_1.3_up_boot(170223)_full_2017-02-24_09.37.45.bin.mod
erase 0x9f020000 +$filesize
cp.b 0x81000000 0x9f020000 $filesize
reset
Signed-off-by: Davide Fioravanti <pantanastyle@gmail.com>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com> [removed
default-state = "off", it's already the default, added pcie node,
fixed typo]
SoC: Atheros AR7161-8C1A @ 680 MHz
RAM: 128MB - 2x Etron Technology EM6AB160TSA-5G
NOR: 16MB - 1x MXIC MX25L12845EMI-10G (SPI-NOR)
WI1: Atheros AR9223-AC1A 802.11bgn
WI2: Atheros AR9220-AC1A 802.11an
ETH: Atheros AR8021-BL1E + PoE
LED: Dual-Color Power/Status, Ethernet, WLAN2G and WLAN5G
BTN: 1 x Reset
I2C: AT97SC4303s TPM (needs driver!)
CON: RS232-level 8P8C/RJ45 Console Port - 9600 Baud
Factory installation:
- Needs a u-boot replacement. See Wiki for
information on how to do a in-circut flash with
a SPI-Flasher like a CH314A or flashrom. Wiki page
can be found at https://openwrt.org/toh/aruba/aruba_ap-105
- Be careful when dis- and reassembling the device to
not squish any of the antenna cables in the process!
- Be sure to make a full 16 MiB backup of your device
before flashing the new u-boot! This is needed if you
ever have interest in reverting back to stock firmware.
Not working:
- TPM (needs a driver)
Signed-off-by: Chris Blake <chrisrblake93@gmail.com>
Specifications:
- QCA9563 at 775 MHz
- 64 MB RAM Zentel A3R12E40CBF-8E
- 16 MB flash Winbond W25Q128FVSG
- 3 (non-detachable) Antennas / 450 Mbit
- 1x/4x WAN/LAN Gbps Ethernet (QCA8337)
- reset and Wi-Fi buttons
TP-Link TL-WR1043N v5 appears to be identical to the TL-WR1043ND v4,
except that the USB port has been removed and there is no longer a
removable antenna option. It also has different partitioning scheme.
The software is more in line with the Archer series in that it uses a
nested bootloader scheme.
(This has been adapted from the OpenWrt Wiki page)
<https://openwrt.org/toh/tp-link/tl-wr1043nd>
Installation on HW rev.5:
Factory firmware can be installed via the WEB interface.
Alternatively, it is also possible to use a TFTP server
for recovery purposes:
- Rename OpenWRT or original firmware to WR1043v5_tp_recovery.bin
- Set static IP of your PC to *192.168.0.66*
- Router will obtain IP 192.168.0.86 for a few seconds while
loading, when reset button pressed at power On.
And finally, there's always u-boot access through the UART.
For information visit the wiki.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
[reworked commit message]
Specification:
- Qualcomm Atheros SoC QCA9558
- 720/600/200 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 16 MB of FLASH (SPI NOR)
- 1x 10/100/1000 Mbps Ethernet
- 3T3R 2.4 GHz (QCA9558 WMAC)
- 3T3R 5.8 Ghz (QCA9880-BR4A, Senao PCE4553AH)
https://fccid.io/A8J-ECB1750
Tested and working:
- lan, wireless, leds, sysupgrade (tftp)
Flash instructions:
1.) tftp recovery
- use a 1GbE switch or direct attached 1GbE link
- setup client ip address 192.168.1.10 and start tftpd
- save "openwrt-ath79-generic-engenius_ecb1750-initramfs-kernel.bin" as "ap.bin" in tfpd root directory
- plugin powercord and hold reset button 10secs.. "ap.bin" will be downloaded and executed
- afterwards login via ssh and do a sysuprade
2.) oem webinterface factory install (not tested)
Use normal webinterface upgrade page und select "openwrt-ath79-generic-engenius_ecb1750-squashfs-factory.bin".
3.) oem webinterface command injection
OEM Firmware already running OpenWrt (Attitude Adjustment 12.09).
Use OEM webinterface and command injection. See wiki for details.
https://openwrt.org/toh/engenius/engenius_ecb1750_1
Signed-off-by: sven friedmann <sf.openwrt@okay.ms>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
[use interrupt-driven "gpio-keys" binding]
These dts itself are incomplete (e.g. missing mtd partitions) and its
deivce support is never added to ath79 target.
Drop these unused dts for now.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
In commit e9652e1696 ("ath79: fix pinmux for ar933x devices") I've
wrongly changed desired register value to 0xf8 although it should've
been set to 0x0.
0xf8 value sets bits 3-7 (ETH_SWITCH_LEDx_EN) to 1 which actually
enables ethernet switch LEDs, so 0x0 is correct value in order to use
the pins as GPIO.
Fixes: e9652e1696 ("ath79: fix pinmux for ar933x devices")
Reported-by: Chuanhong Guo <gch981213@gmail.com>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Simply dumped content of this regs in ar71xx and wrote them to DTS, as a
result port 6 on the switch will appear disconnected as on Archer C7v4.
[AS: testing and PORT6_STATUS fix]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Properly disable the SoC's internal Switch LEDs on the pinmux.
Devices that previously called ath79_gpio_function_disable for
the switch LEDs, just need to reference switch_led_pins in the
pinctrl-0 property of the gpio-leds node.
Signed-off-by: Paul Wassi <p.wassi@gmx.at>
[changed desired pinctrl register value from 0x1f to proper 0xf8]
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
[renamed pinmux name to switch_led_disable_pins to make purpose more clear]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
This devices have LEDs connected to the SoC's GPIOs, so it makes no
sense to fiddle with ar8327 LED regs.
Tested-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Add some read-only properties to protect partitions from
accidental changes.
Also fixed two whitespaces error on the way.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
If the target supports a newer kernel version that is not used by default
yet, it can be enabled with this option
Signed-off-by: Felix Fietkau <nbd@nbd.name>
This corrects the PLL value for 10 Mbit/s links on the OCEDO Raccoon.
Prior to this patch, 10 Mbit/s links would not transmit data.
It is worth mentioning that the vendor firmware used the same PLL
settings and 10Mbit/s was also not working there.
All other link-modes are working correctly without any packet loss.
Signed-off-by: David Bauer <mail@david-bauer.net>
Reverting this commit as I've missed the fact, that the button is
already present in the included DTSI file.
Signed-off-by: Petr Štetiar <ynezz@true.cz>
I-O DATA ETG3-R is a wired router. So wireless-related packages are
unnecessary and remove those packages from default configuration to
reduce flash usage.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
This adds support for the TP-Link WR842N v3 which is already supported on ar71xx
target (0b45bec22c).
Specification:
* SoC: QCA9533 ver 2 rev 0
* 16 MB Flash (gd25q128)
* 64 MB RAM
* 1 WAN 10/100 MBit/s (blue connector)
* 4 LAN 10/100 MBit/s (AR8229; 4 ports; yellow connectors)
* Atheros AR9531 (2,4GHz, two fixed antennas)
* USB
* Reset / WPS button
* WiFi button (rf kill)
* 8 green leds; 1 red/green led
* serial console (115200 8N1, according to the OpenWrt-wiki some soldering is needed)
Installation:
* flash via vendor WebUI (the filename must not exceed certain length)
* sysupgrade from installed OpenWrt (also ar71xx)
Thanks to Holger Drefs for providing the hardware
Tested-by: @kofec (github)
Signed-off-by: Sven Roederer <devel-sven@geroedel.de>
This is sold as a dual-band 802.11ac range extender. It has a sliding
switch for Extender mode or Access Point mode, a WPS button, a recessed
Reset button, a hard-power button, and a multitude of LED's, some
multiplexed via an NXP 74AHC164D chip. The internal serial header pinout is
Vcc, Tx, Rx, GND, with GND closest to the corner of the board. You may
connect at 115200 bps, 8 data bits, no parity, 1 stop bit.
Specification:
- System-On-Chip: QCA9558
- CPU/Speed: 720 MHz
- Flash-Chip: Winbond 25Q128FVSG
- Flash size: 16 MiB
- RAM: 128 MiB
- Wireless No1: QCA9558 on-chip 2.4GHz 802.11bgn, 3x3
- Wireless No2: QCA99x0 chip 5GHz 802.11an+ac, 4x4
- PHY: Atheros AR8035-A
Installation:
If you can get to the stock firmware's firmware upgrade option, just feed
it the factory.img and boot as usual. As an alternative, TFTP the
factory.img to the bootloader.
Signed-off-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
[whitespace fix in DTS and reorder of make variables]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Remove Netgear-specific image build variables which are set to the same
value.
Signed-off-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
[reordering of variables, removed stray newline]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
These devices share the network config with C7v4, thus the WAN MAC
also needs to be fixed the same way. However, the partition
where the MAC address resides has been changed.
Based on: https://github.com/openwrt/openwrt/pull/1726
Tested-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
The GPIO for the reset button for the Archer C7v5 changed from
ar71xx to ath79. An investigation based on tests revealed
that the A7v5 responds on "11", while the C7v5 responds on
"5" as set for ar71xx.
Thus, we just define this in the DTS files instead of in the
common DTSI.
Tested-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Definition is split here without obvious reason. Just merge it
(and align order to that from C7 v4).
Tested-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
The Ubiquiti Network airCube ISP is a cube shaped 2.4 GHz with internal
2x2 MIMO antennas. It can be supplied via a USB connector or via PoE.
There are for 10/100 Mbps ports (1 * WAN + 3 * LAN). There is an
optional PoE passthrough from the first LAN port to the WAN port.
SoC: Qualcomm / Atheros QCA9533-BL3A
RAM: 64 MB DDR2
Flash: 16 MB SPI NOR
Ethernet: 4x 10/100 Mbps (1 WAN + 3 LAN)
LEDS: 1x via a SPI controller (not yet supported)
Buttons: 1x Reset
Serial: 1x (only RX and TX); 115200 baud, 8N1
Missing points:
- LED not yet supported
- Factory upgrade via web IF or TFTP recovery not yet supported
(Needs RSA signed images, for details see PR#1958)
The serial port is on a four pin connextor labeled J1 and located
between Ethernet and USB connector. The pinout is:
1. 3V3 (out)
2. Rx (in)
3. Tx (out)
4. GND
Upgrading via serial port / U-Boot:
- Connect the serial port via a level converter
- Power the system and stop U-Boot with pressing any key when `Hit any
key to stop autoboot` is displayed. Note: Pressing space multiple
times untill U-Boot reaches that location works well.
- Connect a PC with the IP 192.168.1.100 (or some other in that net)
running a TFTP-Server to one of the LAN ports. Copy the sysupgrade
image to the server.
- Set the U-Boot server IP with
setenv serverip 192.168.1.100
- Load the flash image to RAM with
tftpboot 0x81000000 sysupgrade.bin
- Erase the flash with
erase 0x9f050000 0x9ffaffff
- Write the new flash content with
cp 0x81000000 0x9f050000 ${filesize}
- Reset the device with
reset
Signed-off-by: Christian Mauderer <oss@c-mauderer.de>
[removed full stop in subject and added lockdown note to commit message]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
SOC: Qualcomm Atheros QCA9558
RAM: 128MB
FLASH: 16MB (Macronix MX25L12845EMI-10G)
WLAN1: QCA9558 2.4GHz 802.11bgn 3SS
WLAN2: QCA9880 5GHz 802.11ac 3SS
LED: Power, LAN1, LAN2, 2.4GHz, 5GHz
Serial:Next to SPI Flash,
Pinout is 3V3 - GND - TX - RX (Square Pin is 3V3)
The Serial setting is 115200-8-N-1
INSTALLATION:
1. Serve an OpenWrt ramdisk image named "ursus.bin".
Set your IP-address to 192.168.100.8/24.
2. Connect to the serial. Power up the device and interrupt
the boot process.
3. Set the correct bootcmd with
> setenv bootcmd run bootcmd_1
> saveenv
4. Run
> tftpboot 0x81000000 ursus.bin
> bootm 0x81000000
5. Wait for OpenWrt to boot up.
6. Transfer OpenWrt sysupdate image and flash via sysupgrade.
Signed-off-by: Markus Scheck <markus.scheck1@gmail.com>
Tested-by: David Bauer <mail@david-bauer.net>
[whitespace fix, renamed LED labels and SoC type fix]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
In ar71xx we check for stuck DMA on devices which fall in the is_ar724x
SoC group (ar724x, ar933x, ar934x, qca9533, tp9343, qca955x, qca956x).
In ath79 we're currently performing this check only for devices with
ar7240 SoC, so this patch tries to sync the dma stuck checking behavior
with what is being done in ar71xx.
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Currently, tplink-safeloader definition is only used a base for
another common definition.
This patch adjusts tplink-safeloader so it can be actually used
for some targets in generic-tp-link.mk.
This patch is cosmetic except for the order of
"check-size $$$$(IMAGE_SIZE)" and "append-metadata" exchanged
for the tplink_re350k-v1 .
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com> [dealed with
tplink_cpe210-v2 and tplink_cpe210-v3, removed tplink-safeloader-uimage's
extra IMAGE/sysupgrade.bin rule]
With transition from ar71xx to ath79 some of devices change their naming
of LEDs. When upgrading from ar71xx target images this will require the
user to adjust previously working configuration. This commit adds
migration script which can be used to rename old names to new ones.
With this previously working configuration will be automatically
adjusted, wihtout user intervention.
This commit adds migration case for EnGenius EPG5000, the wireless LEDs
names have changed from epg5000:blue:wlan2-g and epg5000:blue:wlan-5g to
epg5000:blue:wlan2g and epg5000:blue:wlan5g.
Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
This PR adds support for a popular low-cost 2.4GHz N based AP
Specifications:
- SoC: Qualcomm Atheros QCA9533 (650MHz)
- RAM: 64MB
- Storage: 8 MB SPI NOR
- Wireless: 2.4GHz N based built into SoC 2x2
- Ethernet: 1x 100/10 Mbps, integrated into SoC, 24V POE IN
Installation:
Flash factory image through stock firmware WEB UI
or through TFTP
To get to TFTP recovery just hold reset button while powering on
for around 4-5 seconds and release.
Rename factory image to recovery.bin
Stock TFTP server IP:192.168.0.100
Stock device TFTP adress:192.168.0.254
This is based on the support patch for the identical CPE210 v3
by Mario Schroen <m.schroen@web.de>.
Tested-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
[renamed dtsi filename]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Specifications:
* SoC: Qualcomm Atheros QCA9533 (650MHz)
* RAM: 64MB
* Storage: 8 MB SPI NOR
* Wireless: 2.4GHz N based built into SoC 2x2
* Ethernet: 1x 100/10 Mbps, integrated into SoC, 24V POE IN
Installation:
Flash factory image through stock firmware WEB UI or TFTP
To get to TFTP recovery just hold reset button while powering
on for around 4-5 seconds and release.
Rename factory image to recovery.bin
Stock TFTP server IP:192.168.0.100
Stock device TFTP adress:192.168.0.254
Thanks to robimarko for the work inside the ar71xx tree.
Thanks to adrianschmutzler for deep discussion and fixes.
Signed-off-by: Mario Schroen <m.schroen@web.de>
[Split into DTS/DTSI, read-only config partition in DTSI]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
[renamed dtsi filename, light subject touches]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
COMFAST CF-E5/E7 is a outdoor 4G LTE AP with PoE support, based on
Qualcomm/Atheros QCA9531.
Short specification:
2x 10/100 Mbps Ethernet, with 24v PoE support
64 MB of RAM (DDR2)
16 MB of FLASH (SPI)
2T2R 2.4 GHz, 802.11b/g/n
built-in 1x 3 dBi antennas
output power (max): 80 mW (19 dBm)
Qucetel EC20 LTE MODULE(1x external detachable antenna)
Flash instruction:
Original firmware is based on OpenWrt.
Use sysupgrade image directly in vendor GUI.
Signed-off-by: Ding Tengfei <dtf@comfast.cn>
[commit subject fix]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
This commit adds support for TP-Link TL-WR710N v1 router.
CPU: Atheros AR9331 400MHz
RAM: 32MB
FLASH: 8MiB
PORTS: 1 Port 100/10 LAN (connected to a switch), 1 Port 100/10 WAN
WiFi: Atheros AR9331 1x2:1 bgn
USB: ChipIdea HDRC USB2.0
LED: SYS
BTN: Reset
Sysupgrade from `ar71xx` works without glitches.
Network interfaces assigned for LAN and WAN ports are `eth1` and `eth0`
respectively, what's consistent with `ar71xx` target. Wireless radio
path is automatically upgraded from `platform/ar933x_wmac` to
`platform/ahb/18100000.wmac`.
Signed-off-by: Marcin Jurkowski <marcin1j@gmail.com>
This adds support for the Chinese version of TL-WR941N v7.
It uses QCA9558+AR8236 while the international version
uses TP9343 instead.
Specification:
- SoC: Qualcomm Atheros QCA9558
- Flash: 4 MB
- RAM: 64 MB
- Ethernet: Atheros AR8236 with 5 FE ports
Flash instruction:
Upload the generated factory firmware on web interface.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
The following patches are dropped because they are merged upstream:
-0001-tty-serial-drop-QCA-pecific-SoC-symbols.patch
-0006-usb-drop-deprecated-symbols.patch
-0009-MIPS-ath79-add-lots-of-missing-registers.patch
-0010-MIPS-ath79-add-support-for-QCA953x-QCA956x-TP9343.patch
-0014-MIPS-ath79-finetune-cpu-overrides.patch
-0015-MIPS-ath79-enable-uart-during-early_prink.patch
-0016-MIPS-ath79-get-PCIe-controller-out-of-reset.patch
This patch is dropped due to the introduction of spi-mem framework:
-461-spi-ath79-add-fast-flash-read.patch
Thank to Michael Marley @mamarley for his work on this patch:
-910-unaligned_access_hacks.patch
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
[synchronized kernel config with make kernel_oldconfig]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
linux 4.19 doesn't accept a NULL device for these functions.
It also complains that the device struct in net_device doesn't have
a dma_mask set.
Pass the device struct from platform_device for these functions.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Kernel newer than 4.15 dropped "data" field and used from_timer
to cast out the parent struct pointer for current timer.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
The NanoBeam is a small AR9342 based directional 5 GHz AC CPE with hardware
almost identical to the Ubiquiti NanoStation AC loco. Over the NanoStation
AC loco it has 5 additional LEDs. Four of those LEDs are used as rssi
indicators, the fifth LED is used as an ethernet link/activity indicator.
CPU: Atheros AR9342 SoC
RAM: 64 MB DDR2
Flash: 16 MB NOR SPI
WLAN: QCA988X
Ports: 1x GbE
Flashing procedure is identical to the NanoStation AC loco and can be performed
either via serial or the factory firmware upgrade.
Serial flashing:
1. Connect to serial header on device (8N1 115200)
2. Power on device and enter uboot console
3. Set up tftp server serving an openwrt initramfs build
4. Load initramfs build using the command tftpboot in the uboot cli
5. Boot the loaded image using the command bootm
6. Copy squashfs openwrt sysupgrade build to the booted device
7. Use mtd to write sysupgrade to partition "firmware"
8. Reboot and enjoy
Flashing through factory firmware:
1. Ensure firmware version v8.5.0.36727 is installed. Up/downgrade to this exact version.
2. Patch fwupdate.real binary using `hexdump -Cv /bin/ubntbox | sed 's/14 40 fe fe/00 00 00 00/g' | hexdump -R > /tmp/fwupdate.real`
3. Make the patched fwupdate.real binary executable using `chmod +x /tmp/fwupdate.real`
4. Copy the squashfs factory image to /tmp on the device
5. Flash OpenWRT using `/tmp/fwupdate.real -m <squashfs-factory image>`
6. Wait for the device to reboot
Thanks to @cybermaus for testing!
Tested-by: Maurits van Dueren den Hollander <cybermaus@gmail.com>
Signed-off-by: Tobias Schramm <tobleminer@gmail.com>
The port labled as "LAN" is eth1.
That's different from the -lite variant,
where the only existing port eth0 is used as LAN
Signed-off-by: Andreas Ziegler <dev@andreas-ziegler.de>
Support for the Nanostation M (XW) was added in 40530c8eb with board
name "nanostation-m-xw". The current image for the "Nanostation M"
uses "nano-m" as the board name.
This commit renames it to the full product name as it's used by all
other boards. The legacy boardname of the ar71xx target is added
via SUPPORTED_DEVICES to ease switching to ath79 target.
Signed-off-by: Sven Roederer <devel-sven@geroedel.de>
[touch-ups on the commit message, removed subject remains]
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
jjPlus JA76PF2 (marketed as IntellusPro2) is a network embedded board.
Specification
SoC: Atheros AR7161
RAM: 64 MB DDR
Flash: 16 MB SPI NOR
Ethernet: 2x 10/100/1000 Mbps AR8316
LAN (CN11), WAN/PoE (CN6 - close to power barrel
connector, 48 V)
MiniPCI: 2x
LEDS: 4x, which 3 are GPIO controlled
Buttons: 2x GPIO controlled
Reset (SW1, closer to ethernet ports), WPS (SW2)
Serial: 1x (only RX and TX are wired)
baud: 115200, parity: none, flow control: none
Currently there is one caveat compared to ar71xx target images as the
MAC addresses are random on every reboot. To remedy this one needs to
store the WAN MAC address in RedBoot configuration. OpenWrt on first
boot, after flashing, will read out the address and assign proper ones
to both WAN and LAN ports. It is iportant to NOT keep the old
configuration when doing sysupgrade from ar71xx.
Upgrading from OpenWrt ar71xx image
1. Connect to serial port,
2. Download OpenWrt sysupgrade image to /tmp directory and flash it
with:
sysupgrade -n <openwrt_sysupgrade_image_name>
3. After writing new image OpenWrt will reboot, now interrupt boot
process and enter RedBoot (bootloader) command line by pressing
Ctrl+C,
4. Enter following commands (replace variable accordingly),
set_mac (to view MAC addresses)
alias ethaddr <wan_port_mac_adress>
(confirm storing the value by inputting y and pressing Enter)
reset
5. Now board should restart and boot OpenWrt with proper MAC addresses.
Installation
1. Prepare TFTP server with OpenWrt initramfs image,
2. Connect to WAN ethernet port,
3. Connect to serial port,
4. Power on the board and enter RedBoot (bootloader) command line by
pressing Ctrl+C,
5. Enter following commands (replace variables accordingly):
set_mac (to view MAC addresses)
alias ethaddr <wan_port_mac_address>
(confirm storing the value by inputting y and pressing Enter)
ip_adress -l <board_ip_adress>/24 -h <tftp_server_ip_adress>
load -r -b 0x80060000 <openwrt_initramfs_image_name>
exec -c ""
6. Now board should boot OpenWrt initramfs image,
7. Download OpenWrt sysupgrade image to /tmp directory and flash it
with:
sysupgrade <openwrt_sysupgrade_image_name>
8. Wait few minutes, after the D2 LED will stop blinking, the board
is ready for configuration.
Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
In PR [1] introducing initial support for Ubiquiti RouterStation boards,
Mathias Kresin suggested to replace the combined sysupgrade image with
tarball generated by sysupgrade-tar.sh. This would simplify deployment
of sysupgrade as the kernel size (needed to update FIS partition) could
be simply calculated on the fly instead of reading value from combined
image header. Unfortunately this would break sysupgrade compatibility
between ar71xx image and ath79 image. Therefore this commit creates
migration path to use new sysuprade image, it adds code to accept both
of them at this moment. The plan is to keep it until new stable version
is released. Then the image recipe should be changed to new format and
compatibility code for old image removed.
1. https://github.com/openwrt/openwrt/pull/1237
Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
When upgrading from ar71xx target images to ath79 based ones, the
integrated wireless interface changes its sysfs path. Therefore the
previous enabled wireless interface will be disabled, which can cause
false complains about it not working. This commit adds hotplug event
which migrates to new path and will keep the wrireless interface
enabled after upgrade.
Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
Align the LEDs deffinition with MACH file present in ar71xx target which
has the correct LED functions and colors adescription.
Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
It is unused by default and upstream is trying to remove it as it has
negative effects when the driver is under load. Upstream explanation:
netpoll: avoid capture effects for NAPI drivers
As diagnosed by Song Liu, ndo_poll_controller() can
be very dangerous on loaded hosts, since the cpu
calling ndo_poll_controller() might steal all NAPI
contexts (for all RX/TX queues of the NIC).
This capture, showing one ksoftirqd eating all cycles
can last for unlimited amount of time, since one
cpu is generally not able to drain all the queues under load.
It seems that all networking drivers that do use NAPI
for their TX completions, should not provide a ndo_poll_controller() :
Most NAPI drivers have netpoll support already handled
in core networking stack, since netpoll_poll_dev(
uses poll_napi(dev) to iterate through registered
NAPI contexts for a device.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Reading and writing to and from flash storage is slowed down
enormously by some functions which use a block size of 1.
This patch reworks the extraction scripts to be much faster and
efficient by reading and writing in possibly one big block.
This is based on the initial commit a69e101 for ipq40xx by
Christian Lamparter <chunkeey@gmail.com>.
Speed comparison @ UBNT AC-Mesh (just manually) results
in a time reduction by three orders of magnitude (99.9 %).
> time dd if=/dev/mtd6 of=/lib/firmware/test-slow bs=1 count=4096 skip=4096
4096+0 records in
4096+0 records out
real 0m 16.84s
user 0m 0.07s
sys 0m 13.54s
> time dd if=/dev/mtd6 of=/lib/firmware/test-fast bs=4096 count=1 skip=4096 iflag=skip_bytes
1+0 records in
1+0 records out
real 0m 0.02s
user 0m 0.00s
sys 0m 0.02s
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Tested-by: Rosen Penev <rosenp@gmail.com>
EnGenius EPG5000 (v1.0.0, marketed as IoT Gateway) is a dual band
wireless router.
Specification
SoC: Qualcomm Atheros QCA9558
RAM: 256 MB DDR2
Flash: 16 MB SPI NOR
WIFI: 2.4 GHz 3T3R integrated
5 GHz 3T3R QCA9880 Mini PCIe card
Ethernet: 5x 10/100/1000 Mbps QCA8337N
USB: 1x 2.0
LEDS: 4x GPIO controlled
Buttons: 2x GPIO controlled
UART: 4 pin header, starting count from white triangle on PCB
1. VCC 3.3V, 2. GND, 3. TX, 4. RX
baud: 115200, parity: none, flow control: none
Installation
1. Connect to one of LAN (yellow) ethernet ports,
2. Open router configuration interface,
3. Go to Tools > Firmware,
4. Select OpenWrt factory image with dlf extension and hit Apply,
5. Wait few minutes, after the Power LED will stop blinking, the router
is ready for configuration.
Alternative installation
1. Prepare TFTP server with OpenWrt sysupgrade image,
2. Connect to one of LAN (yellow) ethernet ports,
3. Connect to UART port (leaving out VCC pin!),
4. Power on router,
5. When asked to enter a number 1 or 3 hit 2, this will select flashing
image from TFTP server option,
6. You'll be prompted to enter TFTP server ip (default is 192.168.99.8),
then router ip (default is 192.168.99.9) and for last, image name
downloaded from TFTP server (default is uImageESR1200_1750),
7. After providing all information U-Boot will start flashing the image,
You can observe progress on console, it'll take few minutes and when
the Power LED will stop blinking, router is ready for configuration.
Additional information
If connected to UART, when prompted for number on boot, one can enter
number 4 to open bootloader (U-Boot) command line.
OEM firmware shell password is: aigo3d0a0tdagr
useful for creating backup of original firmware.
When doing upgrade from OpenWrt ar71xx image, it is recomended to not keep
the old configuration.
Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
AR300M-Lite is single-Ethernet variant of the AR300M series
Its eth0 would otherwise be assigned to the WAN interface
making it unreachable firstboot or failsafe.
Installation instructions from OEM (OpenWrt variant):
* Install sysupgrade.bin using OEM's "Advanced" GUI (LuCI),
* Do not preserve settings
* Access rebooted device via Ethernet at OpenWrt default address
Add previously missing LED defaults for all three variants;
-nand, -nor, -lite to the definitions in 01_leds
Non-lite variants thanks to Andreas Ziegler
https://patchwork.ozlabs.org/patch/1049396/
Runtime-tested: GL.iNet AR300M-Lite
Signed-off-by: Jeff Kletsky <git-commits@allycomm.com>
Hardware
--------
SOC: QCA9558
RAM: 128M DDR2
Flash: 16MiB SPI-NOR
ETH: QCA8337N: 2x 10/100/1000 PoE and PoE pass-through
WiFi2: QCA9558 (bgn) 2T2R
WiFi5: 2x mPCIE with AR9582 (an) 2T2R
BTN: 1x Reset
GPIO: multiple GPIO on header, PoE passthrough enable
UART: 3.3V 115200 8N1 header on the board
WDG: ATTiny13 watchdog
JTAG: header on the board
USB: 1x connector and 1x header on the board
PoE: 10-32V input in ETH port 1, passthrough in port 2
mPCIE: 2x populated with radios (but replaceable)
OpenWrt is preinstalled from factory. To install use <your-image>-sysupgade.bin
using the web interface or with sysupgrade -n.
Flash from bootloader (in case failsafe does not work)
1. Connect the LibreRouter with a serial adapter (TTL voltage) to the UART
header in the board.
2. Connect an ETH cable and configure static ip addres 192.168.1.10/24
3. Turn on the device and stop the bootloader sending any key through the serial
interface.
4. Use a TFTP server to serve <your image>-sysupgrade.bin file.
5. Execute the following commands at the bootloader prompt:
ath> tftp 82000000 <your image>-sysupgrade.bin
ath> erase 0x9f050000 +$filesize
ath> cp.b 0x82000000 0x9f050000 $filesize
ath> bootm 0x9f050000
More docs
* Bootloader https://github.com/librerouterorg/u-boot
* Board details (schematics, gerbers): https://github.com/librerouterorg/board
Signed-off-by: Santiago Piccinini <spiccinini@altermundi.net>
TP-Link RE350K v1 (FCC ID: TE7RE350K) is a wall-plug AC1200 Wi-Fi range
extender with 'Kasa Smart' support. Device is based on Qualcomm/Atheros
QCA9558 + QCA9882 + AR8035 platform and is available only on US market.
Specification:
- 720/600/200 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 16 MB of flash (SPI NOR)
- 1x 1 Gbps Ethernet (AR8035)
- 2T2R 2.4 GHz (QCA9558), with ext. PA (SE2565T) and LNA (SKY65971-11)
- 2T2R 5 GHz (QCA9882), with ext. PA (SE5003L1-R) and LNA (SKY65981-11)
- 2x U.FL connector on PCB
- 2x dual-band PCB antennas
- 1x LED, 2x dual-color LED (all driven by GPIO)
- 3x button (app config, led, reset)
- 1x mechanical on/off slide switch
- 1x UART (4-pin, 2.54 mm pitch) header on PCB
- 1x JTAG (8-pin, 1.27 mm pitch) header on PCB
Flash instruction:
Use 'factory' image directly in vendor GUI (default IP: 192.168.0.254,
default credentials: admin/admin).
Warning:
This device does not include any kind of recovery mechanism in U-Boot.
Vendor firmware access:
You can access vendor firmware over serial (RX line requires jumper
resistor in R306 place, near XTAL) with: root/sohoadmin credentials.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
YunCore A770 is a ceiling AC750 AP with 2 Fast Ethernet ports, PoE
(802.3at) support, based on QCA9531 + QCA9887.
Specification:
- 650/597/216 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 16 MB of flash (SPI NOR)
- 2x 10/100 Mbps Ethernet (PoE 802.3at support in WAN port)
- 2T2R 2.4 GHz (QCA9531), with ext. PA and LNA
- 1T1R 5 GHz (QCA9887), with ext. FEM (SKY85728-11)
- 2x regular LED, 1x RGB LED (all driven by GPIO)
- 1x button (reset)
- DC jack for main power input (12 V)
- UART header on PCB
Flash instruction:
1. First, gain root access to the device, following below steps:
- Login into web gui (default password/IP: admin/192.168.188.253).
- Go to 'Advanced' -> 'Management' -> 'System' and download backup of
configuration (bakfile.bin).
- Open the file as tar.gz archive, edit/update 'shadow' file and change
hash of root password to something known.
- Repack the archive, rename it back to 'bakfile.bin' and use to
restore configuration of the device.
- After that, device will reboot and can be accessed over SSH.
2. Then, install OpenWrt:
- Login over SSH and issue command:
fw_setenv bootcmd "bootm 0x9f050000 || bootm 0x9fe80000"
- Upload 'sysupgrade' image and install it (only if previous command
succeeded) with command: 'sysupgrade -n -F openwrt-...'.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
CPU: AR9342 SoC
RAM: 64 MB DDR2
Flash: 8 MB NOR SPI
Ports: 2x100 MBit (24V PoE in, 24V PoE out), AR8236 switch
WLAN: 2.4/5 GHz
UART: 1 UART
LEDs: Power, 2x Ethernet, 4x RSSI LEDs (orange, red, 2x green)
Buttons: Reset
Flashing instructions using recovery method over TFTP
1. Unplug the ethernet cable from the router.
2. Using paper clip press and hold the router's reset button. Make sure
you can feel it depressed by the paper clip. Do not release the button
until step 4.
3. While keeping the reset button pressed in, plug the ethernet cable
back into the AP. Keep the reset button depressed until you see the
device's LEDs flashing in upgrade mode (alternating LED1/LED3 and
LED2/LED4), this may take up to 25 seconds.
4. You may release the reset button, now the device should be in TFTP
transfer mode.
5. Set a static IP on your Computer's NIC. A static IP of 192.168.1.25/24
should work.
6. Plug the PoE injector's LAN cable directly to your computer.
7. Start tftp client and issue following commands:
tftp> binary
tftp> connect 192.168.1.20
tftp> put openwrt-ath79-generic-ubnt-nano-m-xw-squashfs-factory.bin
Tested-by: Joe Ayers <ae6xe@arrl.net>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
While converting Nanostation M XW from current ar71xx code to ath79 I've
hit one issue, where the ethernet networking wasn't working, so I was
checking every bit in the networking setup path between ar71xx and
ath79.
I've came to the following code in ar71xx/mach-ubnt-xm.c:
static void __init ubnt_xw_init(void) {
...
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_MII_GMAC0 |
AR934X_ETH_CFG_MII_GMAC0_SLAVE);
...
}
Where this code is setting AR934X_ETH_CFG_MII_GMAC0_SLAVE bit in
AR934X_GMAC_REG_ETH_CFG register, but I couldn't find a way of setting
this bit from DTS, so this patch adds `mii-gmac0-slave` DTS property
which allows setting of this bit in `gmac-config`, which is then used in
Nanostation M XW DTS.
Tested-by: Joe Ayers <ae6xe@arrl.net>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
This allows resetting gmac registers during initialization.
Also add compatible string for qca955x mdio to enable more mdio
clock dividers.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
On ar933x and later chips, there are separated mac/mdio resets, but
resetting the entire gmac block with register values requires both
mac_reset and mdio_reset to be asserted together.
Add support for optional mdio reset so that we can do a full reset
if needed.
This patch also replaced deprecated devm_reset_control_get for
mac reset.
To use this feature, the following is needed:
1. drop "simple-mfd" compatible to register mdio0 after gmac init
so that mdio registers aren't reset after initialization.
2. move mdio reset from mdio-bus to its parent eth node.
NOTE: This can't be applied on gmac1 with builtin switch since we
haven't add a feature to defer probe if phy connection failed.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
remove the hacky checking of "simple-mfd" compatible
also add some comments explaining that piece of code.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
using the devm api makes the code simpler.
also drop unneeded memory free from ag71xx_remove since they are
allocated using devm apis.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
phy_modes() in phy.h can convert PHY modes to string with supports
for all available PHY modes.
Also add a space in mode printing to make it look better.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
This commit makes the TP-Link hardware-revision naming consistent to
match the one used by the vendor. TP-Link refers to the different
revisions as "vX" not "Version X".
Signed-off-by: David Bauer <mail@david-bauer.net>
Commit 34b10b46 made usb match with the corresponding usb label.
The problem is that v4 seems to use in stock firmware the
upper led for usb 1 and the lower led for usb 2.
The led assigned varies between TP-Link models and even
same model versions. For example, Archer C7 v1 and v2 have
the leds in the reverse order.
Revert 34b10b46 and swap led labels instead, now usb port
and led label match and also respect the original behavior.
Tested-by: Oldrich Jedlicka <oldium.pro@gmail.com>
Signed-off-by: David Santamaría Rogado <howl.nsp@gmail.com>
This is a simple copy of ipq40xx: speed up ath10k-caldata
extraction commit a69e101ed1
Tested on DIR-825-B1
3768+0 records in
3768+0 records out
real 0m 11.90s
user 0m 0.03s
sys 0m 9.94s
1+0 records in
1+0 records out
real 0m 0.03s
user 0m 0.00s
sys 0m 0.03s
With this change eeprom extraction is fast enough to get
working Wi-Fi after initial install.
Signed-off-by: Dmitry Tunin <hanipouspilot@gmail.com>
In the production of glinet, the MAC address of ethernet port is
only written at the position where the ART area offset address
is 0, and the MAC address of eth1 is added 1 on the basis of eth0.
Signed-off-by: Luo chongjun <luochongjun@gl-inet.com>
This patch adds support for the COMFAST CF-E120A v3, an outdoor wireless
CPE with two Ethernet ports and a 802.11an radio.
Specifications:
- AR9344 SoC
- 535/400/267 MHz (CPU/DDR/AHB)
- 2x 10/100 Mbps Ethernet, both with PoE-in support
- 64 MB of RAM (DDR2)
- 8 MB of FLASH
- 2T2R 5 GHz, up to 25 dBm
- 11 dBi built-in antenna
- POWER/LAN/WAN/WLAN green LEDs
- 4x RSSI LEDs (2x red, 2x green)
- UART (115200 8N1) and GPIO (J9) headers on PCB
Flashing instructions:
The original firmware is based on OpenWrt so a sysupgrade image can be
installed via the stock web GUI. Settings from the original firmware
will be saved and restored on the new one, so a factory reset will be
needed. To do so, once the new firmware is flashed, enter into failsafe
mode by pressing the reset button several times during the boot
process, while while the WAN LED flashes, until it starts flashing
faster. Once in failsafe mode, perform a factory reset as usual.
The U-boot bootloader contains a recovery HTTP server to upload the
firmware. Push the reset button while powering the device on and
keep it pressed for >10 seconds. The recovery page will be at
http://192.168.1.1
Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
The TP-Link WDR3600 shares the same machine-code in the ar71xx target,
thus expecting "tl-wdr4300" not "tl-wdr3600" in the support-list
metadata to allow non-forced sysupgrades from ar71xx to ath79.
With this, it is possible to flash a WDR4300 image on the WDR3600. It
is no problem however, as the only difference is the 5GHz WiFi chip
which has 3SS instead of 2SS. Both work with either image.
Signed-off-by: David Bauer <mail@david-bauer.net>
This adds the support-list entry the AVM FRITZ!Box 4020 expects in the
ar71xx target to allow non-forced sysupgrades from ar71xx to ath79.
Signed-off-by: David Bauer <mail@david-bauer.net>
According to /arch/mips/include/asm/mach-ath79/ar71xx_regs.h
the size of wmac register range for qca953x is only 0x20000.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
I-O DATA WN-AC1600DGR is a 2.4/5 GHz band 11ac router, based on
Qualcomm Atheros QCA9557.
Specification:
- SoC: Qualcomm Atheros QCA9557
- RAM: 128 MB
- Flash: 16 MB
- WLAN: 2.4/5 GHz
- 2.4 GHz: 2T2R (SoC internal)
- 5 GHz: 3T3R (QCA9880)
- Ethernet: 5x 10/100/1000 Mbps
- Switch: QCA8337N
- LED/key: 6x/6x(4x buttons, 1x slide switch)
- UART: through-hole on PCB
- Vcc, GND, TX, RX from ethernet port side
- 115200n8
Flash instruction using factory image:
1. Connect the computer to the LAN port of WN-AC1600DGR
2. Connect power cable to WN-AC1600DGR and turn on it
3. Access to "http://192.168.0.1/" and open firmware update page
("ファームウェア")
4. Select the OpenWrt factory image and click update ("更新") button
5. Wait ~150 seconds to complete flashing
Alternative flash instruction using initramfs image:
1. Prepare a computer and TFTP server software with the IP address
"192.168.99.8" and renamed OpenWrt initramfs image
"uImageWN-AC1600DGR"
2. Connect between WN-AC1600DGR and the computer with UART
3. Connect power cable to WN-AC1600DGR, press "4" on the serial
console and enter the U-Boot console
4. execute "tftpboot" command on the console and download initramfs
image from the TFTP server
5. execute "bootm" command and boot OpenWrt
6. On initramfs image, download the sysupgrade image to the device
and perform sysupgrade with it
7. Wait ~150 seconds to complete flashing
This commit also removes unnecessary "qca,no-eeprom" property from
the ath10k wifi node.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Tested with a dual pci QCA9558 board (LibreRouter v1) in three
configurations: enabling pcie0 only, pcie1 only and both enabled.
Signed-off-by: Santiago Piccinini <spiccinini@altermundi.net>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com> [removed ML notice]
Datasheet states that both PCI ranges are of 0x2000000 size:
0x1000_0000-0x11FF_FFF and 0x1200_0000-0x13FF_0000.
Signed-off-by: Santiago Piccinini <spiccinini@altermundi.net>
Reviewed-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com> [removed ML notice]
The switch ports are seen one to one on the case.
Also remove unneeded secondary port numbers in this
case statement.
Signed-off-by: Paul Wassi <p.wassi@gmx.at>
Change the ledtrig for LAN from netdev to switch.
Although eth1 comes out of the device at a single port,
this port is a switch-port and therefore the LED
must be triggered by that.
Signed-off-by: Paul Wassi <p.wassi@gmx.at>
Hardware
--------
CPU: Qualcomm Atheros QCA9561
RAM: 64M DDR2
FLASH: 16M SPI-NOR
ETH: 1x WAN - 2x LAN
WiFi: QCA9561 3T3R
BTN: 1x Reset - 1x WPS
LED: 1x Blue - 1x Red - 1x Yellow
UART: TX - GND - RX - VCC (From ethernet port)
115200n8 - 3.3V
Installation
------------
1. Connect to the device via UART.
2. Interrupt the U-Boot on power-on by pressing enter when prompted.
3. Connect you computer to one of the routers LAN ports.
Assign yourself the IP 192.168.31.10/24.
Copy the OpenWRT initramfs image to a tftp server root directory.
Rename the image to 'x4q.bin'.
4. Load the initramfs image to the router by executing following command
in U-Boot. The image will boot afterwards.
> tftpboot 0x81000000 x4q.bin; bootm
5. SCP the sysupgrade-image into '/tmp'.
Remember to assign yourself an IP in 192.168.1.0/24 for this step!
6. Install OpenWRT permanently by executing
> sysupgrade -n /tmp/<OpenWRT-sysupgrade-image>
Signed-off-by: David Bauer <mail@david-bauer.net>
On ath79 and UBNT Bullet M XW (ar9342) I was experiencing weird issues during
network setup[1] which I was able to reproduce easily with following commands:
uci set network.lan.ipaddr='192.168.1.20'
uci commit network
ifup lan
Which resulted after some time in:
...
WARNING: CPU: 0 PID: 0 at net/sched/sch_generic.c:461 dev_watchdog+0x16c/0x280
NETDEV WATCHDOG: eth0 (ag71xx): transmit queue 0 timed out
...
Sometimes I wasn't able to use networking anymore, sometimes it was enough to
just ifdown/ifup lan and network was backup. On ar71xx it was all working just
fine.
I've found out, that it was happening because ag71xx_poll() wasn't called, thus
the TX queue wasn't emptied. The ag71xx_poll() is being called from napi
hrtimer, which is enabled by napi_schedule() in ar71xx_interrupt(), but since
no interrupts were ever fired again after ag71xx_stop() was called, it was
always leading to tx queue timeouts:
*** ag71xx_hard_start_xmit()
eth0: packet injected into TX queue
eth0: raw intr=00000001 TXPS POLL
eth0: enable polling mode
eth0: processing TX ring, flush=no
eth0: disable polling mode, rx=1, tx=1,limit=32
( `ifup lan done here` )
*** ag71xx_stop()
*** ag71xx_open()
*** ag71xx_hw_enable()
IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
*** ag71xx_hard_start_xmit()
eth0: packet injected into TX queue
*** ag71xx_hard_start_xmit()
eth0: packet injected into TX queue
...
WARNING: CPU: 0 PID: 0 at net/sched/sch_generic.c:320 dev_watchdog+0x164/0x274
So I've looked at ag71xx_stop() in ar71xx, added the missing bits to ath79 and
fixed this issue.
1. https://github.com/openwrt/openwrt/pull/1635#issuecomment-448638246
Signed-off-by: Petr Štetiar <ynezz@true.cz>
[move ag->link before ag71xx_hw_disable to retain ordering as original]
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
TP-Link Archer C7 v4 is a dual-band AC1750 router, based on the
Qualcomm/Atheros QCA9561 SoC + QCA9880.
Specification:
- 775/650/258 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 16 MB of FLASH (SPI NOR)
- 3T3R 2.4 GHz
- 3T3R 5 GHz
- 5x 10/100/1000 Mbps Ethernet
- 7x LED, 2x button
- UART header on PCB
Flash instruction:
1. Upload openwrt-ath79-generic-tplink_archer-c7-v4-squashfs-factory.bin
via Web interface
Flash instruction using TFTP recovery:
1. Set PC to fixed ip address 192.168.0.66
2. Download openwrt-ath79-generic-tplink_archer-c7-v4-squashfs-factory.bin
and rename it to ArcherC7v4_tp_recovery.bin
3. Start a tftp server with the file tp_recovery.bin in its root directory
4. Turn off the router
5. Press and hold Reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time
the firmware should be transferred from the tftp server
8. Wait ~30 second to complete recovery.
Signed-off-by: Oldřich Jedlička <oldium.pro@gmail.com>
Hardware
--------
CPU: Qualcomm Atheros QCA9558
RAM: 128M DDR2
FLASH: 16MiB
ETH: 1x Atheros AR8035 (PoE in)
1x Atheros AR8033
WiFi2: QCA9558 3T3R (SiGE SE2565T 2.4 GHz power amp x3)
WiFi5: QCA9880 3T3R (Skyworks 5003L1 5 GHz power amp x3)
BTN: 1x Reset
1x WPS
1x USB eject
LED: 1x LED blue
1x LED red
BEEP: 1x GPIO attached piezo beeper
UART: 3.3V GND TX RX (115200-N-8) (3.3V is pin closest to rear ports)
Dupont 4 pin header
Rear RJ45 serial port non-functional
USB: 1x v2.0
Installation
------------
Make sure you set a password for the root user as prompted on first
setup!
1. Upload OpenWRT sysupgrade image via SSH to the device.
Use /tmp as the destination folder on the device.
User is root, password previously set in the web interface.
2. Install OpenWRT with
> sysupgrade -n -F /tmp/<openwrt-image-name>
Signed-off-by: Django Armstrong <iamdjango@hotmail.com>
Change the "status" LED to proper GPIO 12 and "red" naming.
Remove GPIO 2 from definition as a USB LED.
GPIO 2 is used to control power to the USB socket, not an LED.
As such, PWM on the line or typical LED triggers are inappropriate.
Users who wish to control the USB power for custom applications
can manipulate the GPIO through code, or for example, export it
through /sys/class/gpio/export.
Runtime-tested: GL.iNet AR300M-Lite
Signed-off-by: Jeff Kletsky <git-commits@allycomm.com>
LAN ports 1 and 4 and 2 and 3 are interchanged. Fix this in 02_network
so the ports show up in the correct order in luci.
The correct ucidef_add_switch line is already present. This commit moves
the blocks around to keep alphabetical order.
Signed-off-by: Sebastian Kemper <sebastian_ml@gmx.net>
The swconfig load operation always triggers 'apply' function which in
this driver currently clears port mirroring flags effectively undoing
port mirroring configuration.
Signed-off-by: Milan Krstic <milan.krstic@gmail.com>
Hardware
--------
CPU: Qualcomm Atheros QCA9558
RAM: 128M DDR2
FLASH: 16MiB
ETH: 1x Atheros AR8035 (PoE in)
WiFi2: QCA9558 2T2R
WiFi5: QCA9880 2T2R
BTN: 1x Reset
LED: 1x LED blue
1x LED red
BEEP: 1x GPIO attached piezo beeper
UART: 3.3V GND TX RX (115200-N-8) (3.3V is square pad)
Header is located next to reset-button
Installation
------------
Make sure you set a password for the root user as prompted on first
setup!
1. Upload OpenWRT sysupgrade image via SSH to the device.
Use /tmp as the destination folder on the device.
User is root, password the one set in the web interface.
2. Install OpenWRT with
> sysupgrade -n -F /tmp/<openwrt-image-name>
Signed-off-by: David Bauer <mail@david-bauer.net>
Hardware
--------
CPU: Qualcomm Atheros QCA9558
RAM: 128M DDR2
FLASH: 16MiB
ETH: 1x Atheros AR8035 (PoE in)
WiFi2: QCA9558 3T3R
WiFi5: QCA9880 3T3R
BTN: 1x Reset
LED: 1x LED blue
1x LED red
BEEP: 1x GPIO attached piezo beeper
UART: 3.3V GND TX RX (115200-N-8) (3.3V is square pad)
Header is located next to reset-button
Installation
------------
Make sure you set a password for the root user as prompted on first
setup!
1. Upload OpenWRT sysupgrade image via SSH to the device.
Use /tmp as the destination folder on the device.
User is root, password the one set in the web interface.
2. Install OpenWRT with
> sysupgrade -n -F /tmp/<openwrt-image-name>
Signed-off-by: David Bauer <mail@david-bauer.net>
Replace the code with a more readable version. Rename the recipe
to reflect the real usecase.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Signed-off-by: Mathias Kresin <dev@kresin.me>
The 'factory' partition will move to 0x50000-0x60000 in 2019. As
the webserver in bootloader is compatible with different mtdlayout,
all the users still can upgrade firmware whatever on ath79 or ar71xx.
Signed-off-by: Rosy Song <rosysong@rosinson.com>
This patch adds support for the COMFAST CF-E110N, an outdoor wireless
CPE with two Ethernet ports and a 802.11bgn radio.
Specifications:
- 650/400/216 MHz (CPU/DDR/AHB)
- 2x 10/100 Mbps Ethernet, both with PoE-in support
- 64 MB of RAM (DDR2)
- 16 MB of FLASH
- 2T2R 2.4 GHz, up to 26 dBm
- 11 dBi built-in antenna
- POWER/LAN/WAN/WLAN green LEDs
- 4x RSSI LEDs (2x red, 2x green)
- UART (115200 8N1) and GPIO (J9) headers on PCB
Flashing instructions:
The original firmware is based on OpenWrt so a sysupgrade image can be
installed via the stock web GUI. Settings from the original firmware
will be saved and restored on the new want, so a factory reset will be
needed: once the new firmware is flashed, perform the factory reset by
pushing the reset button several times during the boot process, while the
WAN LED flashes, until it starts flashing quicker.
The U-boot bootloader contains a recovery HTTP server to upload the
firmware. Push the reset button while powering the device on and keep it
pressed for >10 seconds. The recovery page will be at http://192.168.1.1
Notes:
The device is advertised, sold and labeled as "CF-E110N", but the
bootloader and the stock firmware identify it as "v2".
Acknowledgments:
Petr Štetiar <ynezz@true.cz>
Sebastian Kemper <sebastian_ml@gmx.net>
Chuanhong Guo <gch981213@gmail.com>
Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
[drop unused labels from devicetree source file]
Signed-off-by: Mathias Kresin <dev@kresin.me>
This patch adds support for TP-Link Archer C6 v2 (EU)
Hardware specification:
- SOC: Qualcomm QCA9563 @ 775MHz
- Flash: GigaDevice GD25Q64CSIG (8MiB)
- RAM: Zentel A3R1GE40JBF (128 MiB DDR2)
- Ethernet: Qualcomm QCA8337N: 4x 1Gbps LAN + 1x 1Gbps WAN
- Wireless:
- 2.4GHz (bgn) QCA9563 integrated (3x3)
- 5GHz (ac) Qualcomm QCA9886 (2x2)
- Button: 1x power, 1x reset, 1x wps
- LED: 6x LEDs: power, wlan2g, wlan5g, lan, wan, wps
- UART: There's no UART header on the board
Flash instructions:
Upload
openwrt-ath79-generic-tplink_archer-c6-v2-squashfs-factory.bin
via the router Web interface.
Flash instruction using tftp recovery:
1. Connect the computer to one of the LAN ports of the router
2. Set the computer IP to 192.168.0.66
3. Start a tftp server with the OpenWrt factory image in the
tftp root directory renamed to ArcherC6v2_tp_recovery.bin.
4. Connect power cable to router, press and hold the reset
button and turn the router on
5. Keep the reset button pressed until the WPS LED lights up
6. Wait ~150 seconds to complete flashing
According to the GPL source the non-EU variant has different
GPIOs assigned to some of the LEDs and buttons. The flash
layout might be different as well. The wikidevi entry for
Archer A6/C6 assumes they are identical.
Signed-off-by: Georgi Vlaev <georgi.vlaev@gmail.com>
EnGenius EWS511AP is a wireless managed wall AP with PoE support,
based on Qualcomm/Atheros QCA9531(Honeybee) + QCA9887.
Short specification:
- 128MB of RAM
- 16 MB of SPI FLASH
- 2T2R 2.4 GHz (QCA9531), 802.11b/g/n
- 1T1R 5 GHz (QCA9887), 802.11ac/n/a
- 2x 10/100 Mbps Ethernet (one port with PoE support)
- 1x Power LED, 2x LAN LEDs, 1x WLAN 2.4G LED, 1x WLAN 5G LED
- 1x RESET button
- built-in watchdog chipset
Flash instruction:
From EnGenius firmware to OpenWrt firmware:
Original firmware is based on QSDK.
Use sysupgrade firmware directly in vendor GUI.
Reset to factory default is necessary.
From OpenWrt firmware to EnGenius firmware:
1. Setup a TFTP server on your computer and configure static IP to 192.168.99.8
Put the OpenWrt firmware in the root directory on your computer.
2. Power up EWS511AP. Press 4 and then press any key to enter u-boot.
3. Download OpenWrt firmware
(ath)> tftpboot 0x80060000 ${dir}"openwrt-ath79-generic-engenius_ews511ap-squashfs-sysupgrade.bin"
4. Flash the firmware
(ath)> erase 0x9f060000 +f50000
(ath)> cp.b $fileaddr 0x9f060000 $filesize
5. Reboot
(ath)> reset
Signed-off-by: Guan-Hong Lin <GH.Lin@senao.com>
This device is called GL-AR300M, therefore rename the board(s)
to 'gl-ar300m-nor' and 'gl-ar300m-nand'
Signed-off-by: Paul Wassi <p.wassi@gmx.at>
[change boardname in uboot envtools as well, don't use wildcards for
boardname]
Signed-off-by: Mathias Kresin <dev@kresin.me>
CPU: Atheros AR9341 535MHz
RAM: 32MB
FLASH: 4MiB
PORTS: 4 Port 100/10 Switch, 1 Port 100/10 Wan
WiFi: Atheros AR9341 2x2:2 bgn
LED: Power (static on), LAN (controlled by Switch), WAN, SYS, WiFi, RFKill
BTN: WPS, WiFi, Reset
Installation:
Upload the factory image via the vendor-GUI.
Signed-off-by: Antonio Silverio <menion@gmail.com>
[resolve merge conflicts, squash commits, fix commit title, remove
default default off led properties, mark sysupgrade image compatible
with the ar71xx version of the board, drop blank lines from dts]
Signed-off-by: Mathias Kresin <dev@kresin.me>
With this commit the TP-Link Archer C58 and Archer C59 use caldata
patching in order to set the correct 5GHz MAC-address.
Tested on TP-Link Archer C59 v1.
For more details see commit 330965b.
Signed-off-by: David Bauer <mail@david-bauer.net>
Right now this patch adds nor image generation only. NAND image
generation is not supportet at the moment.
Furtheremore support for the MicroSD port is not implemented as of now.
Specification:
- SOC: QCA9563 (775MHz)
- Flash: 16 MiB (W25Q128FVSG)
- RAM: 128 MiB DDR2
- Ethernet: 2x 1Gbps LAN + 1x 1Gbps WAN
- Wireless: 2.4GHz (bgn) and 5GHz (ac)
- USB: 1x USB 2.0 port
- Button: 1x switch button, 1x reset button
- LED: 3x LEDS (green)
- Another LED can be accessed on GPIO 7 if soldered
Flash instruction:
- Set static ip to 192.168.1.2
- Unplug the power cord
- Hold reset button
- Plug power back in
- Right led will flash 5 times
- Release reset button
- Browse to 192.168.1.1
- Choose sysupgrade image in NOR-flash section
- Press "update nor firmware"
- After successful transfer unplug network cable before device restarts
Signed-off-by: Christoph Krapp <achterin@googlemail.com>
[resolve merge conflicts, rename buttons, use switch input type for mode
switch]
Signed-off-by: Mathias Kresin <dev@kresin.me>
The OCEDO Koala has incorrect PLL settings which result in ~3% packet
loss on ethernet connections.
Also omit the gmac-configuration as it's incorrect too.
Signed-off-by: David Bauer <mail@david-bauer.net>
Hardware spec of DIR-859 A1:
SoC: QCA9563
DRAM: 64MB DDR2
Flash: 16MB SPI-NOR
Switch: QCA8337N
WiFi 5.8GHz: QCA9880
USB is supported on the PCB but not connected.
Flash instructions:
1. Upgrade the factory.bin through the factory web interface or the u-boot
failsafe interface.
The firmware will boot up correctly for the first time.
Do not power off the device after OpenWrt has booted. Otherwise the u-boot
will enter failsafe mode as the checksum of the firmware has been changed.
2. Upgrade the sysupgrade.bin in OpenWrt.
After upgrading completes the u-boot won't complain about the firmware
checksum and it's OK to use now.
3. If you powered off the device before upgrading the sysupgrade.bin, just
upgrade the factory.bin through the u-boot failsafe interface and then goto
step 2.
Signed-off-by: Weijie Gao <hackpascal@gmail.com>
[squash commits, use common seama recipes, sync factory image recipe
with ramips version]
Signed-off-by: Mathias Kresin <dev@kresin.me>
Fix the switch port order to have the correct order in LuCI.
Fixes: FS#1469
Signed-off-by: Eduardo Barros <geadas@gmail.com>
[trim commit title, add a proper commit message, add fixes tag, keep
alphabetical order of the blocks]
Signed-off-by: Mathias Kresin <dev@kresin.me>
Currently all Archer A7 v5 have the same (incorrect) MAC address.
The address is currently derived from eth1 which is not present on the
QCA9563. Use eth0 to get the correct MAC address.
Signed-off-by: David Bauer <mail@david-bauer.net>
It's same for Bullet and Nanostation so far, so let's hope it's going to
be the same for other boards sharing the same platform.
Signed-off-by: Petr Štetiar <ynezz@true.cz>
It's not necessary as it's already defined in ar934x.dtsi to:
pll-data = <0x16000000 0x00000101 0x00001616>;
And in ar71xx it's currently set to the same values:
#define AR934X_PLL_VAL_1000 0x16000000
#define AR934X_PLL_VAL_100 0x00000101
#define AR934X_PLL_VAL_10 0x00001616
And dumping the value from the airOS v6.1.7 has the same value:
AR934X_PLL_ETH_XMII_CONTROL_REG 0x1805002C 0x101
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Currently there is no LED signalization for various system states
implemented in diag.sh, so this patch adds support for it.
Tested-by: Joe Ayers <ae6xe@arrl.net>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Hardware
--------
CPU: Qualcomm Atheros QCA9558
RAM: 128M DDR2
FLASH: 16MiB
ETH: 1x Atheros AR8035 (PoE in)
WiFi2: QCA9558 3T3R
WiFi5: QCA9880 3T3R
BTN: 1x Reset
LED: 1x LED blue
1x LED red
BEEP: 1x GPIO attached piezo beeper
UART: 3.3V GND TX RX (115200-N-8) (3.3V is square pad)
Header is located next to reset-button
There is also a Micro-B USB-port present but this only seems to be a
dummy as the circuit next to it is not present (at least in my unit).
It is also not mentioned in the devolo manual.
Installation
------------
Make sure you set a password for the root user as prompted on first
setup!
1. Upload OpenWRT sysupgrade image via SSH to the device.
Use /tmp as the destination folder on the device.
User is root, password the one set in the web interface.
2. Install OpenWRT with
> sysupgrade -n -F /tmp/<openwrt-image-name>
Signed-off-by: David Bauer <mail@david-bauer.net>
Hardware
--------
CPU: Qualcomm Atheros QCA9558
RAM: 128M DDR2
FLASH: 16MiB
ETH: 1x Atheros AR8035 (PoE in)
1x Atheros AR8033
WiFi2: QCA9558 2T2R
WiFi5: QCA9880 2T2R
BTN: 1x Reset
LED: 1x LED blue
1x LED red
BEEP: 1x GPIO attached piezo beeper
UART: 3.3V GND TX RX (115200-N-8) (3.3V is square pad)
Header is located next to reset-button
Installation
------------
Make sure you set a password for the root user as prompted on first
setup!
1. Upload OpenWRT sysupgrade image via SSH to the device.
Use /tmp as the destination folder on the device.
User is root, password the one set in the web interface.
2. Install OpenWRT with
> sysupgrade -n -F /tmp/<openwrt-image-name>
Signed-off-by: David Bauer <mail@david-bauer.net>
This commit adds support for TP-Link Archer C7 v5, leveraging most effort
from commit ea9baee and 1e4ee63. Archer C7 v5 is identical to Archer A7 v5
but with a different flash layout.
Specification:
- QCA9563 SoC (750 MHz)
- 128 MiB of RAM (DDR2)
- 16 MiB of flash (SPI)
- 5x 1 Gbps Ethernet (1x WAN + 4x LAN)
- 2.4GHz (bgn) SoC internal + 5GHz (ac) QCA9880
- 10x LED, 2x button
- UART header on PCB
Flash instructions:
1. Upload openwrt-ath79-generic-tplink_archer-c7-v5-squashfs-factory.bin
via web interface.
Flash instructions using TFTP recovery:
1. Plug PC to one of the LAN ports
2. Set PC to fixed IP address 192.168.0.66
3. Rename the factory image to ArcherC7v5_tp_recovery.bin and place it in
TFTP root directory
4. Turn on the router with the reset button pressed for about 15 secs
5. Release the button and wait about 150 secs to complete flashing
Signed-off-by: TOCK Chiu <tock.chiu@gmail.com>
The range of pinmux reg property "<0x1804002c 0x40>" for QCA955x
SoC does not includes GPIO_FUNCTION register.
Reported-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
NEC Aterm WG800HP is a 2.4/5 GHz band 11ac router, based on Qualcomm
Atheros QCA9563.
Specification:
- Qualcomm Atheros QCA9563
- 64 MB of RAM (DDR2)
- 8 MB of Flash (SPI-NOR)
- 2.4/5 GHz wifi
- 2.4 GHz: 2T2R (SoC internal)
- 5 GHz: 1T1R (QCA9887)
- 4x 10/100/1000 Mbps Ethernet
- 8x LEDs, 3x keys (2x buttons, 1x slide-switch)
- UART through-hole on PCB (J2)
- Vcc, GND, NC, TX, RX from SoC side
- 115200n8
Flash instruction using factory image:
1. Connect the computer to the LAN port on WG800HP
2. Connect power cable to WG800HP and turn on it
3. Access to "http://192.168.10.1/" and open firmware update page
("ファームウェア更新")
4. Select the OpenWrt factory image and click update ("更新") button
5. Wait ~150 seconds to complete flashing
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
The range of pinmux reg property "<0x1804002c 0x40>" for QCA956x SoC
does not includes GPIO_FUNCTION register.
If the device uses "&jtag_disable_pins", this causes the following
errors:
[ 1.982937] pinctrl-single 1804002c.pinmux: mux offset out of range: 0x40 (0x40)
[ 1.990622] pinctrl-single 1804002c.pinmux: could not add functions for pinmux_jtag_disable_pins 64x
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Use pad-offset and append-string to create the cameo factory images for
the D-LINK DIR-825 C1/DIR-835 A1 factory images.
Tested-by: Sebastian Kemper <sebastian_ml@gmx.net>
Signed-off-by: Mathias Kresin <dev@kresin.me>
Since commit 61b5b4971e ("mac80211: make ath10k-ct the default ath10k")
select ath10k-ct and the -ct firmwares by default.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
>From the Documentation/devicetree/bindings/leds/common.txt:
- default-state : The initial state of the LED. Valid values are "on", "off",
and "keep". If the LED is already on or off and the default-state property is
set the to same value, then no glitch should be produced where the LED
momentarily turns off (or on). The "keep" setting will keep the LED at
whatever its current state is, without producing a glitch. The default is
off if this property is not present.
So setting the default-state of the LEDs to `off` is redundant as `off`
is default LED state anyway. We should remove it as almost every new
PR/patch submission contains this property by default which seems to be
just copy&paste from some DTS file already present in the tree.
Signed-off-by: Petr Štetiar <ynezz@true.cz>
This patch adds support for TP-Link Archer A7
Specification:
- SOC: QCA9563
- Flash: 16 MiB (SPI)
- RAM: 128 MiB (DDR2)
- Ethernet: 4x 1Gbps LAN + 1x 1Gbps WAN
- Wireless:
- 2.4GHz (bgn) SoC internal
- 5GHz (ac) QCA988x
- USB: 1x USB 2.0 port
- Button: 1x power, 1x reset, 1x wps
- LED: 10x LEDs
- UART: holes in PCB
- Vcc, GND, RX, TX from ethernet port side
- 115200n8
Flash instructions:
Upload openwrt-ath79-generic-tplink_archer-a7-v5-squashfs-factory.bin
via the Webinterface.
Flash instruction using tftp recovery:
1. Connect the computer to one of the LAN ports of the Archer A7
2. Set the computer IP to 192.168.0.66
3. Start a tftp server with the OpenWrt factory image in the tftp
root directory renamed to ArcherC7v5_tp_recovery.bin
2. Connect power cable to Archer A7, press and hold the reset button
and turn the router on
3. Keep the reset button pressed for ~5 seconds
4. Wait ~150 seconds to complete flashing
Changes since first revision:
- Flash instructions using stock image webinterface
- Changed "Version 5" in model string to "v5"
- Split DTS file in qca9563_tplink_archer-x7-v5.dtsi
and qca9563_tplink_archer-a7-v5.dts
- Firmware image is now build with dynamic partitioning
- Default to ath10k-ct
Changes since second revision:
- Changed uboot@0 to uboot@20000 in DTS file
- Fixed ordering issue in board led script
- Specify firmware partition format in DTS file
- Rebased Makefile device definition on common
Device/tplink-safeloader-uimage definition
- Merged switch section in network script
(same configuration as tplink,tl-wdr3600
and tplink,tl-wdr4300)
Signed-off-by: Karl-Felix Glatzer <karl.glatzer@gmx.de>
This patch fixes wrong usage of debounce-interval subnode property of
gpio-keys-polled nodes, which was used inproperly in parent node, but it
belongs to the subnodes, excerpt from the docs:
Optional subnode-properties:
- debounce-interval: Debouncing interval time in milliseconds.
If not specified defaults to 5.
And the docs are up to date as the source code matches that description
as well:
if (fwnode_property_read_u32(child, "debounce-interval",
&button->debounce_interval))
button->debounce_interval = 5;
While at it, I've also re-formatted gpio-keys-polled nodes, usually just
adding new lines after every key subnode.
Cc: Tomasz Maciej Nowak <tomek_n@o2.pl>
Cc: Matt Merhar <mattmerhar@protonmail.com>
Cc: Jonas Gorski <jonas.gorski@gmail.com>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
