Convert qca807x PHY to new implementation like for other devices.
Signed-off-by: Paweł Owoc <frut3k7@gmail.com>
Reviewed-by: Robert Marko <robimarko@gmail.com>
Now that Malibu (QCA807x) PHY is using the upstream driver, we dont need
support to define address of the first PHY in package, so remove the
malibu_first_phy_addr DTS property.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Xiaomi AX9000 apply a special PHY LEDs configuration where the unique
green LED for each qca807x PHY port is turned on also on 1000Mbps link.
Apply this special configuration to reflect original implementation.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Xiaomi AX3600 apply a special PHY LEDs configuration where the unique
green LED for each qca807x PHY port is turned on also on 1000Mbps link.
Apply this special configuration to reflect original implementation.
Also enable CONFIG_PHYLIB_LEDS to actually expose the PHY LEDs if
defined in DT.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Convert every qca807x PHY definition in DT to new PHY package
implementation to correctly support applying fixup for the correct PHY
mode.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Port 0-4 have the mode set to SGMII instead of PSGMII. Now that we use
the upstream qca807x driver, this conflicts with the qca SSDK driver
that expects the mode to be PSGMII as for not integrated driver, it does
refer to the real PHY mode.
Update the entry for port 0-4 to PSGMII to solve warning from qca SSDK
in ipq8074-ess.dtsi.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
IPQ807x have integrated qca8074 PHY supported by the upstream qca807x driver.
Enable it to use it instead of the downstream qca SSDK variant.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Commit d737ae99cb ("qualcommax: Fix Buffalo WXR-5950AX12 Ethernet
DTS") reverted the switch bmp to the original OEM definition and
added the malibu_first_phy_addr property.
Problem is that OEM bmp definition is wrong and actually doesn't make sense,
probably caused by copy-paste of the QCOM reference DTS without actually
setting real values. What actually fixed the regression was adding the
malibu_first_phy_addr as without it the MALIBU PHY was actually not
correctly configured and the Aquantia PHY were actually configured as
MALIBU PHY.
Fix all these wrong PHY definition.
The BPM is reverted and the following fixes are applied:
- Drop ESS_PORT1 as it's not actually attached in HW.
- Move ESS_PORT5 AGAIN from lan to wan. This refer to the first Aquantia
PHY that is labelled "wan"
- Move ESS_PORT6 AGAIN from wan to lan. This refer to the second
Aquantia PHY that is labelled "lan1".
Also PHY tag in MDIO node are renumbered to start from 0 following the
tagging standard used also in other dts and the not attached one (reg
0x18 and reg 0x1c) are correctly dropped.
Definition for port@1 in phyinfo is dropped as it doesn't exist.
dp nodes are updated to reference the new PHY tag numbering.
Fixes: d737ae99cb ("qualcommax: Fix Buffalo WXR-5950AX12 Ethernet DTS")
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Refresh kernel patches changed from the just introduced ipq60xx new
subtarget.
Patch automatically refreshed with make target/linux/refresh.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
These recipes are generic and will be used for other subtargets, so lets
move them to the target Makefile so they can reused.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Introduce support for the Qualcomm IPQ60xx SoC. WiFi support still has
to be handled and correctly fix hence this is currently marked as
source-only to have a solid base to progress on correct support of this
and hope Upstream QUIC publish newers ath11k drivers for this SoC.
Co-developed-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Mantas Pucka <mantas@8devices.com>
[ improve commit description, add SoB for Robert, make it source-only ]
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Initial conversion to new LED color/function format
and drop label format where possible. The same label
is composed at runtime.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Drop redundant label with new LED color/function format declared.
This was needed previously when the new format wasn't supported by
leds.sh functions script. Now that is supported this property
can be removed in favor of the new format.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
CONFIG_PHYLIB_LEDS is required in order for phylib to probe the DT for LEDs
attached to PHY-s.
Fixes: 75ad5c2 ("qualcommax: switch to qca8081 upstream PHY driver")
Signed-off-by: Robert Marko <robimarko@gmail.com>
The qca8081 phy needs to set the reset delay time,
otherwise it will not be detected by the mdio bus.
Fixes: 75ad5c2 ("qualcommax: switch to qca8081 upstream PHY driver")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Switch to qca8081 upstream PHY. Update every device that have LEDs
attached to the qca8081 PHY to follow new way of defining the LEDs and
add original OEM configuration.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
In order to get rid of having to modify U-boot bootcmd and having U-boot
load the Aquantia PHY-s firmware lets use some of the free space on SPI-NOR
to add a second ethphyfw partition and be able to load AQR FW via NVMEM
cells.
Signed-off-by: Robert Marko <robimarko@gmail.com>
It seems that the reset GPIO-s defined for the two AQR PHY-s are actually
reversed.
Manually testing confirmed that GPIO44 is actually reset GPIO of AQR at 0,
while GPIO59 is reset of AQR at 8:
root@OpenWrt:~# mdio 9*
DEV PHY-ID LINK
0x00 0x00000000 down
0x08 0x00000000 down
0x10 0x004dd0b1 down
0x11 0x004dd0b1 down
0x12 0x004dd0b1 down
0x13 0x004dd0b1 up
0x14 0x004dd0b1 down
0x15 0x04820a05 down
root@OpenWrt:~# gpioset gpiochip0 44=0
root@OpenWrt:~# mdio 9*
DEV PHY-ID LINK
0x08 0x00000000 down
0x10 0x004dd0b1 down
0x11 0x004dd0b1 down
0x12 0x004dd0b1 down
0x13 0x004dd0b1 up
0x14 0x004dd0b1 down
0x15 0x04820a05 down
root@OpenWrt:~# gpioset gpiochip0 44=1
root@OpenWrt:~# mdio 9*
DEV PHY-ID LINK
0x00 0x00000000 down
0x08 0x00000000 down
0x10 0x004dd0b1 down
0x11 0x004dd0b1 down
0x12 0x004dd0b1 down
0x13 0x004dd0b1 up
0x14 0x004dd0b1 down
0x15 0x04820a05 down
root@OpenWrt:~# gpioset gpiochip0 59=0
root@OpenWrt:~# mdio 9*
DEV PHY-ID LINK
0x00 0x00000000 down
0x10 0x004dd0b1 down
0x11 0x004dd0b1 down
0x12 0x004dd0b1 down
0x13 0x004dd0b1 up
0x14 0x004dd0b1 down
0x15 0x04820a05 down
root@OpenWrt:~# gpioset gpiochip0 59=1
root@OpenWrt:~# mdio 9*
DEV PHY-ID LINK
0x00 0x00000000 down
0x08 0x00000000 down
0x10 0x004dd0b1 down
0x11 0x004dd0b1 down
0x12 0x004dd0b1 down
0x13 0x004dd0b1 up
0x14 0x004dd0b1 down
0x15 0x04820a05 down
Signed-off-by: Robert Marko <robimarko@gmail.com>
Now that we have support for firmware loading via the kernel driver, it
makes sense to populate the firmware name as well, so if its present the
driver can load it.
In later patches, loading the FW via NVMEM will be added as well.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add support for loading Aquantia FW from NVMEM for Zyxel NBG7815
restoring correct functionality of the 10g port.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
By default Linux will default to most IRQ-s being mapped to core 0 which
during high loads will completely swamp the core 0, so lets add the widely
used script that has been floating around forums for a long time to try and
optimize the IRQ mapping a bit.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Enable LED driver LP5562 on HAZE device tree and include its kernel
module package on default package for HAZE.
Signed-off-by: CheWei Chien <chewei.chien@wnc.com.tw>
Some devices (MX42CF) have a wrong MAC address configuration. The correct one is located only on the devinfo partition.
Signed-off-by: Paweł Owoc <frut3k7@gmail.com>
Currently, WiFi interfaces on WXR-5950AX12 / WXR-6000AX12 devices
come up with some MAC addresses inconsistent with vendor and Ethernet
addresses. This adds a hotplug override in order to make it consistent
with what is in u-boot env as well as OAM firmware where 1st radio MAC
is set at Ethernet MAC + 8, and 2nd radio mac at Ethernet MAC + 16.
fw_printenv | grep addr
ethaddr=68:e1:dc:xx:xx:d8
ipaddr=192.168.11.1
wlan0addr=68:e1:dc:xx:xx:e0
wlan1addr=68:e1:dc:xx:xx:e8
wlan2addr=00:00:00:00:00:00
For OEM bootlog and MAC assagnment check
https://openwrt.org/toh/buffalo/wxr-5950ax12#openwrt_uimage_tftp_bootlog
Tested-by: Samir Ibradžić <sibradzic@gmail.com> # Buffalo WXR-6000AX12P
Signed-off-by: Samir Ibradžić <sibradzic@gmail.com>
Linksys MX4200 is a 802.11ax Tri-band router/AP.
Specifications:
* CPU: Qualcomm IPQ8174 Quad core Cortex-A53 1.4GHz
* RAM: 512MB of DDR3
* Storage: 512Mb NAND
* Ethernet: 4x1G RJ45 ports (QCA8075)
* WLAN:
* 2.4GHz: Qualcomm QCN5024 2x2 802.11b/g/n/ax 574 Mbps PHY rate
* 5GHz: Qualcomm QCN5054 2x2@80MHz or 2x2@160MHz 802.11a/b/g/n/ac/ax 2402 PHY rate
* 5GHz: Qualcomm QCN5054 4x4@80MHz or 2x2@160MHz 802.11a/b/g/n/ac/ax 2402 PHY rate
* LED-s:
* RGB system led
* Buttons: 1x Soft reset 1x WPS
* Power: 12V DC Jack
Installation instructions:
Open Linksys Web UI - http://192.168.1.1/ca or http://10.65.1.1/ca depending on your setup.
Login with your admin password. The default password can be found on a sticker under the device.
To enter into the support mode, click on the “CA” link and the bottom of the page.
Open the “Connectivity” menu and upload the squash-factory image with the “Choose file” button.
Click start. Ignore all the prompts and warnings by click “yes” in all the popups.
The Wifi radios are turned off by default. To configure the router, you will need to connect your computer to the LAN port of the device.
Then you would need to write openwrt to the other partition for it to work
- First Check booted partition
fw_printenv -n boot_part
- Then install Openwrt to the other partition if booted in slot 1:
mtd -r -e alt_kernel -n write openwrt-qualcommax-ipq807x-linksys_mx4200v(X)-squashfs-factory.bin alt_kernel
- If in slot 2:
mtd -r -e kernel -n write openwrt-qualcommax-ipq807x-linksys_mx4200v(X)-squashfs-factory.bin kernel
Replace (X) with your model version either 1 or 2
Signed-off-by: Mohammad Sayful Islam <sayf.mohammad01@gmail.com>
Reviewed-by: Robert Marko <robimarko@gmail.com>
`ok` status is obsolete and thus `okay` should be used instead:
spi@78b9000: status:0: 'ok' is not one of ['okay', 'disabled', 'reserved']
Signed-off-by: Petr Štetiar <ynezz@true.cz>
* Revert the switch_lan_bmp and switch_wan_bmp to match the values from
the original device support DTS
* Add specific malibu_first_phy_addr, as it differs from default for
this device
Fixes: #14234
Reviewed-by: Robert Marko <robimarko@gmail.com>
Tested-by: Samir Ibradžić <sibradzic@gmail.com> # Buffalo WXR-6000AX12P
Signed-off-by: Samir Ibradžić <sibradzic@gmail.com>
Hardware specifications:
SoC: Qualcomm IPQ8071A
RAM: 512MB of DDR3
Flash1: Eon EN25S64 8MB
Flash2: MX30UF2G18AC 256MB
Ethernet: 2x 2.5G RJ45 port
Phone: 1x RJ11 port (SPI)
USB: 1x Type-C 2.0 port
WiFi1: QCN5024 2.4GHz
WiFi2: QCN5054 5GHz
Button: Reset, WPS
Flash instructions:
1. Connect the router via serial port (115200 8N1 1.8V)
2. Download the initramfs image, rename it to initramfs.bin,
and host it with the tftp server.
3. Interrupt U-Boot and run these commands:
tftpboot initramfs.bin
bootm
4. After openwrt boots up, use scp or luci web
to upload sysupgrade.bin to upgrade.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Reviewed-by: Robert Marko <robimarko@gmail.com>
We have a report in the forum, that lan/wan is non-functional
on the EAP102 (https://forum.openwrt.org/t/edgecore-eap102/178449)
Fixing that by swapping label and phy-handle of the dp-nodes and
updating the lan/wan bmp.
Note: the original commiter of the device support seems absent for a
long time in the forum and on the OpenWrt github group.
Tested-by: Antonio Della Selva <antonio.dellaselva@uniurb.it>
Signed-off-by: Dirk Buchwalder <buchwalder@posteo.de>
Reviewed-by: Robert Marko <robimarko@gmail.com>
Hardware specification:
SoC: Qualcomm IPQ8072A
Flash: Toshiba NAND 1GiB
RAM: 1 GiB of DDR3 466 MHz
Ethernet: 4x 1Gbps + 1x 2.5Gbps
WiFi1: QCN5024 2.4GHz ax 4x4
WiFi2: QCN5054 5GHz ax 4x4
Button: WiFi, WPS, Reset
Modem: RG500Q-EA
USB: 1 x USB 3.0
Power: DC 12V 4A
Flash instructions:
1. Download the initramfs image, rename it to
initramfs.bin, and host it with tftp server.
2. Interrupt U-Boot and run these commands:
tftpboot initramfs.bin
bootm
3. After openwrt boots up, use scp or luci web
to upload sysupgrade.bin to upgrade.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Reviewed-by: Robert Marko <robimarko@gmail.com>
Replace blanks with tabs, also sort base-files alphabetically.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Reviewed-by: Robert Marko <robimarko@gmail.com>
Correct oob size from 128 to 256 for Toshiba TH58NYG3S0HBAI4 flash.
Since it is not ONFI compliant NAND, the model name cannot be read
from anywhere, add a static NAND ID entry to correct this.
However, the NAND ID of this flash is inconsistent with the datasheet.
The actual NAND ID is only 4 ID bytes, the last ID byte is missing.[1]
Maybe this flash is counterfeit, or maybe it's another problem.
Another Toshiba flash had the same problem before. Refer to commit
a83dc6b ("kernel: move Toshiba-TC58NVG0S3H patch to ipq40xx"), put
the patch into qualcommax target to avoid affecting other devices.
The patch is verified on Arcadyan AW1000.
[1] Datasheet available at (the ID table is on page 50):
https://europe.kioxia.com/content/dam/kioxia/newidr/productinfo/datasheet/201910/DST_TH58NYG3S0HBAI4-TDE_EN_31565.pdf
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Reviewed-by: Robert Marko <robimarko@gmail.com>
DP nodes live under the soc node, and since soc is a simple bus it requires
node adresses to be present.
So, simply add the node addreses to avoid the following dtc warning:
Warning (unit_address_vs_reg): /soc/dp1: node has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): /soc/dp2: node has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): /soc/dp3: node has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): /soc/dp4: node has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): /soc/dp5: node has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): /soc/dp6: node has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): /soc/dp5-syn: node has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): /soc/dp6-syn: node has a reg or ranges property, but no unit name
Signed-off-by: Robert Marko <robimarko@gmail.com>
It seems that ESS dt-bindings somehow ended up with Windows line endings,
this is obviously incorrect, so lets convert it to UNIX endings.
Signed-off-by: Robert Marko <robimarko@gmail.com>
In fixing ipq8074 WAX630 dts, there was a typo in the switch lan bmp.
Fix it to fix compilarion error.
Fixes: f3cd4bfb7f ("ipq807x: fix multiple error on ESS switch port define")
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Fix multiple error on ESS switch port define.
- Fix wrong switch CPU and WAN bmp define. (many times wan port are
actually set in lan mask and lan port in wan mask)
- Renumber phyinfo port, use port_id instead of phy_address as it
doesn't make sense using that for port enumeration
- Drop additional port for devices that have them not connected.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Every board in qualcommax is using the same BM and TM switch tick modes, so
instead of specifying them in each board lets just set them in the ESS DTSI
directly.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Now that we have the MAC modes defined in DT bindings, lets replace all of
the raw hex values with defines.
While we are here, we can drop the disabled UNIPHY-s as that is the default
value in the ESS DTSI.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Every board that has the switch enabled needs to have MAC modes defined for
all 3 UNIPHY instances.
So, instead of having to at least put the disabled MAC mode for UNIPHY-s
let disable them by default and then boards can override it.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Since every board needs to define the correct MAC modes, it makes sense
to document the allowed hex values with a humanly readable name.
So, lets document all of the allowed MAC modes from SSDK 12.4 as bindings,
so later we can replace all of the hex values in DTS-es with these.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Commit 947b44d ("ipq807x: fix wrong define for LAN and WAN ess mask")
started fixing wrong switch_lan_bmp that defined lan there weren't
actually present. This displayed a fragility in the malibu phy init code
in qca-ssdk.
Add patch to fix this. Also update each DTS with the new required
property if needed.
The new binding malibu_phy_start_addr is required with devices that
place the malibu first PHY referring port1 on a different PHY addres
than 0. The most common configuration is 0 but some device (for example
Qnap 301W) place the malibu PHY at an offset to address 16.
Refer to ipq8074-ess dtsi for extensive description on how to derive
this value.
Quoting the patch detailed description:
The usage of first_phy_addr is EXTREMELY FRAGILE and results
in dangerous results if the OEM (or anyone that by chance try to
implement things in a logical manner) deviates from the default values
from the "magical template".
To be in more details. With QSDK 12.4, some tweaks were done to improve
autoneg and now on every call of port status, the phydev is tried to
add. This resulted in the call and log spam of an error with ports that
are actually not present on the system with qsdk reporting phydev is
NULL. This itself is not an error and printing the error is correct.
What is actually an error from ages is setting generic bitmap reporting
presence of port that are actually not present. This is very common on
OEM where the switch_lan_bmp is always a variant of 0x1e (that on bitmap
results in PORT1 PORT2 PORT3 PORT4 present) or 0x3e (PORT1 PORT2 PORT3
PORT4 PORT5). Reality is that many device are used as AP with one LAN
port or one WAN port. (or even exotic configuration with PORT1 not
present and PORT2 PORT3 PORT4 present (Xiaomi 3600)
With this finding one can say... ok nice, then lets update the DT and
set the correct bitmap...
Again world is a bad place and reality is that this cause wonderful
regression in some case of by extreme luck the first ever connected
port working and the rest of the switch dead.
The problem has been bisected to all the device that doesn't have the
PORT1 declared in any of the bitmap.
With this prefaction in mind, on to the REAL problem.
malibu_phy_hw_init FOR SOME REASON, set a global variable first_phy_addr
to the first detected PHY addr that coincidentally is always PORT1.
PORT1 addr is 0x0. The entire code in malibu_phy use this variable to
derive the phy addrs in some function.
Declaring a bitmap where the PORT1 is missing (or worse PORT4 the only
one connected) result in first_phy_addr set to 1 or whatever phy addr is
detected first setting wrong value all over the init stage.
To fix this, introduce a new binding malibu_first_phy_addr to manually
declare the first phy that the malibu PHY driver should use and permit
to detach it from port bmp detection. The legacy detection is kept for
compatibility reason.
Fixes: #13945
Fixes: 947b44d9ae ("ipq807x: fix wrong define for LAN and WAN ess mask")
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Tested-by: Robert Marko <robimarko@gmail.com> # Qnap 301W
Reviewed-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
switch_lan_bmp and switch_wan_bmp have wrong values and now cause
problems with the new version of the qca-ssdk.
Fix the wrong entry and drop the redundant switch_cpu_bmp.
Also introduce some convenient define to better understand values in
this map.
Fixes: eea264fead ("kernel: qca-ssdk: update to 12.4")
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Tested-by: Robert Marko <robimarko@gmail.com> # Dynalink AX3600 and Qnap 301W
Reviewed by: Robert Marko <robimarko@gmail.com>
SSDK has switched to using the upstream SMEM helper to get the SoC ID and
then look it up in the QCA SMEM ID header, so we need these in order for
SSDK to compile as they are currently undefined.
Signed-off-by: Robert Marko <robimarko@gmail.com>
