Commit Graph

75 Commits

Author SHA1 Message Date
Birger Koblitz
4d8020072e realtek: fix locking bug in rtl838x_hw_receive()
A Locking bug in the packet receive path was introduced with PR
#4973. The following patch prevents the driver from locking
after a few minutes with an endless flow of

[ 1434.185085] rtl838x-eth 1b00a300.ethernet eth0: Ring contention: r: 0, last a28000f4, cur a28000f8
[ 1434.208971] rtl838x-eth 1b00a300.ethernet eth0: Ring contention: r: 0, last a28000f4, cur a28000fc
[ 1434.794800] rtl838x-eth 1b00a300.ethernet eth0: Ring contention: r: 0, last a28000f4, cur a28000fc
[ 1435.049187] rtl838x-eth 1b00a300.ethernet eth0: Ring contention: r: 0, last a28000f4, cur a28000fc

Signed-off-by: Bjørn Mork <bjorn@mork.no>
Signed-off-by: Birger Koblitz <mail@birger-koblitz.de>
2022-02-18 12:35:03 +00:00
Sander Vanheule
a93dfff10e realtek: add RTL8231 chip detection
When initialising the driver, check if the RTL8231 chip is actually
present at the specified address. If the READY_CODE value does not match
the expected value, return -ENXIO to fail probing.

This should help users to figure out which address an RTL8231 is
configured to use, if measuring pull-up/-down resistors is not an
option.

On an unsuccesful probe, the driver will log:
    [    0.795364] Probing RTL8231 GPIOs
    [    0.798978] rtl8231_init called, MDIO bus ID: 30
    [    0.804194] rtl8231-gpio rtl8231-gpio: no device found at bus address 30

When a device is found, only the first two lines will be logged:
    [    0.453698] Probing RTL8231 GPIOs
    [    0.457312] rtl8231_init called, MDIO bus ID: 31

Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
2022-02-17 19:11:42 +02:00
Sander Vanheule
44f7cfd760 realtek: always require SMI bus ID for RTL8231
The SMI bus ID for RTL8231 currently defaults to 0, and can be
overridden from the devicetree. However, there is no value check on the
DT-provided value, aside from masking which would only cause value
wrap-around.

Change the driver to always require the "indirect-access-bus-id"
property, as there is no real reason to use 0 as default, and perform a
sanity check on the value when probing. This allows the other parts of
the driver to be simplified a bit.

Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
2022-02-17 19:11:37 +02:00
Sander Vanheule
5da2e0cc20 realtek: use automatic GPIO numbering for RTL8231
Set the gpio_chip.base to -1 to use automatic GPIO line indexing.
Setting base to 0 or a positive number is deprecated and should not be
used.

Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
2022-02-17 19:11:33 +02:00
Sander Vanheule
851212a714 realtek: fix RTL8231 gpio count
The RTL8231's gpio_chip.ngpio was set to 36, which is the largest valid
GPIO index. Fix the allowed number of GPIOs by setting ngpio to 37, the
actual line count.

Reported-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
2022-02-17 19:11:17 +02:00
Daniel Golle
eef7f17652 realtek: rtl83xx-phy: abstract and document PHY features
Replace magic values with more self-descriptive code now that I start
to understand more about the design of the PHY (and MDIO controller).

Remove one line before reading RTL8214FC internal PHY id which turned
out to be a no-op and can hence safely be removed (confirmed by
INAGAKI Hiroshi[1])

[1]: df8e6be59a (r66890713)

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2022-02-17 15:37:03 +00:00
Birger Koblitz
68c66b0fa3 realtek: fix locking issues
Fixe a coupld of locking issues found by applying lock
debugging to the code.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Daniel Golle
b53202a8c3 realtek: switch to use generic MDIO accessor functions
Instead of directly calling SoC-specific functions in order to access
(paged) MII registers or MMD registers, create infrastructure to allow
using the generic phy_*, phy_*_paged and phy_*_mmd functions.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2022-02-17 15:21:47 +00:00
Daniel Golle
af93bf6129 realtek: implement Clause-45 MDIO write on rtl931x
* Add missing Clause-45 write support for rtl931x
 * Switch to use helper functions in all Clause-45 access functions to
   make the code more readable.
 * More meaningful/unified debugging output (dynamic kprintf)

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2022-02-17 15:21:47 +00:00
Birger Koblitz
0538dc693b realtek: add support for port led configuration on RTL93XX
Using the led-set attribute of a port in the dts we allow configuration
of the port leds. Each led-set is being defined in the led-set configuration
of the .dts, giving a specific configuration to steer the port LEDs via a serial
connection.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
caaac9ab3b realtek: Add support for the RTL8221B PHY
The RTL8221B PHY is a newer version of the RTL8226, also supporting
2.5GBit Ethernet. It is found with RTL931X devices such as the
EdgeCore ECS4125-10P

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
08cf48c344 realtek: Add specific PHY polling options to support the Zyxel XGS1250/XGS1210
Both the Aquantia AQR113c and the RTL8226 PHYs in the Zyxel XGS1250 and the
Zyxel XGS1210 require special polling configuration settings in the
RTL930X_SMI_10GPHY_POLLING_REGxx_CFG configuration registers. Set them.
Additionally, for RTL 1GBit phys set the RTL930X_SMI_PRVTE_POLLING_CTRL bits
in the poll mask.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
3cab11ad13 realtek: Fix link status detection on RTL9302 for SFP modules
For SFP slots on the RTL9302, the link status is not correctly detected.
Use the link media status instead.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
0b8dfe0851 realtek: Add RTL931X sub-target
We add the RTL931X sub-target with kernel configuration for
a dual core MIPS InterAptive CPU.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
9ed6097054 realtek: Add HW support for RTL931X for PIE, L2 and STP aging
We add HW support routines for the RTL931X SoC family for handling
the Packet Inspection Engine, L2 table handling and STP aging.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
724e4af530 realtek: Store and Restore MC memberships for port enable/disable
We need to store and restore MC memberships in HW when a port joins or
leaves a bridge as well as when it is enabled or disabled, as these
properties should not change in these situations.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
d22923be66 realtek: Copy all BPDUs to the kernel
In order to receive STP information at the kernel level, we make sure
that all Bridge Protocol Data Units are copied to the CPU-Port.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
9d396fc1e8 realtek: Add L2 aging configuration functions for all SoC families
Instead of a generic L2 aging configuration function with complex
logic, we implement an individual function for all SoC types.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
f3c5e7ddcc realted: Add DSA bridge offload configuration
Add functionality to enable or disable L2 learning offload and port flooding
for RTL83XX.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
32e5b5ee6b realtek: Add Link Aggregation (aka trunking) support
This adds LAG support for all 4 SoC families, including support
ofr the use of different distribution algorithm for the load-
balancing between individual links.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
77f3e2ea17 realtek: Cleanup setting inner/outer PVID and Ingress/Egres VLAN filtering
Use setting functions instead of register numbers in order to clean up the code.
Also use enums to define inner/outer VLAN types and the filter type.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
7026084066 realtek: Add SDS configuration routines for the RTL93XX platforms
Adds configuration routines for the internal SerDes of the
RTL930X and RTL931X.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
51c8f76612 realtek: Improve MAC config handling for all SoCs
Adds a rtl931x_phylink_mac_config for the RTL931X and improve
the handling of the RTL930X phylink configuration. Add separate
handling of the RTL839x since some configurations are different
from the RTL838X.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
c7cc4e95a5 realtek: Add support for detecting RTL9303 SoCs
Adds support for detecting RTL9303 SoCs as found e.g.
in the Ubiquiti USW switch.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
60df655d5b realtek: Allow PHY-IDs to differ from Port numbers
We were using the PHY-ids (the reg entries in the PHY
sections of the .dts) as the port numbers. Now scan the
ports section in the .dts, and use the actual port numbers,
following the phy-handle to the PHY properties.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
bf0ffe3310 realtek: Use SerDes Information from .dts for phylink config
When a port is brought up, read the SDS-id via the phy_device
for a given port and use this to configure the SDS when it
is brought up.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
a825835942 realtek: Improve IRQ request in Ethernet driver
Improves the IRQ request code by using platform_get_irq() which provides
better error handling.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
775d903216 realtek: Replace the RTL9300 generic timer with a CEVT timer
The RTL9300 has a broken R4K MIPS timer interrupt, however, the
R4K clocksource works. We replace the RTL9300 timer with a
Clock Event Timer (CEVT), which is VSMP aware and can be instantiated
as part of brining a VSMTP cpu up instead of the R4K CEVT source.
For this we place the RTL9300 CEVT timer in arch/mips/kernel
together with other MIPS CEVT timers, initialize the SoC IRQs
from a modified smp-mt.c and instantiate each timer as part
of the MIPS time setup in arch/mips/include/asm/time.h instead
of the R4K CEVT, similarly as is done by other MIPS CEVT timers.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
0536c582e6 realtek: Fix RTL931X Ethernet driver
Various fixes to enable Ethernet on the RTL931X:
 - Network start and stop sequence for RTL931X HW
 - MDIO access on RTL931X SoC
 - Chip initialization
 - SerDes setup

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
1b1f05f682 realtek: Fix Ethernet driver IRQ service routine for SMP
Do not lock the register structure in IRQ context. It is not
necessary and leads to lockups under SMP load.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
9d847244d9 realtek: fix RTL839X receive tag decoding
Correct offset in RX tag structure. Correct offload decision flagging.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
6b79484268 realtek: Add SerDes access functions for RTL931X
Adds RTL931X SerDes access functions as needed by the Ethernet driver.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
6378d72ef6 realtek: Fix RTL931X-specific Ethernet driver functions
Fix the update counter of the RX ring, add SDS access functions
for RTL931X.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
9024202052 realtek: rename rtl838x_reg structure
Rename the SoC-specific rtl838x_reg structure in the Ethernet
driver to avoid confusion with the structure of the same name
in the DSA driver. New name is: rtl838x_eth_reg

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
2f51e567ff realtek: Fix RTL839x TX CPU-Tag
Setting bits 20 and 23 in a u16 is obviously wrong.
According to https://www.svanheule.net/realtek/cypress/cputag
cpu_tag[2] starts at bit 48 in the cpu-tag structure, so
bit 43 is bit 5 in cpu_tag[2] and bit 40 is bit 8 in
cpu_tag[2].

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
b3287a2165 realtek: Increase zone size for Ethernet driver DMA
Set CONFIG_FORCE_MAX_ZONEORDER setting to 13 to allow larger
contiguous memory allocation for the DMA of the Ethernet
driver. Increase the number of entries in the RX ring
to 300 making use of the larger DMA region now possible for
receiveing packets.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
04489b7255 realtek: Enable Multithreading support in prom.c
Adds Multithreading support functions in prom.c.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
f603090311 realtek: Change Platform defines to depend on CONFIG_RTL83XX
In order for the Platform includes to be available on
all sub-targets, make them dependent on CONFIG_RTL83XX.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
fce11f6849 realtek: Create 4 different Realtek Platforms
Creates RTL83XX as a basic kernel config parameter for the
RTL838X, RTL839x, RTL930X and RTL931X platforms with respective
configurations for the SoCs, which are introduced in addition.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
f4bdb7fdcc realtek: Add support for RTL9300/RTL9310 I2C multiplexing
The RTL9300/RTL9310 I2C controllers have support for 2 independent I2C
masters, each with a fixed SCL pin, that cannot be changed. Each of these
masters can use 8 (RTL9300) or 16 (RTL9310) different pins for SDA.
This multiplexer directly controls the two masters and their shared
IO configuration registers to allow multiplexing between any of these
busses. The two masters cannot be used in parallel as the multiplex
is protected by a standard multiplex lock.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:46 +00:00
Birger Koblitz
63a0a4d85b realtek: Add support for RTL9300/RTL9310 I2C controller
This adds support for the RTL9300 and RTL9310 I2C controller.
The controller implements the SMBus protocol for SMBus transfers
over an I2C bus. The driver supports selecting one of the 2 possible
SCL pins and any of the 8 possible SDA pins. Bus speeds of
100kHz (standard speed) and 400kHz (high speed I2C) are supported.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:46 +00:00
Birger Koblitz
48dd446614 realtek: remove legacy GPIO driver support
This patch removes support for the legacy GPIO driver, since now
the gpio-otto driver can be used on all platforms

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:46 +00:00
Sander Vanheule
f8b2bc550b realtek: Remove _machine_restart and _machine_halt
By dropping _machine_restart, users can provide more reliable or
device-specific restart modes.

_machine_halt was already removed in commit f4b687d1f0 ("realtek: use
kernel defined halt"), but quietly reintroduced in commit 8faffa00cb
("realtek: add support for the RTL9300 timer"). Let's remove it again.

Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Stijn Segers <foss@volatilesystems.org>
Tested-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
2021-11-24 21:43:56 +02:00
Sander Vanheule
72ae8314f5 realtek: reset both ethernet NIC and queues
Recent versions of Realtek's SDK reset both the ethernet NIC and queues
(SW_NIC_RST and SW_Q_RST bits) when initialising the hardware.

Furthermore, when issuing a CPU reset on the Zyxel GS1900-8 (not
supported by any current driver), the networking part of the SoC is not
reset. This leads to unresponsive network after the restart. By
resetting both the ethernet NIC and queues, networking always comes up
reliably.

Suggested-by: Birger Koblitz <mail@birger-koblitz.de>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
2021-11-24 21:38:43 +02:00
Bjørn Mork
d990f805c0 realtek: re-enable IPv6 routing
Commit 03e1d93e07 ("realtek: add driver support for routing
offload") added routing offload for IPv4, but broke IPv6 routing
completely.  The routing table is empty and cannot be updated:

 root@gs1900-10hp:~# ip -6 route
 root@gs1900-10hp:~# ip -6 route add unreachable default
 RTNETLINK answers: Invalid argument

As a side effect, this breaks opkg on IPv4 only systems too,
since uclient-fetch fails when there are no IPv6 routes:

 root@gs1900-10hp:~# uclient-fetch http://192.168.99.1
 Downloading 'http://192.168.99.1'
 Failed to send request: Operation not permitted

Fix by returning NOTIFY_DONE when offloading is unsupported, falling
back to default behaviour.

Fixes: 03e1d93e07 ("realtek: add driver support for routing offload")
Signed-off-by: Bjørn Mork <bjorn@mork.no>
2021-10-30 15:00:22 +02:00
Birger Koblitz
cda0460ad3 realtek: add legacy realtek GPIO driver for rtl9300 support
The otto GPIO driver does not work with rtl9300 SoCs. Add
the legacy driver again and use that by default in the 9300 .dtsi

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2021-10-09 08:25:06 +02:00
Birger Koblitz
76f60470a1 realtek: Fix bug when accessing external PHYs on SoCs older than Revision C
RTL8393 SoCs older than Revision C hang on accesses to PHYs with PHY address
larger or equal to the CPU-port (52). This will make scanning the MDIO bus
hang forever. Since the RTL8390 platform does not support more than
52 PHYs, return -EIO for phy addresses >= 52. Note that the RTL8390 family
of SoCs has a fixed mapping between port number and PHY-address.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2021-10-09 08:25:06 +02:00
Birger Koblitz
88936e7e82 realtek: cleanup PHY driver
Removes unnecessary output from the RTL PHY drivers.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2021-10-09 08:25:06 +02:00
Birger Koblitz
1cfd45ae0b realtek: Add debugfs support for RTL9300
Adds support for debugfs on RTL9300, in particular the drop counters.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2021-10-09 08:25:06 +02:00
Birger Koblitz
1f402512ae realtek: Add SoC-specific routing offload implementation
Adds SoC specific routing offload implementations for
RTL8380/90 and RTL9300. RTL83xx supports merely nexthop
routing, RTL9300 full host and prefix routes.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2021-10-09 08:25:06 +02:00