CPU: AR9342 SoC
RAM: 64 MB DDR2
Flash: 8 MB NOR SPI
Ports: 2x100 MBit (24V PoE in, 24V PoE out), AR8236 switch
WLAN: 2.4/5 GHz
UART: 1 UART
LEDs: Power, 2x Ethernet, 4x RSSI LEDs (orange, red, 2x green)
Buttons: Reset
Flashing instructions using recovery method over TFTP
1. Unplug the ethernet cable from the router.
2. Using paper clip press and hold the router's reset button. Make sure
you can feel it depressed by the paper clip. Do not release the button
until step 4.
3. While keeping the reset button pressed in, plug the ethernet cable
back into the AP. Keep the reset button depressed until you see the
device's LEDs flashing in upgrade mode (alternating LED1/LED3 and
LED2/LED4), this may take up to 25 seconds.
4. You may release the reset button, now the device should be in TFTP
transfer mode.
5. Set a static IP on your Computer's NIC. A static IP of 192.168.1.25/24
should work.
6. Plug the PoE injector's LAN cable directly to your computer.
7. Start tftp client and issue following commands:
tftp> binary
tftp> connect 192.168.1.20
tftp> put openwrt-ath79-generic-ubnt-nano-m-xw-squashfs-factory.bin
Tested-by: Joe Ayers <ae6xe@arrl.net>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
While converting Nanostation M XW from current ar71xx code to ath79 I've
hit one issue, where the ethernet networking wasn't working, so I was
checking every bit in the networking setup path between ar71xx and
ath79.
I've came to the following code in ar71xx/mach-ubnt-xm.c:
static void __init ubnt_xw_init(void) {
...
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_MII_GMAC0 |
AR934X_ETH_CFG_MII_GMAC0_SLAVE);
...
}
Where this code is setting AR934X_ETH_CFG_MII_GMAC0_SLAVE bit in
AR934X_GMAC_REG_ETH_CFG register, but I couldn't find a way of setting
this bit from DTS, so this patch adds `mii-gmac0-slave` DTS property
which allows setting of this bit in `gmac-config`, which is then used in
Nanostation M XW DTS.
Tested-by: Joe Ayers <ae6xe@arrl.net>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
This allows resetting gmac registers during initialization.
Also add compatible string for qca955x mdio to enable more mdio
clock dividers.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
On ar933x and later chips, there are separated mac/mdio resets, but
resetting the entire gmac block with register values requires both
mac_reset and mdio_reset to be asserted together.
Add support for optional mdio reset so that we can do a full reset
if needed.
This patch also replaced deprecated devm_reset_control_get for
mac reset.
To use this feature, the following is needed:
1. drop "simple-mfd" compatible to register mdio0 after gmac init
so that mdio registers aren't reset after initialization.
2. move mdio reset from mdio-bus to its parent eth node.
NOTE: This can't be applied on gmac1 with builtin switch since we
haven't add a feature to defer probe if phy connection failed.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
remove the hacky checking of "simple-mfd" compatible
also add some comments explaining that piece of code.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
using the devm api makes the code simpler.
also drop unneeded memory free from ag71xx_remove since they are
allocated using devm apis.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
phy_modes() in phy.h can convert PHY modes to string with supports
for all available PHY modes.
Also add a space in mode printing to make it look better.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
This commit makes the TP-Link hardware-revision naming consistent to
match the one used by the vendor. TP-Link refers to the different
revisions as "vX" not "Version X".
Signed-off-by: David Bauer <mail@david-bauer.net>
Commit 34b10b46 made usb match with the corresponding usb label.
The problem is that v4 seems to use in stock firmware the
upper led for usb 1 and the lower led for usb 2.
The led assigned varies between TP-Link models and even
same model versions. For example, Archer C7 v1 and v2 have
the leds in the reverse order.
Revert 34b10b46 and swap led labels instead, now usb port
and led label match and also respect the original behavior.
Tested-by: Oldrich Jedlicka <oldium.pro@gmail.com>
Signed-off-by: David Santamaría Rogado <howl.nsp@gmail.com>
This is a simple copy of ipq40xx: speed up ath10k-caldata
extraction commit a69e101ed1
Tested on DIR-825-B1
3768+0 records in
3768+0 records out
real 0m 11.90s
user 0m 0.03s
sys 0m 9.94s
1+0 records in
1+0 records out
real 0m 0.03s
user 0m 0.00s
sys 0m 0.03s
With this change eeprom extraction is fast enough to get
working Wi-Fi after initial install.
Signed-off-by: Dmitry Tunin <hanipouspilot@gmail.com>
In the production of glinet, the MAC address of ethernet port is
only written at the position where the ART area offset address
is 0, and the MAC address of eth1 is added 1 on the basis of eth0.
Signed-off-by: Luo chongjun <luochongjun@gl-inet.com>
This patch adds support for the COMFAST CF-E120A v3, an outdoor wireless
CPE with two Ethernet ports and a 802.11an radio.
Specifications:
- AR9344 SoC
- 535/400/267 MHz (CPU/DDR/AHB)
- 2x 10/100 Mbps Ethernet, both with PoE-in support
- 64 MB of RAM (DDR2)
- 8 MB of FLASH
- 2T2R 5 GHz, up to 25 dBm
- 11 dBi built-in antenna
- POWER/LAN/WAN/WLAN green LEDs
- 4x RSSI LEDs (2x red, 2x green)
- UART (115200 8N1) and GPIO (J9) headers on PCB
Flashing instructions:
The original firmware is based on OpenWrt so a sysupgrade image can be
installed via the stock web GUI. Settings from the original firmware
will be saved and restored on the new one, so a factory reset will be
needed. To do so, once the new firmware is flashed, enter into failsafe
mode by pressing the reset button several times during the boot
process, while while the WAN LED flashes, until it starts flashing
faster. Once in failsafe mode, perform a factory reset as usual.
The U-boot bootloader contains a recovery HTTP server to upload the
firmware. Push the reset button while powering the device on and
keep it pressed for >10 seconds. The recovery page will be at
http://192.168.1.1
Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
The TP-Link WDR3600 shares the same machine-code in the ar71xx target,
thus expecting "tl-wdr4300" not "tl-wdr3600" in the support-list
metadata to allow non-forced sysupgrades from ar71xx to ath79.
With this, it is possible to flash a WDR4300 image on the WDR3600. It
is no problem however, as the only difference is the 5GHz WiFi chip
which has 3SS instead of 2SS. Both work with either image.
Signed-off-by: David Bauer <mail@david-bauer.net>
This adds the support-list entry the AVM FRITZ!Box 4020 expects in the
ar71xx target to allow non-forced sysupgrades from ar71xx to ath79.
Signed-off-by: David Bauer <mail@david-bauer.net>
According to /arch/mips/include/asm/mach-ath79/ar71xx_regs.h
the size of wmac register range for qca953x is only 0x20000.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
I-O DATA WN-AC1600DGR is a 2.4/5 GHz band 11ac router, based on
Qualcomm Atheros QCA9557.
Specification:
- SoC: Qualcomm Atheros QCA9557
- RAM: 128 MB
- Flash: 16 MB
- WLAN: 2.4/5 GHz
- 2.4 GHz: 2T2R (SoC internal)
- 5 GHz: 3T3R (QCA9880)
- Ethernet: 5x 10/100/1000 Mbps
- Switch: QCA8337N
- LED/key: 6x/6x(4x buttons, 1x slide switch)
- UART: through-hole on PCB
- Vcc, GND, TX, RX from ethernet port side
- 115200n8
Flash instruction using factory image:
1. Connect the computer to the LAN port of WN-AC1600DGR
2. Connect power cable to WN-AC1600DGR and turn on it
3. Access to "http://192.168.0.1/" and open firmware update page
("ファームウェア")
4. Select the OpenWrt factory image and click update ("更新") button
5. Wait ~150 seconds to complete flashing
Alternative flash instruction using initramfs image:
1. Prepare a computer and TFTP server software with the IP address
"192.168.99.8" and renamed OpenWrt initramfs image
"uImageWN-AC1600DGR"
2. Connect between WN-AC1600DGR and the computer with UART
3. Connect power cable to WN-AC1600DGR, press "4" on the serial
console and enter the U-Boot console
4. execute "tftpboot" command on the console and download initramfs
image from the TFTP server
5. execute "bootm" command and boot OpenWrt
6. On initramfs image, download the sysupgrade image to the device
and perform sysupgrade with it
7. Wait ~150 seconds to complete flashing
This commit also removes unnecessary "qca,no-eeprom" property from
the ath10k wifi node.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Tested with a dual pci QCA9558 board (LibreRouter v1) in three
configurations: enabling pcie0 only, pcie1 only and both enabled.
Signed-off-by: Santiago Piccinini <spiccinini@altermundi.net>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com> [removed ML notice]
Datasheet states that both PCI ranges are of 0x2000000 size:
0x1000_0000-0x11FF_FFF and 0x1200_0000-0x13FF_0000.
Signed-off-by: Santiago Piccinini <spiccinini@altermundi.net>
Reviewed-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com> [removed ML notice]
The switch ports are seen one to one on the case.
Also remove unneeded secondary port numbers in this
case statement.
Signed-off-by: Paul Wassi <p.wassi@gmx.at>
Change the ledtrig for LAN from netdev to switch.
Although eth1 comes out of the device at a single port,
this port is a switch-port and therefore the LED
must be triggered by that.
Signed-off-by: Paul Wassi <p.wassi@gmx.at>
Hardware
--------
CPU: Qualcomm Atheros QCA9561
RAM: 64M DDR2
FLASH: 16M SPI-NOR
ETH: 1x WAN - 2x LAN
WiFi: QCA9561 3T3R
BTN: 1x Reset - 1x WPS
LED: 1x Blue - 1x Red - 1x Yellow
UART: TX - GND - RX - VCC (From ethernet port)
115200n8 - 3.3V
Installation
------------
1. Connect to the device via UART.
2. Interrupt the U-Boot on power-on by pressing enter when prompted.
3. Connect you computer to one of the routers LAN ports.
Assign yourself the IP 192.168.31.10/24.
Copy the OpenWRT initramfs image to a tftp server root directory.
Rename the image to 'x4q.bin'.
4. Load the initramfs image to the router by executing following command
in U-Boot. The image will boot afterwards.
> tftpboot 0x81000000 x4q.bin; bootm
5. SCP the sysupgrade-image into '/tmp'.
Remember to assign yourself an IP in 192.168.1.0/24 for this step!
6. Install OpenWRT permanently by executing
> sysupgrade -n /tmp/<OpenWRT-sysupgrade-image>
Signed-off-by: David Bauer <mail@david-bauer.net>
On ath79 and UBNT Bullet M XW (ar9342) I was experiencing weird issues during
network setup[1] which I was able to reproduce easily with following commands:
uci set network.lan.ipaddr='192.168.1.20'
uci commit network
ifup lan
Which resulted after some time in:
...
WARNING: CPU: 0 PID: 0 at net/sched/sch_generic.c:461 dev_watchdog+0x16c/0x280
NETDEV WATCHDOG: eth0 (ag71xx): transmit queue 0 timed out
...
Sometimes I wasn't able to use networking anymore, sometimes it was enough to
just ifdown/ifup lan and network was backup. On ar71xx it was all working just
fine.
I've found out, that it was happening because ag71xx_poll() wasn't called, thus
the TX queue wasn't emptied. The ag71xx_poll() is being called from napi
hrtimer, which is enabled by napi_schedule() in ar71xx_interrupt(), but since
no interrupts were ever fired again after ag71xx_stop() was called, it was
always leading to tx queue timeouts:
*** ag71xx_hard_start_xmit()
eth0: packet injected into TX queue
eth0: raw intr=00000001 TXPS POLL
eth0: enable polling mode
eth0: processing TX ring, flush=no
eth0: disable polling mode, rx=1, tx=1,limit=32
( `ifup lan done here` )
*** ag71xx_stop()
*** ag71xx_open()
*** ag71xx_hw_enable()
IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
*** ag71xx_hard_start_xmit()
eth0: packet injected into TX queue
*** ag71xx_hard_start_xmit()
eth0: packet injected into TX queue
...
WARNING: CPU: 0 PID: 0 at net/sched/sch_generic.c:320 dev_watchdog+0x164/0x274
So I've looked at ag71xx_stop() in ar71xx, added the missing bits to ath79 and
fixed this issue.
1. https://github.com/openwrt/openwrt/pull/1635#issuecomment-448638246
Signed-off-by: Petr Štetiar <ynezz@true.cz>
[move ag->link before ag71xx_hw_disable to retain ordering as original]
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
TP-Link Archer C7 v4 is a dual-band AC1750 router, based on the
Qualcomm/Atheros QCA9561 SoC + QCA9880.
Specification:
- 775/650/258 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 16 MB of FLASH (SPI NOR)
- 3T3R 2.4 GHz
- 3T3R 5 GHz
- 5x 10/100/1000 Mbps Ethernet
- 7x LED, 2x button
- UART header on PCB
Flash instruction:
1. Upload openwrt-ath79-generic-tplink_archer-c7-v4-squashfs-factory.bin
via Web interface
Flash instruction using TFTP recovery:
1. Set PC to fixed ip address 192.168.0.66
2. Download openwrt-ath79-generic-tplink_archer-c7-v4-squashfs-factory.bin
and rename it to ArcherC7v4_tp_recovery.bin
3. Start a tftp server with the file tp_recovery.bin in its root directory
4. Turn off the router
5. Press and hold Reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time
the firmware should be transferred from the tftp server
8. Wait ~30 second to complete recovery.
Signed-off-by: Oldřich Jedlička <oldium.pro@gmail.com>
Hardware
--------
CPU: Qualcomm Atheros QCA9558
RAM: 128M DDR2
FLASH: 16MiB
ETH: 1x Atheros AR8035 (PoE in)
1x Atheros AR8033
WiFi2: QCA9558 3T3R (SiGE SE2565T 2.4 GHz power amp x3)
WiFi5: QCA9880 3T3R (Skyworks 5003L1 5 GHz power amp x3)
BTN: 1x Reset
1x WPS
1x USB eject
LED: 1x LED blue
1x LED red
BEEP: 1x GPIO attached piezo beeper
UART: 3.3V GND TX RX (115200-N-8) (3.3V is pin closest to rear ports)
Dupont 4 pin header
Rear RJ45 serial port non-functional
USB: 1x v2.0
Installation
------------
Make sure you set a password for the root user as prompted on first
setup!
1. Upload OpenWRT sysupgrade image via SSH to the device.
Use /tmp as the destination folder on the device.
User is root, password previously set in the web interface.
2. Install OpenWRT with
> sysupgrade -n -F /tmp/<openwrt-image-name>
Signed-off-by: Django Armstrong <iamdjango@hotmail.com>
Change the "status" LED to proper GPIO 12 and "red" naming.
Remove GPIO 2 from definition as a USB LED.
GPIO 2 is used to control power to the USB socket, not an LED.
As such, PWM on the line or typical LED triggers are inappropriate.
Users who wish to control the USB power for custom applications
can manipulate the GPIO through code, or for example, export it
through /sys/class/gpio/export.
Runtime-tested: GL.iNet AR300M-Lite
Signed-off-by: Jeff Kletsky <git-commits@allycomm.com>
LAN ports 1 and 4 and 2 and 3 are interchanged. Fix this in 02_network
so the ports show up in the correct order in luci.
The correct ucidef_add_switch line is already present. This commit moves
the blocks around to keep alphabetical order.
Signed-off-by: Sebastian Kemper <sebastian_ml@gmx.net>
The swconfig load operation always triggers 'apply' function which in
this driver currently clears port mirroring flags effectively undoing
port mirroring configuration.
Signed-off-by: Milan Krstic <milan.krstic@gmail.com>
Hardware
--------
CPU: Qualcomm Atheros QCA9558
RAM: 128M DDR2
FLASH: 16MiB
ETH: 1x Atheros AR8035 (PoE in)
WiFi2: QCA9558 2T2R
WiFi5: QCA9880 2T2R
BTN: 1x Reset
LED: 1x LED blue
1x LED red
BEEP: 1x GPIO attached piezo beeper
UART: 3.3V GND TX RX (115200-N-8) (3.3V is square pad)
Header is located next to reset-button
Installation
------------
Make sure you set a password for the root user as prompted on first
setup!
1. Upload OpenWRT sysupgrade image via SSH to the device.
Use /tmp as the destination folder on the device.
User is root, password the one set in the web interface.
2. Install OpenWRT with
> sysupgrade -n -F /tmp/<openwrt-image-name>
Signed-off-by: David Bauer <mail@david-bauer.net>
Hardware
--------
CPU: Qualcomm Atheros QCA9558
RAM: 128M DDR2
FLASH: 16MiB
ETH: 1x Atheros AR8035 (PoE in)
WiFi2: QCA9558 3T3R
WiFi5: QCA9880 3T3R
BTN: 1x Reset
LED: 1x LED blue
1x LED red
BEEP: 1x GPIO attached piezo beeper
UART: 3.3V GND TX RX (115200-N-8) (3.3V is square pad)
Header is located next to reset-button
Installation
------------
Make sure you set a password for the root user as prompted on first
setup!
1. Upload OpenWRT sysupgrade image via SSH to the device.
Use /tmp as the destination folder on the device.
User is root, password the one set in the web interface.
2. Install OpenWRT with
> sysupgrade -n -F /tmp/<openwrt-image-name>
Signed-off-by: David Bauer <mail@david-bauer.net>
Replace the code with a more readable version. Rename the recipe
to reflect the real usecase.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Signed-off-by: Mathias Kresin <dev@kresin.me>
The 'factory' partition will move to 0x50000-0x60000 in 2019. As
the webserver in bootloader is compatible with different mtdlayout,
all the users still can upgrade firmware whatever on ath79 or ar71xx.
Signed-off-by: Rosy Song <rosysong@rosinson.com>
This patch adds support for the COMFAST CF-E110N, an outdoor wireless
CPE with two Ethernet ports and a 802.11bgn radio.
Specifications:
- 650/400/216 MHz (CPU/DDR/AHB)
- 2x 10/100 Mbps Ethernet, both with PoE-in support
- 64 MB of RAM (DDR2)
- 16 MB of FLASH
- 2T2R 2.4 GHz, up to 26 dBm
- 11 dBi built-in antenna
- POWER/LAN/WAN/WLAN green LEDs
- 4x RSSI LEDs (2x red, 2x green)
- UART (115200 8N1) and GPIO (J9) headers on PCB
Flashing instructions:
The original firmware is based on OpenWrt so a sysupgrade image can be
installed via the stock web GUI. Settings from the original firmware
will be saved and restored on the new want, so a factory reset will be
needed: once the new firmware is flashed, perform the factory reset by
pushing the reset button several times during the boot process, while the
WAN LED flashes, until it starts flashing quicker.
The U-boot bootloader contains a recovery HTTP server to upload the
firmware. Push the reset button while powering the device on and keep it
pressed for >10 seconds. The recovery page will be at http://192.168.1.1
Notes:
The device is advertised, sold and labeled as "CF-E110N", but the
bootloader and the stock firmware identify it as "v2".
Acknowledgments:
Petr Štetiar <ynezz@true.cz>
Sebastian Kemper <sebastian_ml@gmx.net>
Chuanhong Guo <gch981213@gmail.com>
Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
[drop unused labels from devicetree source file]
Signed-off-by: Mathias Kresin <dev@kresin.me>
This patch adds support for TP-Link Archer C6 v2 (EU)
Hardware specification:
- SOC: Qualcomm QCA9563 @ 775MHz
- Flash: GigaDevice GD25Q64CSIG (8MiB)
- RAM: Zentel A3R1GE40JBF (128 MiB DDR2)
- Ethernet: Qualcomm QCA8337N: 4x 1Gbps LAN + 1x 1Gbps WAN
- Wireless:
- 2.4GHz (bgn) QCA9563 integrated (3x3)
- 5GHz (ac) Qualcomm QCA9886 (2x2)
- Button: 1x power, 1x reset, 1x wps
- LED: 6x LEDs: power, wlan2g, wlan5g, lan, wan, wps
- UART: There's no UART header on the board
Flash instructions:
Upload
openwrt-ath79-generic-tplink_archer-c6-v2-squashfs-factory.bin
via the router Web interface.
Flash instruction using tftp recovery:
1. Connect the computer to one of the LAN ports of the router
2. Set the computer IP to 192.168.0.66
3. Start a tftp server with the OpenWrt factory image in the
tftp root directory renamed to ArcherC6v2_tp_recovery.bin.
4. Connect power cable to router, press and hold the reset
button and turn the router on
5. Keep the reset button pressed until the WPS LED lights up
6. Wait ~150 seconds to complete flashing
According to the GPL source the non-EU variant has different
GPIOs assigned to some of the LEDs and buttons. The flash
layout might be different as well. The wikidevi entry for
Archer A6/C6 assumes they are identical.
Signed-off-by: Georgi Vlaev <georgi.vlaev@gmail.com>
