bcm27xx: update to latest RPi patches

The patches were generated from the RPi repo with the following command:
git format-patch v6.6.58..rpi-6.6.y

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
This commit is contained in:
Álvaro Fernández Rojas 2024-10-31 10:09:44 +01:00
parent 7afdbc0955
commit 538a1d740c
122 changed files with 15104 additions and 335 deletions

View File

@ -160,6 +160,7 @@ CONFIG_FIX_EARLYCON_MEM=y
CONFIG_FONT_8x16=y
CONFIG_FONT_8x8=y
CONFIG_FONT_SUPPORT=y
CONFIG_FORCE_NR_CPUS=y
CONFIG_FRAMEBUFFER_CONSOLE=y
# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y

View File

@ -176,6 +176,7 @@ CONFIG_DMA_BCM2835=y
CONFIG_DMA_CMA=y
CONFIG_DMA_DIRECT_REMAP=y
CONFIG_DMA_ENGINE=y
# CONFIG_DMA_NUMA_CMA is not set
CONFIG_DMA_OF=y
CONFIG_DMA_SHARED_BUFFER=y
CONFIG_DMA_VIRTUAL_CHANNELS=y
@ -221,6 +222,8 @@ CONFIG_FW_LOADER_SYSFS=y
CONFIG_GCC10_NO_ARRAY_BOUNDS=y
CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ARCH_NUMA=y
CONFIG_GENERIC_ARCH_NUMA_EMULATION=y
CONFIG_GENERIC_ARCH_TOPOLOGY=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
@ -331,6 +334,8 @@ CONFIG_MODULES_USE_ELF_RELA=y
# CONFIG_MTD is not set
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y
CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_NET_EGRESS=y
CONFIG_NET_FLOW_LIMIT=y
@ -340,11 +345,15 @@ CONFIG_NET_SELFTESTS=y
CONFIG_NET_XGRESS=y
CONFIG_NLS=y
CONFIG_NLS_ASCII=y
CONFIG_NODES_SHIFT=4
CONFIG_NOP_USB_XCEIV=y
CONFIG_NO_HZ=y
CONFIG_NO_HZ_COMMON=y
CONFIG_NO_HZ_IDLE=y
CONFIG_NR_CPUS=4
CONFIG_NUMA=y
# CONFIG_NUMA_BALANCING is not set
CONFIG_NUMA_EMULATION=y
CONFIG_NVMEM=y
CONFIG_NVMEM_LAYOUTS=y
CONFIG_NVMEM_RASPBERRYPI_OTP=y
@ -358,6 +367,7 @@ CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OF_NUMA=y
CONFIG_OF_OVERLAY=y
CONFIG_OF_RESOLVE=y
CONFIG_PADATA=y
@ -485,6 +495,7 @@ CONFIG_USB_UAS=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_PCI=y
CONFIG_USB_XHCI_PLATFORM=y
CONFIG_USE_PERCPU_NUMA_NODE_ID=y
CONFIG_VCHIQ_CDEV=y
CONFIG_VIDEO_CMDLINE=y
CONFIG_VIDEO_DEV=y

View File

@ -218,6 +218,7 @@ CONFIG_DMA_BCM2835=y
CONFIG_DMA_CMA=y
CONFIG_DMA_DIRECT_REMAP=y
CONFIG_DMA_ENGINE=y
# CONFIG_DMA_NUMA_CMA is not set
CONFIG_DMA_OF=y
CONFIG_DMA_OPS=y
CONFIG_DMA_SHARED_BUFFER=y
@ -264,6 +265,8 @@ CONFIG_FW_LOADER_SYSFS=y
CONFIG_GCC10_NO_ARRAY_BOUNDS=y
CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ARCH_NUMA=y
CONFIG_GENERIC_ARCH_NUMA_EMULATION=y
CONFIG_GENERIC_ARCH_TOPOLOGY=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
@ -409,6 +412,8 @@ CONFIG_MMU_LAZY_TLB_REFCOUNT=y
CONFIG_MODULES_USE_ELF_RELA=y
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y
CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y
CONFIG_NEED_SG_DMA_FLAGS=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_NET_EGRESS=y
@ -419,11 +424,15 @@ CONFIG_NET_SELFTESTS=y
CONFIG_NET_XGRESS=y
CONFIG_NLS=y
CONFIG_NLS_ASCII=y
CONFIG_NODES_SHIFT=4
CONFIG_NOP_USB_XCEIV=y
CONFIG_NO_HZ=y
CONFIG_NO_HZ_COMMON=y
CONFIG_NO_HZ_IDLE=y
CONFIG_NR_CPUS=4
CONFIG_NUMA=y
# CONFIG_NUMA_BALANCING is not set
CONFIG_NUMA_EMULATION=y
CONFIG_NVMEM=y
CONFIG_NVMEM_LAYOUTS=y
CONFIG_NVMEM_RASPBERRYPI_OTP=y
@ -441,6 +450,7 @@ CONFIG_OF_IOMMU=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OF_NUMA=y
CONFIG_OF_OVERLAY=y
CONFIG_OF_RESOLVE=y
CONFIG_PADATA=y
@ -610,6 +620,7 @@ CONFIG_USB_UAS=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_PCI=y
CONFIG_USB_XHCI_PLATFORM=y
CONFIG_USE_PERCPU_NUMA_NODE_ID=y
CONFIG_VCHIQ_CDEV=y
CONFIG_VIDEO_CMDLINE=y
CONFIG_VIDEO_DEV=y

View File

@ -45,7 +45,8 @@ $(eval $(call KernelPackage,sound-soc-bcm2835-i2s))
define KernelPackage/sound-soc-rpi-simple-soundcard
TITLE:=Support for Raspberry Pi simple soundcards
KCONFIG:= \
CONFIG_SND_RPI_SIMPLE_SOUNDCARD
CONFIG_SND_RPI_SIMPLE_SOUNDCARD \
CONFIG_SND_BCM2708_SOC_HIFIBERRY_ADC8X
FILES:= \
$(LINUX_DIR)/sound/soc/bcm/snd-soc-rpi-simple-soundcard.ko
AUTOLOAD:=$(call AutoLoad,68,snd-soc-rpi-simple-soundcard)
@ -526,6 +527,32 @@ endef
$(eval $(call KernelPackage,sound-soc-googlevoicehat))
define KernelPackage/sound-soc-hifiberry-adc
TITLE:=Support for HifiBerry ADC
KCONFIG:= \
CONFIG_SND_BCM2708_SOC_HIFIBERRY_ADC \
CONFIG_SND_RPI_HIFIBERRY_ADC \
CONFIG_SND_SOC_PCM186X_I2C
FILES:= \
$(LINUX_DIR)/sound/soc/bcm/snd-soc-hifiberry-adc.ko \
$(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm186x.ko \
$(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm186x-i2c.ko
AUTOLOAD:=$(call AutoLoad,68,snd-soc-pcm186x snd-soc-pcm186x-i2c \
snd-soc-hifiberry-adc)
DEPENDS:= \
kmod-sound-soc-bcm2835-i2s \
+kmod-i2c-bcm2835 \
+kmod-regmap-i2c
$(call AddDepends/sound)
endef
define KernelPackage/sound-soc-hifiberry-adc/description
This package contains support for HifiBerry ADC
endef
$(eval $(call KernelPackage,sound-soc-hifiberry-adc))
define KernelPackage/sound-soc-hifiberry-dac
TITLE:=Support for HifiBerry DAC
KCONFIG:= \

View File

@ -1,240 +0,0 @@
From c7b98a63328a749d44b7580ee9baafc5d417e48f Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Thu, 31 Aug 2023 11:45:38 +0100
Subject: [PATCH 0635/1085] drm/vc4: Assign LBM memory during atomic_flush.
Avoid double buffering LBM allocations by making the
allocation a single alloc per crtc at atomic_flush.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
drivers/gpu/drm/vc4/tests/vc4_test_lbm_size.c | 2 +-
drivers/gpu/drm/vc4/vc4_drv.h | 8 ++--
drivers/gpu/drm/vc4/vc4_hvs.c | 47 ++++++++++++++++++-
drivers/gpu/drm/vc4/vc4_plane.c | 38 +++------------
4 files changed, 58 insertions(+), 37 deletions(-)
--- a/drivers/gpu/drm/vc4/tests/vc4_test_lbm_size.c
+++ b/drivers/gpu/drm/vc4/tests/vc4_test_lbm_size.c
@@ -248,7 +248,7 @@ static void drm_vc4_test_vc4_lbm_size(st
ret = drm_atomic_check_only(state);
KUNIT_ASSERT_EQ(test, ret, 0);
- KUNIT_EXPECT_EQ(test, vc4_plane_state->lbm.size, params->expected_lbm_size);
+ KUNIT_EXPECT_EQ(test, vc4_plane_state->lbm_size, params->expected_lbm_size);
for (i = 0; i < 2; i++) {
KUNIT_EXPECT_EQ(test,
--- a/drivers/gpu/drm/vc4/vc4_drv.h
+++ b/drivers/gpu/drm/vc4/vc4_drv.h
@@ -417,6 +417,8 @@ struct vc4_plane_state {
u32 dlist_size; /* Number of dwords allocated for the display list */
u32 dlist_count; /* Number of used dwords in the display list. */
+ u32 lbm_size; /* LBM requirements for this plane */
+
/* Offset in the dlist to various words, for pageflip or
* cursor updates.
*/
@@ -442,9 +444,6 @@ struct vc4_plane_state {
bool is_unity;
bool is_yuv;
- /* Our allocation in LBM for temporary storage during scaling. */
- struct drm_mm_node lbm;
-
/* Our allocation in UPM for prefetching. */
struct drm_mm_node upm[DRM_FORMAT_MAX_PLANES];
@@ -635,6 +634,9 @@ struct vc4_crtc {
* access to that value.
*/
unsigned int current_hvs_channel;
+
+ /* @lbm: Our allocation in LBM for temporary storage during scaling. */
+ struct drm_mm_node lbm;
};
#define to_vc4_crtc(_crtc) \
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
@@ -1103,6 +1103,7 @@ int vc4_hvs_atomic_check(struct drm_crtc
struct drm_plane *plane;
const struct drm_plane_state *plane_state;
u32 dlist_count = 0;
+ u32 lbm_count = 0;
/* The pixelvalve can only feed one encoder (and encoders are
* 1:1 with connectors.)
@@ -1111,6 +1112,8 @@ int vc4_hvs_atomic_check(struct drm_crtc
return -EINVAL;
drm_atomic_crtc_state_for_each_plane_state(plane, plane_state, crtc_state) {
+ const struct vc4_plane_state *vc4_plane_state =
+ to_vc4_plane_state(plane_state);
u32 plane_dlist_count = vc4_plane_dlist_size(plane_state);
drm_dbg_driver(dev, "[CRTC:%d:%s] Found [PLANE:%d:%s] with DLIST size: %u\n",
@@ -1119,6 +1122,7 @@ int vc4_hvs_atomic_check(struct drm_crtc
plane_dlist_count);
dlist_count += plane_dlist_count;
+ lbm_count += vc4_plane_state->lbm_size;
}
dlist_count++; /* Account for SCALER_CTL0_END. */
@@ -1132,6 +1136,8 @@ int vc4_hvs_atomic_check(struct drm_crtc
vc4_state->mm = alloc;
+ /* FIXME: Check total lbm allocation here */
+
return vc4_hvs_gamma_check(crtc, state);
}
@@ -1246,7 +1252,10 @@ void vc4_hvs_atomic_flush(struct drm_crt
bool debug_dump_regs = false;
bool enable_bg_fill = false;
u32 __iomem *dlist_start, *dlist_next;
+ unsigned long irqflags;
unsigned int zpos = 0;
+ u32 lbm_offset = 0;
+ u32 lbm_size = 0;
bool found = false;
int idx;
@@ -1265,6 +1274,35 @@ void vc4_hvs_atomic_flush(struct drm_crt
vc4_hvs_dump_state(hvs);
}
+ drm_atomic_crtc_for_each_plane(plane, crtc) {
+ vc4_plane_state = to_vc4_plane_state(plane->state);
+ lbm_size += vc4_plane_state->lbm_size;
+ }
+
+ if (drm_mm_node_allocated(&vc4_crtc->lbm)) {
+ spin_lock_irqsave(&vc4_crtc->irq_lock, irqflags);
+ drm_mm_remove_node(&vc4_crtc->lbm);
+ spin_unlock_irqrestore(&vc4_crtc->irq_lock, irqflags);
+ }
+
+ if (lbm_size) {
+ int ret;
+
+ spin_lock_irqsave(&vc4_crtc->irq_lock, irqflags);
+ ret = drm_mm_insert_node_generic(&vc4->hvs->lbm_mm,
+ &vc4_crtc->lbm,
+ lbm_size, 1,
+ 0, 0);
+ spin_unlock_irqrestore(&vc4_crtc->irq_lock, irqflags);
+
+ if (ret) {
+ pr_err("Failed to allocate LBM ret %d\n", ret);
+ return;
+ }
+ }
+
+ lbm_offset = vc4_crtc->lbm.start;
+
dlist_start = vc4->hvs->dlist + vc4_state->mm->mm_node.start;
dlist_next = dlist_start;
@@ -1276,6 +1314,8 @@ void vc4_hvs_atomic_flush(struct drm_crt
if (plane->state->normalized_zpos != zpos)
continue;
+ vc4_plane_state = to_vc4_plane_state(plane->state);
+
/* Is this the first active plane? */
if (dlist_next == dlist_start) {
/* We need to enable background fill when a plane
@@ -1286,10 +1326,15 @@ void vc4_hvs_atomic_flush(struct drm_crt
* already needs it or all planes on top blend from
* the first or a lower plane.
*/
- vc4_plane_state = to_vc4_plane_state(plane->state);
enable_bg_fill = vc4_plane_state->needs_bg_fill;
}
+ if (vc4_plane_state->lbm_size) {
+ vc4_plane_state->dlist[vc4_plane_state->lbm_offset] =
+ lbm_offset;
+ lbm_offset += vc4_plane_state->lbm_size;
+ }
+
dlist_next += vc4_plane_write_dlist(plane, dlist_next);
found = true;
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
@@ -288,7 +288,6 @@ struct drm_plane_state *vc4_plane_duplic
if (!vc4_state)
return NULL;
- memset(&vc4_state->lbm, 0, sizeof(vc4_state->lbm));
memset(&vc4_state->upm, 0, sizeof(vc4_state->upm));
for (i = 0; i < DRM_FORMAT_MAX_PLANES; i++)
@@ -320,14 +319,6 @@ void vc4_plane_destroy_state(struct drm_
struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
unsigned int i;
- if (drm_mm_node_allocated(&vc4_state->lbm)) {
- unsigned long irqflags;
-
- spin_lock_irqsave(&hvs->mm_lock, irqflags);
- drm_mm_remove_node(&vc4_state->lbm);
- spin_unlock_irqrestore(&hvs->mm_lock, irqflags);
- }
-
for (i = 0; i < DRM_FORMAT_MAX_PLANES; i++) {
unsigned long irqflags;
@@ -903,12 +894,13 @@ static int vc4_plane_allocate_lbm(struct
struct vc4_dev *vc4 = to_vc4_dev(drm);
struct drm_plane *plane = state->plane;
struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
- unsigned long irqflags;
u32 lbm_size;
lbm_size = vc4_lbm_size(state);
- if (!lbm_size)
+ if (!lbm_size) {
+ vc4_state->lbm_size = 0;
return 0;
+ }
/*
* NOTE: BCM2712 doesn't need to be aligned, since the size
@@ -925,28 +917,10 @@ static int vc4_plane_allocate_lbm(struct
if (WARN_ON(!vc4_state->lbm_offset))
return -EINVAL;
- /* Allocate the LBM memory that the HVS will use for temporary
- * storage due to our scaling/format conversion.
+ /* FIXME: Add loop here that ensures that the total LBM assigned in this
+ * state is less than the total lbm size
*/
- if (!drm_mm_node_allocated(&vc4_state->lbm)) {
- int ret;
-
- spin_lock_irqsave(&vc4->hvs->mm_lock, irqflags);
- ret = drm_mm_insert_node_generic(&vc4->hvs->lbm_mm,
- &vc4_state->lbm,
- lbm_size, 1,
- 0, 0);
- spin_unlock_irqrestore(&vc4->hvs->mm_lock, irqflags);
-
- if (ret) {
- drm_err(drm, "Failed to allocate LBM entry: %d\n", ret);
- return ret;
- }
- } else {
- WARN_ON_ONCE(lbm_size != vc4_state->lbm.size);
- }
-
- vc4_state->dlist[vc4_state->lbm_offset] = vc4_state->lbm.start;
+ vc4_state->lbm_size = lbm_size;
return 0;
}

View File

@ -25,7 +25,7 @@ Signed-off-by: Dom Cobley <popcornmix@gmail.com>
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
@@ -1349,27 +1349,25 @@ void vc4_hvs_atomic_flush(struct drm_crt
@@ -1304,27 +1304,25 @@ void vc4_hvs_atomic_flush(struct drm_crt
WARN_ON(!vc4_state->mm);
WARN_ON_ONCE(dlist_next - dlist_start != vc4_state->mm->mm_node.size);

View File

@ -22,7 +22,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
@@ -1447,9 +1447,9 @@ static int vc4_plane_mode_set(struct drm
@@ -1473,9 +1473,9 @@ static int vc4_plane_mode_set(struct drm
vc4_state->ptr0_offset[0] = vc4_state->dlist_count;
for (i = 0; i < num_planes; i++) {
@ -34,7 +34,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
}
/* Pointer Context Word 0/1/2: Written by the HVS */
@@ -1842,9 +1842,8 @@ static int vc6_plane_mode_set(struct drm
@@ -1868,9 +1868,8 @@ static int vc6_plane_mode_set(struct drm
* TODO: This only covers Raster Scan Order planes
*/
for (i = 0; i < num_planes; i++) {

View File

@ -50,7 +50,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
/* The filter kernel is composed of dwords each containing 3 9-bit
* signed integers packed next to each other.
*/
@@ -1596,6 +1626,8 @@ int vc4_hvs_debugfs_init(struct drm_mino
@@ -1551,6 +1581,8 @@ int vc4_hvs_debugfs_init(struct drm_mino
drm_debugfs_add_file(drm, "hvs_underrun", vc4_hvs_debugfs_underrun, NULL);

View File

@ -25,7 +25,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
@@ -1108,6 +1108,12 @@ static int vc4_plane_mode_set(struct drm
@@ -1134,6 +1134,12 @@ static int vc4_plane_mode_set(struct drm
width = vc4_state->src_w[0] >> 16;
height = vc4_state->src_h[0] >> 16;
@ -38,7 +38,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
/* SCL1 is used for Cb/Cr scaling of planar formats. For RGB
* and 4:4:4, scl1 should be set to scl0 so both channels of
* the scaler do the same thing. For YUV, the Y plane needs
@@ -1623,6 +1629,12 @@ static int vc6_plane_mode_set(struct drm
@@ -1649,6 +1655,12 @@ static int vc6_plane_mode_set(struct drm
width = vc4_state->src_w[0] >> 16;
height = vc4_state->src_h[0] >> 16;
@ -51,7 +51,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
/* SCL1 is used for Cb/Cr scaling of planar formats. For RGB
* and 4:4:4, scl1 should be set to scl0 so both channels of
* the scaler do the same thing. For YUV, the Y plane needs
@@ -1994,6 +2006,9 @@ int vc4_plane_atomic_check(struct drm_pl
@@ -2020,6 +2032,9 @@ int vc4_plane_atomic_check(struct drm_pl
if (ret)
return ret;

View File

@ -23,7 +23,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
--- a/drivers/gpu/drm/vc4/vc4_drv.h
+++ b/drivers/gpu/drm/vc4/vc4_drv.h
@@ -667,6 +667,7 @@ struct vc4_hvs_dlist_allocation {
@@ -665,6 +665,7 @@ struct vc4_hvs_dlist_allocation {
struct drm_mm_node mm_node;
unsigned int channel;
u8 target_frame_count;
@ -46,7 +46,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
spin_lock_irqsave(&hvs->mm_lock, flags);
vc4_hvs_free_dlist_entry_locked(hvs, alloc);
spin_unlock_irqrestore(&hvs->mm_lock, flags);
@@ -1201,6 +1204,7 @@ static void vc4_hvs_install_dlist(struct
@@ -1195,6 +1198,7 @@ static void vc4_hvs_install_dlist(struct
return;
WARN_ON(!vc4_state->mm);

View File

@ -17,7 +17,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
--- a/drivers/gpu/drm/vc4/vc4_drv.h
+++ b/drivers/gpu/drm/vc4/vc4_drv.h
@@ -549,6 +549,7 @@ struct vc4_crtc_data {
@@ -550,6 +550,7 @@ struct vc4_crtc_data {
struct vc4_txp_data {
struct vc4_crtc_data base;
enum vc4_encoder_type encoder_type;

View File

@ -54,7 +54,7 @@ Signed-off-by: Dom Cobley <popcornmix@gmail.com>
unsigned int irq;
@@ -714,6 +715,12 @@ struct vc4_crtc_state {
@@ -712,6 +713,12 @@ struct vc4_crtc_state {
writel(val, hvs->regs + (offset)); \
} while (0)
@ -244,7 +244,7 @@ Signed-off-by: Dom Cobley <popcornmix@gmail.com>
out:
drm_dev_exit(idx);
@@ -1227,8 +1286,8 @@ static void vc4_hvs_install_dlist(struct
@@ -1221,8 +1280,8 @@ static void vc4_hvs_install_dlist(struct
if (vc4->gen >= VC4_GEN_6)
HVS_WRITE(SCALER6_DISPX_LPTRS(vc4_state->assigned_channel),
@ -255,7 +255,7 @@ Signed-off-by: Dom Cobley <popcornmix@gmail.com>
else
HVS_WRITE(SCALER_DISPLISTX(vc4_state->assigned_channel),
vc4_state->mm->mm_node.start);
@@ -1427,11 +1486,11 @@ void vc4_hvs_atomic_flush(struct drm_crt
@@ -1382,11 +1441,11 @@ void vc4_hvs_atomic_flush(struct drm_crt
if (enable_bg_fill)
HVS_WRITE(SCALER6_DISPX_CTRL1(channel),
HVS_READ(SCALER6_DISPX_CTRL1(channel)) |
@ -269,7 +269,7 @@ Signed-off-by: Dom Cobley <popcornmix@gmail.com>
} else {
/* we can actually run with a lower core clock when background
* fill is enabled on VC4_GEN_5 so leave it enabled always.
@@ -1701,7 +1760,7 @@ struct vc4_hvs *__vc4_hvs_alloc(struct v
@@ -1656,7 +1715,7 @@ struct vc4_hvs *__vc4_hvs_alloc(struct v
* access a register. Use a plausible size then.
*/
if (!kunit_get_current_test())
@ -278,7 +278,7 @@ Signed-off-by: Dom Cobley <popcornmix@gmail.com>
else
dlist_size = 4096;
@@ -1935,14 +1994,17 @@ static int vc6_hvs_hw_init(struct vc4_hv
@@ -1890,14 +1949,17 @@ static int vc6_hvs_hw_init(struct vc4_hv
const struct vc6_csc_coeff_entry *coeffs;
unsigned int i;
@ -300,7 +300,7 @@ Signed-off-by: Dom Cobley <popcornmix@gmail.com>
for (i = 0; i < 6; i++) {
coeffs = &csc_coeffs[i / 3][i % 3];
@@ -2041,21 +2103,21 @@ static int vc4_hvs_cob_init(struct vc4_h
@@ -1996,21 +2058,21 @@ static int vc4_hvs_cob_init(struct vc4_h
reg = 0;
top = 3840;
@ -325,7 +325,7 @@ Signed-off-by: Dom Cobley <popcornmix@gmail.com>
VC4_SET_FIELD(top, SCALER6_DISPX_COB_TOP) |
VC4_SET_FIELD(base, SCALER6_DISPX_COB_BASE));
break;
@@ -2086,7 +2148,10 @@ static int vc4_hvs_bind(struct device *d
@@ -2041,7 +2103,10 @@ static int vc4_hvs_bind(struct device *d
hvs->regset.base = hvs->regs;
@ -337,7 +337,7 @@ Signed-off-by: Dom Cobley <popcornmix@gmail.com>
hvs->regset.regs = vc6_hvs_regs;
hvs->regset.nregs = ARRAY_SIZE(vc6_hvs_regs);
} else {
@@ -2253,6 +2318,7 @@ static void vc4_hvs_dev_remove(struct pl
@@ -2208,6 +2273,7 @@ static void vc4_hvs_dev_remove(struct pl
static const struct of_device_id vc4_hvs_dt_match[] = {
{ .compatible = "brcm,bcm2711-hvs" },
{ .compatible = "brcm,bcm2712-hvs" },

View File

@ -16,7 +16,7 @@ Signed-off-by: Dom Cobley <popcornmix@gmail.com>
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
@@ -1933,6 +1933,17 @@ static int vc4_hvs_hw_init(struct vc4_hv
@@ -1888,6 +1888,17 @@ static int vc4_hvs_hw_init(struct vc4_hv
#define CFC1_N_MA_CSC_COEFF_C23(x) (0xa03c + ((x) * 0x3000))
#define CFC1_N_MA_CSC_COEFF_C24(x) (0xa040 + ((x) * 0x3000))
@ -34,7 +34,7 @@ Signed-off-by: Dom Cobley <popcornmix@gmail.com>
/* 4 S2.22 multiplication factors, and 1 S9.15 addititive element for each of 3
* output components
*/
@@ -2003,31 +2014,43 @@ static int vc6_hvs_hw_init(struct vc4_hv
@@ -1958,31 +1969,43 @@ static int vc6_hvs_hw_init(struct vc4_hv
HVS_WRITE(SCALER6(PRI_MAP0), 0xffffffff);
HVS_WRITE(SCALER6(PRI_MAP1), 0xffffffff);
@ -104,7 +104,7 @@ Signed-off-by: Dom Cobley <popcornmix@gmail.com>
return 0;
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
@@ -1054,6 +1054,12 @@ static u32 vc4_hvs5_get_alpha_blend_mode
@@ -1080,6 +1080,12 @@ static u32 vc4_hvs5_get_alpha_blend_mode
WARN_ON_ONCE(vc4->gen != VC4_GEN_5 && vc4->gen != VC4_GEN_6);
@ -117,7 +117,7 @@ Signed-off-by: Dom Cobley <popcornmix@gmail.com>
if (!state->fb->format->has_alpha)
return VC4_SET_FIELD(SCALER5_CTL2_ALPHA_MODE_FIXED,
SCALER5_CTL2_ALPHA_MODE);
@@ -1569,14 +1575,13 @@ static int vc4_plane_mode_set(struct drm
@@ -1595,14 +1601,13 @@ static int vc4_plane_mode_set(struct drm
static u32 vc6_plane_get_csc_mode(struct vc4_plane_state *vc4_state)
{
struct drm_plane_state *state = &vc4_state->base;
@ -133,7 +133,7 @@ Signed-off-by: Dom Cobley <popcornmix@gmail.com>
/* CSC pre-loaded with:
* 0 = BT601 limited range
* 1 = BT709 limited range
@@ -1590,8 +1595,15 @@ static u32 vc6_plane_get_csc_mode(struct
@@ -1616,8 +1621,15 @@ static u32 vc6_plane_get_csc_mode(struct
if (color_range > DRM_COLOR_YCBCR_FULL_RANGE)
color_range = DRM_COLOR_YCBCR_LIMITED_RANGE;

View File

@ -17,7 +17,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
@@ -1877,7 +1877,7 @@ static int vc6_plane_mode_set(struct drm
@@ -1903,7 +1903,7 @@ static int vc6_plane_mode_set(struct drm
* The UPM buffer will be allocated in
* vc6_plane_allocate_upm().
*/
@ -26,7 +26,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
SCALER6_PTR0_UPPER_ADDR));
/* Pointer Word 1 */
@@ -2079,7 +2079,8 @@ void vc4_plane_async_set_fb(struct drm_p
@@ -2105,7 +2105,8 @@ void vc4_plane_async_set_fb(struct drm_p
{
struct vc4_plane_state *vc4_state = to_vc4_plane_state(plane->state);
struct drm_gem_dma_object *bo = drm_fb_dma_get_gem_obj(fb, 0);
@ -36,7 +36,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
int idx;
if (!drm_dev_enter(plane->dev, &idx))
@@ -2089,19 +2090,38 @@ void vc4_plane_async_set_fb(struct drm_p
@@ -2115,19 +2116,38 @@ void vc4_plane_async_set_fb(struct drm_p
* because this is only called on the primary plane.
*/
WARN_ON_ONCE(plane->state->crtc_x < 0 || plane->state->crtc_y < 0);

View File

@ -19,7 +19,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
@@ -2205,11 +2205,15 @@ static int vc4_plane_atomic_async_check(
@@ -2231,11 +2231,15 @@ static int vc4_plane_atomic_async_check(
{
struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state,
plane);

View File

@ -16,7 +16,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
@@ -1114,7 +1114,7 @@ static int vc4_plane_mode_set(struct drm
@@ -1140,7 +1140,7 @@ static int vc4_plane_mode_set(struct drm
width = vc4_state->src_w[0] >> 16;
height = vc4_state->src_h[0] >> 16;
@ -25,7 +25,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
/* 0 source size probably means the plane is offscreen */
vc4_state->dlist_initialized = 1;
return 0;
@@ -1641,8 +1641,10 @@ static int vc6_plane_mode_set(struct drm
@@ -1667,8 +1667,10 @@ static int vc6_plane_mode_set(struct drm
width = vc4_state->src_w[0] >> 16;
height = vc4_state->src_h[0] >> 16;
@ -38,7 +38,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
vc4_state->dlist_initialized = 1;
return 0;
}
@@ -2018,7 +2020,8 @@ int vc4_plane_atomic_check(struct drm_pl
@@ -2044,7 +2046,8 @@ int vc4_plane_atomic_check(struct drm_pl
if (ret)
return ret;

View File

@ -16,7 +16,7 @@ Signed-off-by: Dom Cobley <popcornmix@gmail.com>
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
@@ -1079,6 +1079,21 @@ static u32 vc4_hvs5_get_alpha_blend_mode
@@ -1105,6 +1105,21 @@ static u32 vc4_hvs5_get_alpha_blend_mode
}
}
@ -38,7 +38,7 @@ Signed-off-by: Dom Cobley <popcornmix@gmail.com>
/* Writes out a full display list for an active plane to the plane's
* private dlist state.
*/
@@ -1824,7 +1839,7 @@ static int vc6_plane_mode_set(struct drm
@@ -1850,7 +1865,7 @@ static int vc6_plane_mode_set(struct drm
vc4_dlist_write(vc4_state,
SCALER6_CTL0_VALID |
VC4_SET_FIELD(tiling, SCALER6_CTL0_ADDR_MODE) |

View File

@ -18,7 +18,7 @@ Signed-off-by: Dom Cobley <popcornmix@gmail.com>
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
@@ -733,7 +733,7 @@ static unsigned int vc4_lbm_channel_size
@@ -742,7 +742,7 @@ static unsigned int vc4_lbm_channel_size
if (!components)
return 0;

View File

@ -19,12 +19,12 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
@@ -1406,7 +1406,7 @@ void vc4_hvs_atomic_flush(struct drm_crt
@@ -1400,7 +1400,7 @@ void vc4_hvs_atomic_flush(struct drm_crt
struct drm_plane *plane;
struct vc4_plane_state *vc4_plane_state;
bool debug_dump_regs = false;
- bool enable_bg_fill = false;
+ bool enable_bg_fill = true;
u32 __iomem *dlist_start, *dlist_next;
unsigned long irqflags;
unsigned int zpos = 0;
bool found = false;

View File

@ -50,7 +50,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
}
--- a/drivers/gpu/drm/vc4/vc4_drv.h
+++ b/drivers/gpu/drm/vc4/vc4_drv.h
@@ -503,6 +503,7 @@ struct vc4_encoder {
@@ -504,6 +504,7 @@ struct vc4_encoder {
void (*post_crtc_disable)(struct drm_encoder *encoder, struct drm_atomic_state *state);
void (*post_crtc_powerdown)(struct drm_encoder *encoder, struct drm_atomic_state *state);

View File

@ -1,35 +0,0 @@
From 8e40644b272a4ddc9d3b58b4373dffcef02d1b63 Mon Sep 17 00:00:00 2001
From: Jonathan Bell <jonathan@raspberrypi.com>
Date: Tue, 4 Jun 2024 13:21:47 +0100
Subject: [PATCH 1115/1135] mmc: sd: halt CQHCI before issuing a cache flush
command
SD cards perform cache flushes by a CMD49 extension register write -
which needs to be started from the SDHCI command/argument registers and
not a CQHCI slot.
Host access to SD/CQ registers should be exclusive to one or the other,
so issue a halt before doing the command.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
---
drivers/mmc/core/sd.c | 8 ++++++++
1 file changed, 8 insertions(+)
--- a/drivers/mmc/core/sd.c
+++ b/drivers/mmc/core/sd.c
@@ -1265,6 +1265,14 @@ static int sd_flush_cache(struct mmc_hos
reg_buf = card->ext_reg_buf;
/*
+ * Flushing requires sending CMD49 (adtc), which can't be done as a DCMD
+ * and conflicts with CQHCI - temporarily turn CQE off to use the SDHCI
+ * command/argument registers.
+ */
+ if (host->cqe_on)
+ host->cqe_ops->cqe_off(host);
+
+ /*
* Set Flush Cache at bit 0 in the performance enhancement register at
* 261 bytes offset.
*/

View File

@ -60,7 +60,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
}
card->ext_perf.fno = fno;
@@ -1383,6 +1384,7 @@ retry:
@@ -1375,6 +1376,7 @@ retry:
card->ocr = ocr;
card->type = MMC_TYPE_SD;

View File

@ -135,7 +135,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
},
--- a/drivers/gpu/drm/vc4/vc4_drv.h
+++ b/drivers/gpu/drm/vc4/vc4_drv.h
@@ -569,6 +569,8 @@ struct vc4_pv_data {
@@ -570,6 +570,8 @@ struct vc4_pv_data {
/* Number of pixels output per clock period */
u8 pixels_per_clock;

View File

@ -0,0 +1,27 @@
From ad2babc6596ba4f500454a4eaa607f3b49fcbcbe Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.com>
Date: Wed, 7 Aug 2024 17:41:31 +0100
Subject: [PATCH 1218/1350] Bluetooth: hci_sync: Fix crash on NULL parent
Although later functions can handle a NULL fwnode, fwnode can't handle
being passed a NULL pointer.
See: https://github.com/raspberrypi/linux/issues/6305
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
---
net/bluetooth/hci_sync.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--- a/net/bluetooth/hci_sync.c
+++ b/net/bluetooth/hci_sync.c
@@ -4861,7 +4861,8 @@ static const struct {
*/
static int hci_dev_setup_sync(struct hci_dev *hdev)
{
- struct fwnode_handle *fwnode = dev_fwnode(hdev->dev.parent);
+ struct fwnode_handle *fwnode =
+ hdev->dev.parent ? dev_fwnode(hdev->dev.parent) : NULL;
int ret = 0;
bool invalid_bdaddr;
size_t i;

View File

@ -0,0 +1,96 @@
From 209e8a3e6646f25abb352fd5a8a4c2e855b1e952 Mon Sep 17 00:00:00 2001
From: Adrian Figueroa <elagil@takanome.de>
Date: Wed, 14 Aug 2024 20:00:12 +0200
Subject: [PATCH 1219/1350] overlays: add overlay for generic I2S clock-master
DAC
Adds an overlay for supporting a generic I2S DAC that
acts as the clock master on the bus.
The data format is 32 bit stereo.
Signed-off-by: Adrian Figueroa <elagil@takanome.de>
---
arch/arm/boot/dts/overlays/Makefile | 1 +
arch/arm/boot/dts/overlays/README | 6 +++
.../dts/overlays/i2s-master-dac-overlay.dts | 50 +++++++++++++++++++
3 files changed, 57 insertions(+)
create mode 100644 arch/arm/boot/dts/overlays/i2s-master-dac-overlay.dts
--- a/arch/arm/boot/dts/overlays/Makefile
+++ b/arch/arm/boot/dts/overlays/Makefile
@@ -125,6 +125,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
i2c6.dtbo \
i2s-dac.dtbo \
i2s-gpio28-31.dtbo \
+ i2s-master-dac.dtbo \
ilitek251x.dtbo \
imx219.dtbo \
imx258.dtbo \
--- a/arch/arm/boot/dts/overlays/README
+++ b/arch/arm/boot/dts/overlays/README
@@ -2633,6 +2633,12 @@ Load: dtoverlay=i2s-gpio28-31
Params: <None>
+Name: i2s-master-dac
+Info: Configures a generic I2S DAC soundcard that acts as a clock master.
+Load: dtoverlay=i2s-master-dac
+Params: <None>
+
+
Name: ilitek251x
Info: Enables I2C connected Ilitek 251x multiple touch controller using
GPIO 4 (pin 7 on GPIO header) for interrupt.
--- /dev/null
+++ b/arch/arm/boot/dts/overlays/i2s-master-dac-overlay.dts
@@ -0,0 +1,50 @@
+// Definitions for a generic I2S DAC that acts as clock master on the bus.
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "brcm,bcm2835";
+
+ fragment@0 {
+ target = <&i2s_clk_consumer>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@1 {
+ target-path = "/";
+ __overlay__ {
+ codec_bare: codec_bare {
+ compatible = "linux,spdif-dit";
+ #sound-dai-cells = <0>;
+ status = "okay";
+ };
+ };
+ };
+
+ fragment@2 {
+ target = <&sound>;
+ __overlay__ {
+ compatible = "simple-audio-card";
+ i2s-controller = <&i2s_clk_consumer>;
+ status = "okay";
+
+ simple-audio-card,name = "i2s-master-dac";
+ simple-audio-card,format = "i2s";
+
+ simple-audio-card,bitclock-master = <&snd_codec>;
+ simple-audio-card,frame-master = <&snd_codec>;
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s_clk_consumer>;
+ dai-tdm-slot-num = <2>;
+ dai-tdm-slot-width = <32>;
+ };
+
+ snd_codec: simple-audio-card,codec {
+ sound-dai = <&codec_bare>;
+ };
+ };
+ };
+};

View File

@ -0,0 +1,275 @@
From 15ca476264094b25d0a210109a061192a468117b Mon Sep 17 00:00:00 2001
From: j-schambacher <joerg@hifiberry.com>
Date: Thu, 15 Aug 2024 16:08:14 +0200
Subject: [PATCH 1220/1350] ASoC: DACplusADCPro - put ADC control definitions
in header file
For easier maintenance all ADC ALSA-Kcontrols and the respective
definitions are placed into a new header file that is included
by the existing DAC+ADC Pro driver and a new, soon to be
released ADC only board driver using the same controls.
Signed-off-by: j-schambacher <joerg@hifiberry.com>
---
sound/soc/bcm/hifiberry_adc_controls.h | 128 ++++++++++++++++++++++++
sound/soc/bcm/hifiberry_dacplusadcpro.c | 110 +-------------------
2 files changed, 129 insertions(+), 109 deletions(-)
create mode 100644 sound/soc/bcm/hifiberry_adc_controls.h
--- /dev/null
+++ b/sound/soc/bcm/hifiberry_adc_controls.h
@@ -0,0 +1,128 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * ALSA mixer/Kcontrol definitions common to HiFiBerry ADCs
+ *
+ * used by DAC+ADC Pro (hifiberry_dacplusadcpro.c),
+ * ADC (hifiberry_adc.c)
+ *
+ * Author: Joerg Schambacher <joerg@hifiberry.com>
+ * Copyright 2024
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ */
+
+static const unsigned int pcm186x_adc_input_channel_sel_value[] = {
+ 0x00, 0x01, 0x02, 0x03, 0x10
+};
+
+static const char * const pcm186x_adcl_input_channel_sel_text[] = {
+ "No Select",
+ "VINL1[SE]", /* Default for ADCL */
+ "VINL2[SE]",
+ "VINL2[SE] + VINL1[SE]",
+ "{VIN1P, VIN1M}[DIFF]"
+};
+
+static const char * const pcm186x_adcr_input_channel_sel_text[] = {
+ "No Select",
+ "VINR1[SE]", /* Default for ADCR */
+ "VINR2[SE]",
+ "VINR2[SE] + VINR1[SE]",
+ "{VIN2P, VIN2M}[DIFF]"
+};
+
+static const struct soc_enum pcm186x_adc_input_channel_sel[] = {
+ SOC_VALUE_ENUM_SINGLE(PCM186X_ADC1_INPUT_SEL_L, 0,
+ PCM186X_ADC_INPUT_SEL_MASK,
+ ARRAY_SIZE(pcm186x_adcl_input_channel_sel_text),
+ pcm186x_adcl_input_channel_sel_text,
+ pcm186x_adc_input_channel_sel_value),
+ SOC_VALUE_ENUM_SINGLE(PCM186X_ADC1_INPUT_SEL_R, 0,
+ PCM186X_ADC_INPUT_SEL_MASK,
+ ARRAY_SIZE(pcm186x_adcr_input_channel_sel_text),
+ pcm186x_adcr_input_channel_sel_text,
+ pcm186x_adc_input_channel_sel_value),
+};
+
+static const unsigned int pcm186x_mic_bias_sel_value[] = {
+ 0x00, 0x01, 0x11
+};
+
+static const char * const pcm186x_mic_bias_sel_text[] = {
+ "Mic Bias off",
+ "Mic Bias on",
+ "Mic Bias with Bypass Resistor"
+};
+
+static const struct soc_enum pcm186x_mic_bias_sel[] = {
+ SOC_VALUE_ENUM_SINGLE(PCM186X_MIC_BIAS_CTRL, 0,
+ GENMASK(4, 0),
+ ARRAY_SIZE(pcm186x_mic_bias_sel_text),
+ pcm186x_mic_bias_sel_text,
+ pcm186x_mic_bias_sel_value),
+};
+
+static const unsigned int pcm186x_gain_sel_value[] = {
+ 0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,
+ 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,
+ 0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
+ 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+ 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
+ 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
+ 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
+ 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
+ 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
+ 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
+ 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
+ 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
+ 0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
+ 0x50
+};
+
+static const char * const pcm186x_gain_sel_text[] = {
+ "-12.0dB", "-11.5dB", "-11.0dB", "-10.5dB", "-10.0dB", "-9.5dB",
+ "-9.0dB", "-8.5dB", "-8.0dB", "-7.5dB", "-7.0dB", "-6.5dB",
+ "-6.0dB", "-5.5dB", "-5.0dB", "-4.5dB", "-4.0dB", "-3.5dB",
+ "-3.0dB", "-2.5dB", "-2.0dB", "-1.5dB", "-1.0dB", "-0.5dB",
+ "0.0dB", "0.5dB", "1.0dB", "1.5dB", "2.0dB", "2.5dB",
+ "3.0dB", "3.5dB", "4.0dB", "4.5dB", "5.0dB", "5.5dB",
+ "6.0dB", "6.5dB", "7.0dB", "7.5dB", "8.0dB", "8.5dB",
+ "9.0dB", "9.5dB", "10.0dB", "10.5dB", "11.0dB", "11.5dB",
+ "12.0dB", "12.5dB", "13.0dB", "13.5dB", "14.0dB", "14.5dB",
+ "15.0dB", "15.5dB", "16.0dB", "16.5dB", "17.0dB", "17.5dB",
+ "18.0dB", "18.5dB", "19.0dB", "19.5dB", "20.0dB", "20.5dB",
+ "21.0dB", "21.5dB", "22.0dB", "22.5dB", "23.0dB", "23.5dB",
+ "24.0dB", "24.5dB", "25.0dB", "25.5dB", "26.0dB", "26.5dB",
+ "27.0dB", "27.5dB", "28.0dB", "28.5dB", "29.0dB", "29.5dB",
+ "30.0dB", "30.5dB", "31.0dB", "31.5dB", "32.0dB", "32.5dB",
+ "33.0dB", "33.5dB", "34.0dB", "34.5dB", "35.0dB", "35.5dB",
+ "36.0dB", "36.5dB", "37.0dB", "37.5dB", "38.0dB", "38.5dB",
+ "39.0dB", "39.5dB", "40.0dB"};
+
+static const struct soc_enum pcm186x_gain_sel[] = {
+ SOC_VALUE_ENUM_SINGLE(PCM186X_PGA_VAL_CH1_L, 0,
+ 0xff,
+ ARRAY_SIZE(pcm186x_gain_sel_text),
+ pcm186x_gain_sel_text,
+ pcm186x_gain_sel_value),
+ SOC_VALUE_ENUM_SINGLE(PCM186X_PGA_VAL_CH1_R, 0,
+ 0xff,
+ ARRAY_SIZE(pcm186x_gain_sel_text),
+ pcm186x_gain_sel_text,
+ pcm186x_gain_sel_value),
+};
+
+static const struct snd_kcontrol_new pcm1863_snd_controls_card[] = {
+ SOC_ENUM("ADC Left Input", pcm186x_adc_input_channel_sel[0]),
+ SOC_ENUM("ADC Right Input", pcm186x_adc_input_channel_sel[1]),
+ SOC_ENUM("ADC Mic Bias", pcm186x_mic_bias_sel),
+ SOC_ENUM("PGA Gain Left", pcm186x_gain_sel[0]),
+ SOC_ENUM("PGA Gain Right", pcm186x_gain_sel[1]),
+};
--- a/sound/soc/bcm/hifiberry_dacplusadcpro.c
+++ b/sound/soc/bcm/hifiberry_dacplusadcpro.c
@@ -37,6 +37,7 @@
#include "../codecs/pcm512x.h"
#include "../codecs/pcm186x.h"
+#include "hifiberry_adc_controls.h"
#define HIFIBERRY_DACPRO_NOCLOCK 0
#define HIFIBERRY_DACPRO_CLK44EN 1
@@ -57,115 +58,6 @@ static bool snd_rpi_hifiberry_is_dacpro;
static bool digital_gain_0db_limit = true;
static bool leds_off;
-static const unsigned int pcm186x_adc_input_channel_sel_value[] = {
- 0x00, 0x01, 0x02, 0x03, 0x10
-};
-
-static const char * const pcm186x_adcl_input_channel_sel_text[] = {
- "No Select",
- "VINL1[SE]", /* Default for ADCL */
- "VINL2[SE]",
- "VINL2[SE] + VINL1[SE]",
- "{VIN1P, VIN1M}[DIFF]"
-};
-
-static const char * const pcm186x_adcr_input_channel_sel_text[] = {
- "No Select",
- "VINR1[SE]", /* Default for ADCR */
- "VINR2[SE]",
- "VINR2[SE] + VINR1[SE]",
- "{VIN2P, VIN2M}[DIFF]"
-};
-
-static const struct soc_enum pcm186x_adc_input_channel_sel[] = {
- SOC_VALUE_ENUM_SINGLE(PCM186X_ADC1_INPUT_SEL_L, 0,
- PCM186X_ADC_INPUT_SEL_MASK,
- ARRAY_SIZE(pcm186x_adcl_input_channel_sel_text),
- pcm186x_adcl_input_channel_sel_text,
- pcm186x_adc_input_channel_sel_value),
- SOC_VALUE_ENUM_SINGLE(PCM186X_ADC1_INPUT_SEL_R, 0,
- PCM186X_ADC_INPUT_SEL_MASK,
- ARRAY_SIZE(pcm186x_adcr_input_channel_sel_text),
- pcm186x_adcr_input_channel_sel_text,
- pcm186x_adc_input_channel_sel_value),
-};
-
-static const unsigned int pcm186x_mic_bias_sel_value[] = {
- 0x00, 0x01, 0x11
-};
-
-static const char * const pcm186x_mic_bias_sel_text[] = {
- "Mic Bias off",
- "Mic Bias on",
- "Mic Bias with Bypass Resistor"
-};
-
-static const struct soc_enum pcm186x_mic_bias_sel[] = {
- SOC_VALUE_ENUM_SINGLE(PCM186X_MIC_BIAS_CTRL, 0,
- GENMASK(4, 0),
- ARRAY_SIZE(pcm186x_mic_bias_sel_text),
- pcm186x_mic_bias_sel_text,
- pcm186x_mic_bias_sel_value),
-};
-
-static const unsigned int pcm186x_gain_sel_value[] = {
- 0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,
- 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,
- 0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
- 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
- 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
- 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
- 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
- 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
- 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
- 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
- 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
- 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
- 0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
- 0x50
-};
-
-static const char * const pcm186x_gain_sel_text[] = {
- "-12.0dB", "-11.5dB", "-11.0dB", "-10.5dB", "-10.0dB", "-9.5dB",
- "-9.0dB", "-8.5dB", "-8.0dB", "-7.5dB", "-7.0dB", "-6.5dB",
- "-6.0dB", "-5.5dB", "-5.0dB", "-4.5dB", "-4.0dB", "-3.5dB",
- "-3.0dB", "-2.5dB", "-2.0dB", "-1.5dB", "-1.0dB", "-0.5dB",
- "0.0dB", "0.5dB", "1.0dB", "1.5dB", "2.0dB", "2.5dB",
- "3.0dB", "3.5dB", "4.0dB", "4.5dB", "5.0dB", "5.5dB",
- "6.0dB", "6.5dB", "7.0dB", "7.5dB", "8.0dB", "8.5dB",
- "9.0dB", "9.5dB", "10.0dB", "10.5dB", "11.0dB", "11.5dB",
- "12.0dB", "12.5dB", "13.0dB", "13.5dB", "14.0dB", "14.5dB",
- "15.0dB", "15.5dB", "16.0dB", "16.5dB", "17.0dB", "17.5dB",
- "18.0dB", "18.5dB", "19.0dB", "19.5dB", "20.0dB", "20.5dB",
- "21.0dB", "21.5dB", "22.0dB", "22.5dB", "23.0dB", "23.5dB",
- "24.0dB", "24.5dB", "25.0dB", "25.5dB", "26.0dB", "26.5dB",
- "27.0dB", "27.5dB", "28.0dB", "28.5dB", "29.0dB", "29.5dB",
- "30.0dB", "30.5dB", "31.0dB", "31.5dB", "32.0dB", "32.5dB",
- "33.0dB", "33.5dB", "34.0dB", "34.5dB", "35.0dB", "35.5dB",
- "36.0dB", "36.5dB", "37.0dB", "37.5dB", "38.0dB", "38.5dB",
- "39.0dB", "39.5dB", "40.0dB"};
-
-static const struct soc_enum pcm186x_gain_sel[] = {
- SOC_VALUE_ENUM_SINGLE(PCM186X_PGA_VAL_CH1_L, 0,
- 0xff,
- ARRAY_SIZE(pcm186x_gain_sel_text),
- pcm186x_gain_sel_text,
- pcm186x_gain_sel_value),
- SOC_VALUE_ENUM_SINGLE(PCM186X_PGA_VAL_CH1_R, 0,
- 0xff,
- ARRAY_SIZE(pcm186x_gain_sel_text),
- pcm186x_gain_sel_text,
- pcm186x_gain_sel_value),
-};
-
-static const struct snd_kcontrol_new pcm1863_snd_controls_card[] = {
- SOC_ENUM("ADC Left Input", pcm186x_adc_input_channel_sel[0]),
- SOC_ENUM("ADC Right Input", pcm186x_adc_input_channel_sel[1]),
- SOC_ENUM("ADC Mic Bias", pcm186x_mic_bias_sel),
- SOC_ENUM("PGA Gain Left", pcm186x_gain_sel[0]),
- SOC_ENUM("PGA Gain Right", pcm186x_gain_sel[1]),
-};
-
static int pcm1863_add_controls(struct snd_soc_component *component)
{
snd_soc_add_component_controls(component,

View File

@ -0,0 +1,48 @@
From 9c5d91f6b938c23065ddc21c8654c5e222c35687 Mon Sep 17 00:00:00 2001
From: Jan Kehren <jan.kehren@emteria.com>
Date: Fri, 16 Aug 2024 13:47:50 +0000
Subject: [PATCH 1222/1350] drm: rp1: rp1-dsi: Add DRM_FORMAT_ARGB8888 and
DRM_FORMAT_ABGR8888
Android requires this.
As the underlying hardware doesn't support alpha blending,
we ignore the alpha value.
Signed-off-by: Jan Kehren <jan.kehren@emteria.com>
---
drivers/gpu/drm/rp1/rp1-dsi/rp1_dsi.c | 2 ++
drivers/gpu/drm/rp1/rp1-dsi/rp1_dsi_dma.c | 12 ++++++++++++
2 files changed, 14 insertions(+)
--- a/drivers/gpu/drm/rp1/rp1-dsi/rp1_dsi.c
+++ b/drivers/gpu/drm/rp1/rp1-dsi/rp1_dsi.c
@@ -229,6 +229,8 @@ static const struct drm_mode_config_func
static const u32 rp1dsi_formats[] = {
DRM_FORMAT_XRGB8888,
DRM_FORMAT_XBGR8888,
+ DRM_FORMAT_ARGB8888,
+ DRM_FORMAT_ABGR8888,
DRM_FORMAT_RGB888,
DRM_FORMAT_BGR888,
DRM_FORMAT_RGB565
--- a/drivers/gpu/drm/rp1/rp1-dsi/rp1_dsi_dma.c
+++ b/drivers/gpu/drm/rp1/rp1-dsi/rp1_dsi_dma.c
@@ -247,6 +247,18 @@ static const struct rp1dsi_ipixfmt my_fo
.rgbsz = BITS(DPI_DMA_RGBSZ_BPP, 3),
},
{
+ .format = DRM_FORMAT_ARGB8888,
+ .mask = IMASK_RGB(0x3fc, 0x3fc, 0x3fc),
+ .shift = ISHIFT_RGB(23, 15, 7),
+ .rgbsz = BITS(DPI_DMA_RGBSZ_BPP, 3),
+ },
+ {
+ .format = DRM_FORMAT_ABGR8888,
+ .mask = IMASK_RGB(0x3fc, 0x3fc, 0x3fc),
+ .shift = ISHIFT_RGB(7, 15, 23),
+ .rgbsz = BITS(DPI_DMA_RGBSZ_BPP, 3),
+ },
+ {
.format = DRM_FORMAT_RGB888,
.mask = IMASK_RGB(0x3fc, 0x3fc, 0x3fc),
.shift = ISHIFT_RGB(23, 15, 7),

View File

@ -0,0 +1,48 @@
From 9f0523de1b7ef122fae527326372a4ab5aa42fa6 Mon Sep 17 00:00:00 2001
From: Jan Kehren <jan.kehren@emteria.com>
Date: Tue, 20 Aug 2024 08:08:50 +0000
Subject: [PATCH 1223/1350] drm: rp1: rp1-dpi: Add DRM_FORMAT_ARGB8888 and
DRM_FORMAT_ABGR8888
Android requires this.
As the underlying hardware doesn't support alpha blending,
we ignore the alpha value.
Signed-off-by: Jan Kehren <jan.kehren@emteria.com>
---
drivers/gpu/drm/rp1/rp1-dpi/rp1_dpi.c | 2 ++
drivers/gpu/drm/rp1/rp1-dpi/rp1_dpi_hw.c | 12 ++++++++++++
2 files changed, 14 insertions(+)
--- a/drivers/gpu/drm/rp1/rp1-dpi/rp1_dpi.c
+++ b/drivers/gpu/drm/rp1/rp1-dpi/rp1_dpi.c
@@ -260,6 +260,8 @@ static struct drm_driver rp1dpi_driver =
static const u32 rp1dpi_formats[] = {
DRM_FORMAT_XRGB8888,
DRM_FORMAT_XBGR8888,
+ DRM_FORMAT_ARGB8888,
+ DRM_FORMAT_ABGR8888,
DRM_FORMAT_RGB888,
DRM_FORMAT_BGR888,
DRM_FORMAT_RGB565
--- a/drivers/gpu/drm/rp1/rp1-dpi/rp1_dpi_hw.c
+++ b/drivers/gpu/drm/rp1/rp1-dpi/rp1_dpi_hw.c
@@ -258,6 +258,18 @@ static const struct rp1dpi_ipixfmt my_fo
.rgbsz = BITS(DPI_DMA_RGBSZ_BPP, 3),
},
{
+ .format = DRM_FORMAT_ARGB8888,
+ .mask = IMASK_RGB(0x3fc, 0x3fc, 0x3fc),
+ .shift = ISHIFT_RGB(23, 15, 7),
+ .rgbsz = BITS(DPI_DMA_RGBSZ_BPP, 3),
+ },
+ {
+ .format = DRM_FORMAT_ABGR8888,
+ .mask = IMASK_RGB(0x3fc, 0x3fc, 0x3fc),
+ .shift = ISHIFT_RGB(7, 15, 23),
+ .rgbsz = BITS(DPI_DMA_RGBSZ_BPP, 3),
+ },
+ {
.format = DRM_FORMAT_RGB888,
.mask = IMASK_RGB(0x3fc, 0x3fc, 0x3fc),
.shift = ISHIFT_RGB(23, 15, 7),

View File

@ -0,0 +1,48 @@
From 29f7f01091f9aaa6b0c45f5c2e3db1792d381e9d Mon Sep 17 00:00:00 2001
From: Jan Kehren <jan.kehren@emteria.com>
Date: Tue, 20 Aug 2024 08:16:06 +0000
Subject: [PATCH 1224/1350] drm: rp1: rp1-vec: Add DRM_FORMAT_ARGB8888 and
DRM_FORMAT_ABGR8888
Android requires this.
As the underlying hardware doesn't support alpha blending,
we ignore the alpha value.
Signed-off-by: Jan Kehren <jan.kehren@emteria.com>
---
drivers/gpu/drm/rp1/rp1-vec/rp1_vec.c | 2 ++
drivers/gpu/drm/rp1/rp1-vec/rp1_vec_hw.c | 12 ++++++++++++
2 files changed, 14 insertions(+)
--- a/drivers/gpu/drm/rp1/rp1-vec/rp1_vec.c
+++ b/drivers/gpu/drm/rp1/rp1-vec/rp1_vec.c
@@ -420,6 +420,8 @@ static const struct drm_mode_config_func
static const u32 rp1vec_formats[] = {
DRM_FORMAT_XRGB8888,
DRM_FORMAT_XBGR8888,
+ DRM_FORMAT_ARGB8888,
+ DRM_FORMAT_ABGR8888,
DRM_FORMAT_RGB888,
DRM_FORMAT_BGR888,
DRM_FORMAT_RGB565
--- a/drivers/gpu/drm/rp1/rp1-vec/rp1_vec_hw.c
+++ b/drivers/gpu/drm/rp1/rp1-vec/rp1_vec_hw.c
@@ -63,6 +63,18 @@ static const struct rp1vec_ipixfmt my_fo
.rgbsz = BITS(VEC_RGBSZ_BYTES_PER_PIXEL_MINUS1, 3),
},
{
+ .format = DRM_FORMAT_ARGB8888,
+ .mask = MASK_RGB(0x3fc, 0x3fc, 0x3fc),
+ .shift = SHIFT_RGB(23, 15, 7),
+ .rgbsz = BITS(VEC_RGBSZ_BYTES_PER_PIXEL_MINUS1, 3),
+ },
+ {
+ .format = DRM_FORMAT_ABGR8888,
+ .mask = MASK_RGB(0x3fc, 0x3fc, 0x3fc),
+ .shift = SHIFT_RGB(7, 15, 23),
+ .rgbsz = BITS(VEC_RGBSZ_BYTES_PER_PIXEL_MINUS1, 3),
+ },
+ {
.format = DRM_FORMAT_RGB888,
.mask = MASK_RGB(0x3fc, 0x3fc, 0x3fc),
.shift = SHIFT_RGB(23, 15, 7),

View File

@ -0,0 +1,34 @@
From d984fd8907736d37656c558e213cfe087e43a7ce Mon Sep 17 00:00:00 2001
From: Dom Cobley <popcornmix@gmail.com>
Date: Mon, 12 Aug 2024 13:31:58 +0100
Subject: [PATCH 1225/1350] drm/vc4: Add a delay after disabling hdmi phy
output
There appears to be a requirement for some devices
(I'm testing with a 8K VRROOM 40Gbps HDMI switch)
for a measable delay between removing the hdmi phy output from
the old mode, to enabling the hdmi phy output for the new mode.
Without the delay, a mode switch has a small change of getting a permanent
'no signal', which requires a subsequent mode switch or a unplug/replug
to redetect.
Switching between 4kp24/25/30 modes fails about 5% of time in my testing.
Add a delay to make it impossible to switch faster than this.
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
---
drivers/gpu/drm/vc4/vc4_crtc.c | 1 +
1 file changed, 1 insertion(+)
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
@@ -668,6 +668,7 @@ static void vc4_crtc_atomic_disable(stru
* someone was waiting it.
*/
vc4_crtc_send_vblank(crtc);
+ msleep(20);
}
static void vc4_crtc_atomic_enable(struct drm_crtc *crtc,

View File

@ -0,0 +1,25 @@
From aa54ce17dc3a19eaf26f9c17c05a18aabcac90b0 Mon Sep 17 00:00:00 2001
From: Dom Cobley <popcornmix@gmail.com>
Date: Tue, 13 Aug 2024 16:13:16 +0100
Subject: [PATCH 1226/1350] drm/vc4: Implement vc6_hdmi_phy_disable
The body of this function was missing so we don't reset the phy
when disabling it.
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
---
drivers/gpu/drm/vc4/vc4_hdmi_phy.c | 5 +++++
1 file changed, 5 insertions(+)
--- a/drivers/gpu/drm/vc4/vc4_hdmi_phy.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi_phy.c
@@ -1197,4 +1197,9 @@ void vc6_hdmi_phy_init(struct vc4_hdmi *
void vc6_hdmi_phy_disable(struct vc4_hdmi *vc4_hdmi)
{
+ unsigned long flags;
+
+ spin_lock_irqsave(&vc4_hdmi->hw_lock, flags);
+ vc6_hdmi_reset_phy(vc4_hdmi);
+ spin_unlock_irqrestore(&vc4_hdmi->hw_lock, flags);
}

View File

@ -0,0 +1,35 @@
From 3d21dabd055ca064880e775892a10c5e69fdf5e9 Mon Sep 17 00:00:00 2001
From: Dom Cobley <popcornmix@gmail.com>
Date: Tue, 13 Aug 2024 17:18:51 +0100
Subject: [PATCH 1227/1350] drm/vc4: Also power down the PLL core when
resetting PHY
The current reset code doesn't actually stop the hdmi output.
That makes it difficult for displays to handle a mode set.
Powering down the PLL does actually remove the hdmi signal
and makes mode sets more reliable
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
---
drivers/gpu/drm/vc4/vc4_hdmi_phy.c | 2 ++
1 file changed, 2 insertions(+)
--- a/drivers/gpu/drm/vc4/vc4_hdmi_phy.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi_phy.c
@@ -137,6 +137,7 @@
#define VC6_HDMI_TX_PHY_PLL_REFCLK_REFCLK_SEL_CMOS BIT(13)
#define VC6_HDMI_TX_PHY_PLL_REFCLK_REFFRQ_MASK VC4_MASK(9, 0)
+#define VC6_HDMI_TX_PHY_PLL_POST_KDIV_BYPASS_EN BIT(4)
#define VC6_HDMI_TX_PHY_PLL_POST_KDIV_CLK0_SEL_MASK VC4_MASK(3, 2)
#define VC6_HDMI_TX_PHY_PLL_POST_KDIV_KDIV_MASK VC4_MASK(1, 0)
@@ -947,6 +948,7 @@ static void vc6_hdmi_reset_phy(struct vc
HDMI_WRITE(HDMI_TX_PHY_RESET_CTL, 0);
HDMI_WRITE(HDMI_TX_PHY_POWERUP_CTL, 0);
+ HDMI_WRITE(HDMI_TX_PHY_PLL_POST_KDIV, VC6_HDMI_TX_PHY_PLL_POST_KDIV_BYPASS_EN);
}
void vc6_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi,

View File

@ -0,0 +1,228 @@
From 784ef64631be19ef45a597e618c04a0f8b041307 Mon Sep 17 00:00:00 2001
From: j-schambacher <joerg@hifiberry.com>
Date: Tue, 20 Aug 2024 10:08:27 +0200
Subject: [PATCH 1228/1350] ASoC: add driver for new HiFiBerry ADC only
board(s)
Adds the driver for the soon to be released first ADC only board.
It includes the same ADC controls as used by the DAC+ADC Pro driver.
Signed-off-by: j-schambacher <joerg@hifiberry.com>
---
sound/soc/bcm/Kconfig | 7 ++
sound/soc/bcm/Makefile | 2 +
sound/soc/bcm/hifiberry_adc.c | 174 ++++++++++++++++++++++++++++++++++
3 files changed, 183 insertions(+)
create mode 100644 sound/soc/bcm/hifiberry_adc.c
--- a/sound/soc/bcm/Kconfig
+++ b/sound/soc/bcm/Kconfig
@@ -39,6 +39,13 @@ config SND_BCM2708_SOC_GOOGLEVOICEHAT_SO
help
Say Y or M if you want to add support for voiceHAT soundcard.
+config SND_BCM2708_SOC_HIFIBERRY_ADC
+ tristate "Support for HifiBerry ADC"
+ select SND_SOC_PCM186X_I2C
+ select SND_RPI_HIFIBERRY_ADC
+ help
+ Say Y or M if you want to add support for HifiBerry ADC.
+
config SND_BCM2708_SOC_HIFIBERRY_DAC
tristate "Support for HifiBerry DAC and DAC8X"
select SND_SOC_PCM5102A
--- a/sound/soc/bcm/Makefile
+++ b/sound/soc/bcm/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_SND_BCM63XX_I2S_WHISTLER) +
snd-soc-googlevoicehat-codec-objs := googlevoicehat-codec.o
# BCM2708 Machine Support
+snd-soc-hifiberry-adc-objs := hifiberry_adc.o
snd-soc-hifiberry-dacplus-objs := hifiberry_dacplus.o
snd-soc-hifiberry-dacplushd-objs := hifiberry_dacplushd.o
snd-soc-hifiberry-dacplusadc-objs := hifiberry_dacplusadc.o
@@ -51,6 +52,7 @@ snd-soc-chipdip-dac-objs := chipdip-dac.
snd-soc-dacberry400-objs := dacberry400.o
obj-$(CONFIG_SND_BCM2708_SOC_GOOGLEVOICEHAT_SOUNDCARD) += snd-soc-googlevoicehat-codec.o
+obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_ADC) += snd-soc-hifiberry-adc.o
obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS) += snd-soc-hifiberry-dacplus.o
obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSHD) += snd-soc-hifiberry-dacplushd.o
obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSADC) += snd-soc-hifiberry-dacplusadc.o
--- /dev/null
+++ b/sound/soc/bcm/hifiberry_adc.c
@@ -0,0 +1,174 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * ASoC Driver for HiFiBerry ADC
+ *
+ * Author: Joerg Schambacher <joerg@hifiberry.com>
+ * Copyright 2024
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/kernel.h>
+#include <linux/clk.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/soc.h>
+#include <sound/jack.h>
+#include <sound/tlv.h>
+
+#include "../codecs/pcm186x.h"
+#include "hifiberry_adc_controls.h"
+
+static bool leds_off;
+
+static int pcm1863_add_controls(struct snd_soc_component *component)
+{
+ snd_soc_add_component_controls(component,
+ pcm1863_snd_controls_card,
+ ARRAY_SIZE(pcm1863_snd_controls_card));
+ return 0;
+}
+
+static int snd_rpi_hifiberry_adc_init(struct snd_soc_pcm_runtime *rtd)
+{
+ struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0);
+ struct snd_soc_component *adc = codec_dai->component;
+ int ret;
+
+ ret = pcm1863_add_controls(adc);
+ if (ret < 0)
+ dev_warn(rtd->dev, "Failed to add pcm1863 controls: %d\n",
+ ret);
+
+ codec_dai->driver->capture.rates =
+ SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |
+ SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 |
+ SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000;
+
+ /* set GPIO2 to output, GPIO3 input */
+ snd_soc_component_write(adc, PCM186X_GPIO3_2_CTRL, 0x00);
+ snd_soc_component_write(adc, PCM186X_GPIO3_2_DIR_CTRL, 0x04);
+ if (leds_off)
+ snd_soc_component_update_bits(adc, PCM186X_GPIO_IN_OUT, 0x40, 0x00);
+ else
+ snd_soc_component_update_bits(adc, PCM186X_GPIO_IN_OUT, 0x40, 0x40);
+
+ return 0;
+}
+
+static int snd_rpi_hifiberry_adc_hw_params(
+ struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params)
+{
+ int ret = 0;
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ int channels = params_channels(params);
+ int width = snd_pcm_format_width(params_format(params));
+
+ /* Using powers of 2 allows for an integer clock divisor */
+ width = width <= 16 ? 16 : 32;
+
+ ret = snd_soc_dai_set_bclk_ratio(asoc_rtd_to_cpu(rtd, 0), channels * width);
+ return ret;
+}
+
+/* machine stream operations */
+static const struct snd_soc_ops snd_rpi_hifiberry_adc_ops = {
+ .hw_params = snd_rpi_hifiberry_adc_hw_params,
+};
+
+SND_SOC_DAILINK_DEFS(hifi,
+ DAILINK_COMP_ARRAY(COMP_CPU("bcm2708-i2s.0")),
+ DAILINK_COMP_ARRAY(COMP_CODEC("pcm186x.1-004a", "pcm1863-aif")),
+ DAILINK_COMP_ARRAY(COMP_PLATFORM("bcm2708-i2s.0")));
+
+static struct snd_soc_dai_link snd_rpi_hifiberry_adc_dai[] = {
+{
+ .name = "HiFiBerry ADC",
+ .stream_name = "HiFiBerry ADC HiFi",
+ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
+ SND_SOC_DAIFMT_CBS_CFS,
+ .ops = &snd_rpi_hifiberry_adc_ops,
+ .init = snd_rpi_hifiberry_adc_init,
+ SND_SOC_DAILINK_REG(hifi),
+},
+};
+
+/* audio machine driver */
+static struct snd_soc_card snd_rpi_hifiberry_adc = {
+ .name = "snd_rpi_hifiberry_adc",
+ .driver_name = "HifiberryAdc",
+ .owner = THIS_MODULE,
+ .dai_link = snd_rpi_hifiberry_adc_dai,
+ .num_links = ARRAY_SIZE(snd_rpi_hifiberry_adc_dai),
+};
+
+static int snd_rpi_hifiberry_adc_probe(struct platform_device *pdev)
+{
+ int ret = 0, i = 0;
+ struct snd_soc_card *card = &snd_rpi_hifiberry_adc;
+
+ snd_rpi_hifiberry_adc.dev = &pdev->dev;
+ if (pdev->dev.of_node) {
+ struct device_node *i2s_node;
+ struct snd_soc_dai_link *dai;
+
+ dai = &snd_rpi_hifiberry_adc_dai[0];
+ i2s_node = of_parse_phandle(pdev->dev.of_node,
+ "i2s-controller", 0);
+ if (i2s_node) {
+ for (i = 0; i < card->num_links; i++) {
+ dai->cpus->dai_name = NULL;
+ dai->cpus->of_node = i2s_node;
+ dai->platforms->name = NULL;
+ dai->platforms->of_node = i2s_node;
+ }
+ }
+ }
+ leds_off = of_property_read_bool(pdev->dev.of_node,
+ "hifiberry-adc,leds_off");
+ ret = snd_soc_register_card(&snd_rpi_hifiberry_adc);
+ if (ret && ret != -EPROBE_DEFER)
+ dev_err(&pdev->dev,
+ "snd_soc_register_card() failed: %d\n", ret);
+
+ return ret;
+}
+
+static const struct of_device_id snd_rpi_hifiberry_adc_of_match[] = {
+ { .compatible = "hifiberry,hifiberry-adc", },
+ {},
+};
+
+MODULE_DEVICE_TABLE(of, snd_rpi_hifiberry_adc_of_match);
+
+static struct platform_driver snd_rpi_hifiberry_adc_driver = {
+ .driver = {
+ .name = "snd-rpi-hifiberry-adc",
+ .owner = THIS_MODULE,
+ .of_match_table = snd_rpi_hifiberry_adc_of_match,
+ },
+ .probe = snd_rpi_hifiberry_adc_probe,
+};
+
+module_platform_driver(snd_rpi_hifiberry_adc_driver);
+
+MODULE_AUTHOR("Joerg Schambacher <joerg@hifiberry.com>");
+MODULE_DESCRIPTION("ASoC Driver for HiFiBerry ADC");
+MODULE_LICENSE("GPL");

View File

@ -0,0 +1,100 @@
From 2f656dc533b65ae7f23527c3dc176efa92add105 Mon Sep 17 00:00:00 2001
From: j-schambacher <joerg@hifiberry.com>
Date: Tue, 20 Aug 2024 10:24:10 +0200
Subject: [PATCH 1229/1350] overlays: Add overlay for Hifiberry ADC
Adds the DT overlay for the HiFiBerry ADC.
Signed-off-by: j-schambacher <joerg@hifiberry.com>
---
arch/arm/boot/dts/overlays/Makefile | 1 +
arch/arm/boot/dts/overlays/README | 7 +++
.../dts/overlays/hifiberry-adc-overlay.dts | 45 +++++++++++++++++++
sound/soc/bcm/Kconfig | 1 +
4 files changed, 54 insertions(+)
create mode 100644 arch/arm/boot/dts/overlays/hifiberry-adc-overlay.dts
--- a/arch/arm/boot/dts/overlays/Makefile
+++ b/arch/arm/boot/dts/overlays/Makefile
@@ -85,6 +85,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
hd44780-i2c-lcd.dtbo \
hd44780-lcd.dtbo \
hdmi-backlight-hwhack-gpio.dtbo \
+ hifiberry-adc.dtbo \
hifiberry-amp.dtbo \
hifiberry-amp100.dtbo \
hifiberry-amp3.dtbo \
--- a/arch/arm/boot/dts/overlays/README
+++ b/arch/arm/boot/dts/overlays/README
@@ -1771,6 +1771,13 @@ Params: gpio_pin GPIO pin
expects a high to switch it on.
+Name: hifiberry-adc
+Info: Configures the HifiBerry ADC audio card
+Load: dtoverlay=hifiberry-adc,<param>=<val>
+Params: leds_off If set to 'true' the onboard indicator LED
+ is switched off at all times.
+
+
Name: hifiberry-amp
Info: Configures the HifiBerry Amp and Amp+ audio cards
Load: dtoverlay=hifiberry-amp
--- /dev/null
+++ b/arch/arm/boot/dts/overlays/hifiberry-adc-overlay.dts
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: GPL-2.0
+// Definitions for HiFiBerry ADC, no onboard clocks
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "brcm,bcm2835";
+
+ fragment@0 {
+ target = <&i2s_clk_producer>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@1 {
+ target = <&i2c1>;
+ __overlay__ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ hb_adc: pcm186x@4a {
+ #sound-dai-cells = <0>;
+ compatible = "ti,pcm1863";
+ reg = <0x4a>;
+ status = "okay";
+ };
+ };
+ };
+
+ fragment@2 {
+ target = <&sound>;
+ hifiberry_adc: __overlay__ {
+ compatible = "hifiberry,hifiberry-adc";
+ audio-codec = <&hb_adc>;
+ i2s-controller = <&i2s_clk_producer>;
+ status = "okay";
+ };
+ };
+
+ __overrides__ {
+ leds_off = <&hifiberry_adc>,"hifiberry-adc,leds_off?";
+ };
+};
--- a/sound/soc/bcm/Kconfig
+++ b/sound/soc/bcm/Kconfig
@@ -45,6 +45,7 @@ config SND_BCM2708_SOC_HIFIBERRY_ADC
select SND_RPI_HIFIBERRY_ADC
help
Say Y or M if you want to add support for HifiBerry ADC.
+ Use this module for HiFiBerry's ADC-only sound cards
config SND_BCM2708_SOC_HIFIBERRY_DAC
tristate "Support for HifiBerry DAC and DAC8X"

View File

@ -1,7 +1,7 @@
From 2f223e0e4931486fbc32df3c89bc16ff1ca434bf Mon Sep 17 00:00:00 2001
From ba0f2212e0e100ee16bdde76b7efca6bb8ee9446 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.com>
Date: Mon, 29 Nov 2021 12:14:49 +0000
Subject: [PATCH 0320/1085] spi: spidev: Restore loading from Device Tree
Subject: [PATCH 1232/1350] spi: spidev: Restore loading from Device Tree
As happens occasionally, an upstream change has once again prevented
spidev from being loaded via Device Tree. We now need "spidev" to be
@ -15,11 +15,11 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
--- a/drivers/spi/spidev.c
+++ b/drivers/spi/spidev.c
@@ -699,6 +699,7 @@ static const struct file_operations spid
static struct class *spidev_class;
static const struct spi_device_id spidev_spi_ids[] = {
@@ -711,6 +711,7 @@ static const struct spi_device_id spidev
{ .name = "spi-authenta" },
{ .name = "em3581" },
{ .name = "si3210" },
+ { .name = "spidev" },
{ .name = "bh2228fv" },
{ .name = "dh2228fv" },
{ .name = "jg10309-01" },
{},
};
MODULE_DEVICE_TABLE(spi, spidev_spi_ids);

View File

@ -0,0 +1,242 @@
From e596d70725ca70113d39d9366d7b4d3e492f6449 Mon Sep 17 00:00:00 2001
From: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
Date: Wed, 31 Jul 2024 19:05:29 +0100
Subject: [PATCH 1233/1350] drivers: drm: rp1-dsi: Implement more DSI options
and flags
Now implementing:
- Per-command selection of LP or HS for commands (previously LP)
- EoTp transmission option (previously EoTp was always disabled)
- Non-continuous clock option (previously always continuous)
- Per-command enabling of ACK request (in command mode only)
Make a plausible (and possibly correct) attempt to measure the
longest LP command that will fit into vertical blanking lines.
DON'T set both "Burst Mode" and "Sync Events" flags together.
This is redundant in the standard IP; in this RP1 variant it
would enable Sync Pulses but may break with some video timings.
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
---
drivers/gpu/drm/rp1/rp1-dsi/rp1_dsi.c | 5 +-
drivers/gpu/drm/rp1/rp1-dsi/rp1_dsi.h | 3 +-
drivers/gpu/drm/rp1/rp1-dsi/rp1_dsi_dsi.c | 106 +++++++++++++++++-----
3 files changed, 91 insertions(+), 23 deletions(-)
--- a/drivers/gpu/drm/rp1/rp1-dsi/rp1_dsi.c
+++ b/drivers/gpu/drm/rp1/rp1-dsi/rp1_dsi.c
@@ -396,7 +396,10 @@ ssize_t rp1dsi_host_transfer(struct mipi
return ret;
}
- rp1dsi_dsi_send(dsi, *(u32 *)(&packet.header), packet.payload_length, packet.payload);
+ rp1dsi_dsi_send(dsi, *(u32 *)(&packet.header),
+ packet.payload_length, packet.payload,
+ !!(msg->flags & MIPI_DSI_MSG_USE_LPM),
+ !!(msg->flags & MIPI_DSI_MSG_REQ_ACK));
/* Optional read back */
if (msg->rx_len && msg->rx_buf)
--- a/drivers/gpu/drm/rp1/rp1-dsi/rp1_dsi.h
+++ b/drivers/gpu/drm/rp1/rp1-dsi/rp1_dsi.h
@@ -86,7 +86,8 @@ void rp1dsi_mipicfg_setup(struct rp1_dsi
/* Functions to control the SNPS D-PHY and DSI block setup */
void rp1dsi_dsi_setup(struct rp1_dsi *dsi, struct drm_display_mode const *mode);
-void rp1dsi_dsi_send(struct rp1_dsi *dsi, u32 header, int len, const u8 *buf);
+void rp1dsi_dsi_send(struct rp1_dsi *dsi, u32 header, int len, const u8 *buf,
+ bool use_lpm, bool req_ack);
int rp1dsi_dsi_recv(struct rp1_dsi *dsi, int len, u8 *buf);
void rp1dsi_dsi_set_cmdmode(struct rp1_dsi *dsi, int cmd_mode);
void rp1dsi_dsi_stop(struct rp1_dsi *dsi);
--- a/drivers/gpu/drm/rp1/rp1-dsi/rp1_dsi_dsi.c
+++ b/drivers/gpu/drm/rp1/rp1-dsi/rp1_dsi_dsi.c
@@ -103,6 +103,24 @@
/* And some bitfield definitions */
+#define DSI_PCKHDL_EOTP_TX_EN BIT(0)
+#define DSI_PCKHDL_BTA_EN BIT(2)
+
+#define DSI_VID_MODE_LP_CMD_EN BIT(15)
+#define DSI_VID_MODE_FRAME_BTA_ACK_EN BIT(14)
+#define DSI_VID_MODE_LP_HFP_EN BIT(13)
+#define DSI_VID_MODE_LP_HBP_EN BIT(12)
+#define DSI_VID_MODE_LP_VACT_EN BIT(11)
+#define DSI_VID_MODE_LP_VFP_EN BIT(10)
+#define DSI_VID_MODE_LP_VBP_EN BIT(9)
+#define DSI_VID_MODE_LP_VSA_EN BIT(8)
+#define DSI_VID_MODE_SYNC_PULSES 0
+#define DSI_VID_MODE_SYNC_EVENTS 1
+#define DSI_VID_MODE_BURST 2
+
+#define DSI_CMD_MODE_ALL_LP 0x10f7f00
+#define DSI_CMD_MODE_ACK_RQST_EN BIT(1)
+
#define DPHY_PWR_UP_SHUTDOWNZ_LSB 0
#define DPHY_PWR_UP_SHUTDOWNZ_BITS BIT(DPHY_PWR_UP_SHUTDOWNZ_LSB)
@@ -1252,8 +1270,8 @@ static u32 dphy_configure_pll(struct rp1
vco_freq, actual_vco_freq, m, refclk, n,
hsfreq_table[dsi->hsfreq_index].hsfreqrange);
} else {
- drm_warn(dsi->drm,
- "rp1dsi: Error configuring DPHY PLL %uHz\n", vco_freq);
+ drm_err(dsi->drm,
+ "rp1dsi: Error configuring DPHY PLL %uHz\n", vco_freq);
}
return actual_vco_freq;
@@ -1321,7 +1339,7 @@ static void rp1dsi_dpiclk_start(struct r
clk_set_rate(dsi->clocks[RP1DSI_CLOCK_DPI], (4 * lanes * byte_clock) / (bpp >> 1));
clk_prepare_enable(dsi->clocks[RP1DSI_CLOCK_DPI]);
drm_info(dsi->drm,
- "rp1dsi: Nominal Byte clock %u DPI clock %lu (parent rate %lu)",
+ "rp1dsi: Nominal Byte clock %u DPI clock %lu (parent rate %lu)\n",
byte_clock,
clk_get_rate(dsi->clocks[RP1DSI_CLOCK_DPI]),
clk_get_rate(clk_get_parent(dsi->clocks[RP1DSI_CLOCK_DPI])));
@@ -1365,7 +1383,8 @@ static u32 get_colorcode(enum mipi_dsi_p
void rp1dsi_dsi_setup(struct rp1_dsi *dsi, struct drm_display_mode const *mode)
{
- u32 timeout, mask, vid_mode_cfg;
+ int cmdtim;
+ u32 timeout, mask, clkdiv;
unsigned int bpp = mipi_dsi_pixel_format_to_bpp(dsi->display_format);
u32 byte_clock = clamp((bpp * 125 * min(mode->clock, RP1DSI_DPI_MAX_KHZ)) / dsi->lanes,
RP1DSI_BYTE_CLK_MIN, RP1DSI_BYTE_CLK_MAX);
@@ -1374,19 +1393,31 @@ void rp1dsi_dsi_setup(struct rp1_dsi *ds
DSI_WRITE(DSI_DPI_CFG_POL, 0);
DSI_WRITE(DSI_GEN_VCID, dsi->vc);
DSI_WRITE(DSI_DPI_COLOR_CODING, get_colorcode(dsi->display_format));
- /* a conservative guess (LP escape is slow!) */
- DSI_WRITE(DSI_DPI_LP_CMD_TIM, 0x00100000);
- /* Drop to LP where possible; use LP Escape for all commands */
- vid_mode_cfg = 0xbf00;
- if (!(dsi->display_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE))
- vid_mode_cfg |= 0x01;
- else if (8 * dsi->lanes > bpp)
- vid_mode_cfg &= ~0x400; /* PULSE && inexact DPICLK => fix HBP time */
+ /*
+ * Flags to configure use of LP, EoTp, Burst Mode, Sync Events/Pulses.
+ * Note that Burst Mode implies Sync Events; the two flags need not be
+ * set concurrently, and in this RP1 variant *should not* both be set:
+ * doing so would (counter-intuitively) enable Sync Pulses and may fail
+ * if there is not sufficient time to return to LP11 state during HBP.
+ */
+ mask = DSI_VID_MODE_LP_HFP_EN | DSI_VID_MODE_LP_HBP_EN |
+ DSI_VID_MODE_LP_VACT_EN | DSI_VID_MODE_LP_VFP_EN |
+ DSI_VID_MODE_LP_VBP_EN | DSI_VID_MODE_LP_VSA_EN;
+ if (dsi->display_flags & MIPI_DSI_MODE_LPM)
+ mask |= DSI_VID_MODE_LP_CMD_EN;
if (dsi->display_flags & MIPI_DSI_MODE_VIDEO_BURST)
- vid_mode_cfg |= 0x02;
- DSI_WRITE(DSI_VID_MODE_CFG, vid_mode_cfg);
- DSI_WRITE(DSI_CMD_MODE_CFG, 0x10F7F00);
+ mask |= DSI_VID_MODE_BURST;
+ else if (!(dsi->display_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE))
+ mask |= DSI_VID_MODE_SYNC_EVENTS;
+ else if (8 * dsi->lanes > bpp)
+ mask &= ~DSI_VID_MODE_LP_HBP_EN; /* PULSE && inexact DPICLK => fix HBP time */
+ DSI_WRITE(DSI_VID_MODE_CFG, mask);
+ DSI_WRITE(DSI_CMD_MODE_CFG,
+ (dsi->display_flags & MIPI_DSI_MODE_LPM) ? DSI_CMD_MODE_ALL_LP : 0);
+ DSI_WRITE(DSI_PCKHDL_CFG,
+ DSI_PCKHDL_BTA_EN |
+ ((dsi->display_flags & MIPI_DSI_MODE_NO_EOT_PACKET) ? 0 : DSI_PCKHDL_EOTP_TX_EN));
/* Select Command Mode */
DSI_WRITE(DSI_MODE_CFG, 1);
@@ -1397,9 +1428,9 @@ void rp1dsi_dsi_setup(struct rp1_dsi *ds
timeout = 0;
DSI_WRITE(DSI_TO_CNT_CFG, (timeout << 16) | RP1DSI_LPRX_TO_VAL);
DSI_WRITE(DSI_BTA_TO_CNT, RP1DSI_BTA_TO_VAL);
+ clkdiv = max(2u, 1u + byte_clock / RP1DSI_ESC_CLK_MAX); /* byte clocks per escape clock */
DSI_WRITE(DSI_CLKMGR_CFG,
- (RP1DSI_TO_CLK_DIV << 8) |
- max(2u, 1u + byte_clock / RP1DSI_ESC_CLK_MAX));
+ (RP1DSI_TO_CLK_DIV << 8) | clkdiv);
/* Configure video timings */
DSI_WRITE(DSI_VID_PKT_SIZE, mode->hdisplay);
@@ -1425,6 +1456,18 @@ void rp1dsi_dsi_setup(struct rp1_dsi *ds
(hsfreq_table[dsi->hsfreq_index].data_lp2hs << DSI_PHY_TMR_LP2HS_LSB) |
(hsfreq_table[dsi->hsfreq_index].data_hs2lp << DSI_PHY_TMR_HS2LP_LSB));
+ /* Estimate how many LP bytes can be sent during vertical blanking (Databook 3.6.2.1) */
+ cmdtim = mode->htotal;
+ if (dsi->display_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE)
+ cmdtim -= mode->hsync_end - mode->hsync_start;
+ cmdtim = (bpp * cmdtim - 64) / (8 * dsi->lanes); /* byte clocks after HSS and EoTp */
+ cmdtim -= hsfreq_table[dsi->hsfreq_index].data_hs2lp;
+ cmdtim -= hsfreq_table[dsi->hsfreq_index].data_lp2hs;
+ cmdtim = (cmdtim / clkdiv) - 24; /* escape clocks for commands */
+ cmdtim = max(0, cmdtim >> 4); /* bytes (at 2 clocks per bit) */
+ drm_info(dsi->drm, "rp1dsi: Command time (outvact): %d\n", cmdtim);
+ DSI_WRITE(DSI_DPI_LP_CMD_TIM, cmdtim << 16);
+
/* Wait for PLL lock */
for (timeout = (1 << 14); timeout != 0; --timeout) {
usleep_range(10, 50);
@@ -1434,9 +1477,9 @@ void rp1dsi_dsi_setup(struct rp1_dsi *ds
if (timeout == 0)
drm_err(dsi->drm, "RP1DSI: Time out waiting for PLL\n");
- DSI_WRITE(DSI_LPCLK_CTRL, 0x1); /* configure the requesthsclk */
+ DSI_WRITE(DSI_LPCLK_CTRL,
+ (dsi->display_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) ? 0x3 : 0x1);
DSI_WRITE(DSI_PHY_TST_CTRL0, 0x2);
- DSI_WRITE(DSI_PCKHDL_CFG, 1 << 2); /* allow bus turnaround */
DSI_WRITE(DSI_PWR_UP, 0x1); /* power up */
/* Now it should be safe to start the external DPI clock divider */
@@ -1460,7 +1503,8 @@ void rp1dsi_dsi_setup(struct rp1_dsi *ds
mask, DSI_READ(DSI_PHY_STATUS));
}
-void rp1dsi_dsi_send(struct rp1_dsi *dsi, u32 hdr, int len, const u8 *buf)
+void rp1dsi_dsi_send(struct rp1_dsi *dsi, u32 hdr, int len, const u8 *buf,
+ bool use_lpm, bool req_ack)
{
u32 val;
@@ -1471,6 +1515,24 @@ void rp1dsi_dsi_send(struct rp1_dsi *dsi
usleep_range(100, 150);
}
+ /*
+ * Update global configuration flags for LP/HS and ACK options.
+ * XXX It's not clear if having empty FIFOs (checked above and below) guarantees that
+ * the last command has completed and been ACKed, or how closely these control registers
+ * align with command/payload FIFO writes (as each is an independent clock-crossing)?
+ */
+ val = DSI_READ(DSI_VID_MODE_CFG);
+ if (use_lpm)
+ val |= DSI_VID_MODE_LP_CMD_EN;
+ else
+ val &= ~DSI_VID_MODE_LP_CMD_EN;
+ DSI_WRITE(DSI_VID_MODE_CFG, val);
+ val = (use_lpm) ? DSI_CMD_MODE_ALL_LP : 0;
+ if (req_ack)
+ val |= DSI_CMD_MODE_ACK_RQST_EN;
+ DSI_WRITE(DSI_CMD_MODE_CFG, val);
+ (void)DSI_READ(DSI_CMD_MODE_CFG);
+
/* Write payload (in 32-bit words) and header */
for (; len > 0; len -= 4) {
val = *buf++;
@@ -1504,8 +1566,10 @@ int rp1dsi_dsi_recv(struct rp1_dsi *dsi,
break;
usleep_range(100, 150);
}
- if (i == 0)
+ if (!i) {
+ drm_warn(dsi->drm, "Receive failed\n");
return -EIO;
+ }
for (i = 0; i < len; i += 4) {
/* Read fifo must not be empty before all bytes are read */

View File

@ -0,0 +1,53 @@
From 8beb6891489c3c99618a7390578109aadfdf8901 Mon Sep 17 00:00:00 2001
From: Axel <48924884+Paladinking@users.noreply.github.com>
Date: Wed, 28 Aug 2024 09:46:13 +0200
Subject: [PATCH 1234/1350] rtc: pcf8523: Fix oscillator stop bit handling
reading from Control_1
The check if the oscillator stop bit is set was reading from Control_1
register instead of the Seconds register.
This caused the Seconds register to be incorrectly changed if bit 7 of
Control_1 happens to be set.
Signed-off-by: Axel Hammarberg <axel.hammarberg@gmail.com>
---
drivers/rtc/rtc-pcf8523.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
--- a/drivers/rtc/rtc-pcf8523.c
+++ b/drivers/rtc/rtc-pcf8523.c
@@ -108,10 +108,10 @@ static int pcf8523_rtc_read_time(struct
if (err < 0)
return err;
- if ((regs[0] & PCF8523_CONTROL1_STOP) || (regs[3] & PCF8523_SECONDS_OS))
+ if (regs[PCF8523_REG_CONTROL1] & PCF8523_CONTROL1_STOP)
return -EINVAL;
- if (regs[0] & PCF8523_SECONDS_OS) {
+ if (regs[PCF8523_REG_SECONDS] & PCF8523_SECONDS_OS) {
/*
* If the oscillator was stopped, try to clear the flag. Upon
* power-up the flag is always set, but if we cannot clear it
@@ -120,10 +120,10 @@ static int pcf8523_rtc_read_time(struct
* that the clock cannot be assumed to be correct.
*/
- regs[0] &= ~PCF8523_SECONDS_OS;
+ regs[PCF8523_REG_SECONDS] &= ~PCF8523_SECONDS_OS;
err = regmap_write(pcf8523->regmap, PCF8523_REG_SECONDS,
- regs[0]);
+ regs[PCF8523_REG_SECONDS]);
if (err < 0)
return err;
@@ -135,7 +135,7 @@ static int pcf8523_rtc_read_time(struct
if (value & PCF8523_SECONDS_OS)
return -EAGAIN;
- regs[0] = value;
+ regs[PCF8523_REG_SECONDS] = value;
}
tm->tm_sec = bcd2bin(regs[3] & 0x7f);

View File

@ -0,0 +1,80 @@
From cf64a1dfecc2dc418efdd61701c1a4b185ab4761 Mon Sep 17 00:00:00 2001
From: John Cox <jc@kynesim.co.uk>
Date: Fri, 23 Aug 2024 16:48:38 +0100
Subject: [PATCH 1236/1350] media/rpivid: Make SPS / PPS optional in a request
SPS & PPS are optional in requests. Fix. The framework keeps the last
value so this is mostly a matter of changing .required to false when
requesting the controls. Check that SPS has ever been set on frame
start, PPS is valid if all zeros so is at best tricky to check.
Signed-off-by: John Cox <jc@kynesim.co.uk>
---
drivers/staging/media/rpivid/rpivid.c | 4 ++--
drivers/staging/media/rpivid/rpivid_h265.c | 6 ++++++
drivers/staging/media/rpivid/rpivid_video.c | 5 -----
drivers/staging/media/rpivid/rpivid_video.h | 5 +++++
4 files changed, 13 insertions(+), 7 deletions(-)
--- a/drivers/staging/media/rpivid/rpivid.c
+++ b/drivers/staging/media/rpivid/rpivid.c
@@ -40,14 +40,14 @@ static const struct rpivid_control rpivi
.id = V4L2_CID_STATELESS_HEVC_SPS,
.ops = &rpivid_hevc_sps_ctrl_ops,
},
- .required = true,
+ .required = false,
},
{
.cfg = {
.id = V4L2_CID_STATELESS_HEVC_PPS,
.ops = &rpivid_hevc_pps_ctrl_ops,
},
- .required = true,
+ .required = false,
},
{
.cfg = {
--- a/drivers/staging/media/rpivid/rpivid_h265.c
+++ b/drivers/staging/media/rpivid/rpivid_h265.c
@@ -1726,6 +1726,12 @@ static void rpivid_h265_setup(struct rpi
unsigned int ctb_size_y;
bool sps_changed = false;
+ if (!is_sps_set(run->h265.sps)) {
+ v4l2_warn(&dev->v4l2_dev, "SPS never set\n");
+ goto fail;
+ }
+ // Can't check for PPS easily as all 0's looks valid to me
+
if (memcmp(&s->sps, run->h265.sps, sizeof(s->sps)) != 0) {
/* SPS changed */
v4l2_info(&dev->v4l2_dev, "SPS changed\n");
--- a/drivers/staging/media/rpivid/rpivid_video.c
+++ b/drivers/staging/media/rpivid/rpivid_video.c
@@ -257,11 +257,6 @@ static int rpivid_hevc_validate_sps(cons
return 1;
}
-static inline int is_sps_set(const struct v4l2_ctrl_hevc_sps * const sps)
-{
- return sps && sps->pic_width_in_luma_samples != 0;
-}
-
static u32 pixelformat_from_sps(const struct v4l2_ctrl_hevc_sps * const sps,
const int index)
{
--- a/drivers/staging/media/rpivid/rpivid_video.h
+++ b/drivers/staging/media/rpivid/rpivid_video.h
@@ -20,6 +20,11 @@ struct rpivid_format {
unsigned int capabilities;
};
+static inline int is_sps_set(const struct v4l2_ctrl_hevc_sps * const sps)
+{
+ return sps && sps->pic_width_in_luma_samples != 0;
+}
+
extern const struct v4l2_ioctl_ops rpivid_ioctl_ops;
int rpivid_queue_init(void *priv, struct vb2_queue *src_vq,

View File

@ -0,0 +1,37 @@
From 31be188fb945560c193020b19773625421847112 Mon Sep 17 00:00:00 2001
From: Satadru Pramanik <satadru@gmail.com>
Date: Wed, 4 Sep 2024 08:40:42 -0400
Subject: [PATCH 1238/1350] piscreen-overlay: Add invert[x,y] and swapxy
Signed-off-by: Satadru Pramanik <satadru@gmail.com>
---
arch/arm/boot/dts/overlays/README | 6 ++++++
arch/arm/boot/dts/overlays/piscreen-overlay.dts | 3 +++
2 files changed, 9 insertions(+)
--- a/arch/arm/boot/dts/overlays/README
+++ b/arch/arm/boot/dts/overlays/README
@@ -3694,6 +3694,12 @@ Params: speed Display
drm Select the DRM/KMS driver instead of the FBTFT
one
+ invx Touchscreen inverted x axis
+
+ invy Touchscreen inverted y axis
+
+ swapxy Touchscreen swapped x y axis
+
Name: piscreen2r
Info: PiScreen 2 with resistive TP display by OzzMaker.com
--- a/arch/arm/boot/dts/overlays/piscreen-overlay.dts
+++ b/arch/arm/boot/dts/overlays/piscreen-overlay.dts
@@ -103,5 +103,8 @@
xohms = <&piscreen_ts>,"ti,x-plate-ohms;0";
drm = <&piscreen>,"compatible=waveshare,rpi-lcd-35",
<&piscreen>,"reset-gpios:8=",<GPIO_ACTIVE_HIGH>;
+ invx = <&piscreen_ts>,"touchscreen-inverted-x?";
+ invy = <&piscreen_ts>,"touchscreen-inverted-y?";
+ swapxy = <&piscreen_ts>,"touchscreen-swapped-x-y!";
};
};

View File

@ -0,0 +1,82 @@
From f955b7838f9ce72e48b29e58d65e0642d097c8b3 Mon Sep 17 00:00:00 2001
From: eng33 <eng33@waveshare.com>
Date: Wed, 4 Sep 2024 10:48:22 +0800
Subject: [PATCH 1239/1350] drivers:gpu:drm:panel: Added waveshare 5.0inch,
6.25inch, and 8.8inch dsi screen devices
Signed-off-by: eng33 <eng33@waveshare.com>
---
drivers/gpu/drm/panel/panel-waveshare-dsi.c | 55 +++++++++++++++++++++
1 file changed, 55 insertions(+)
--- a/drivers/gpu/drm/panel/panel-waveshare-dsi.c
+++ b/drivers/gpu/drm/panel/panel-waveshare-dsi.c
@@ -150,6 +150,51 @@ static const struct drm_display_mode ws_
.vtotal = 720 + 8 + 4 + 16,
};
+/* 5.0inch 720x1280
+ * https://www.waveshare.com/5inch-dsi-lcd-d.htm
+ */
+static const struct drm_display_mode ws_panel_5_0_mode = {
+ .clock = 83333,
+ .hdisplay = 720,
+ .hsync_start = 720 + 100,
+ .hsync_end = 720 + 100 + 80,
+ .htotal = 720 + 100 + 80 + 100,
+ .vdisplay = 1280,
+ .vsync_start = 1280 + 20,
+ .vsync_end = 1280 + 20 + 20,
+ .vtotal = 1280 + 20 + 20 + 20,
+};
+
+/* 6.25inch 720x1560
+ * https://www.waveshare.com/6.25inch-dsi-lcd.htm
+ */
+static const struct drm_display_mode ws_panel_6_25_mode = {
+ .clock = 83333,
+ .hdisplay = 720,
+ .hsync_start = 720 + 50,
+ .hsync_end = 720 + 50 + 50,
+ .htotal = 720 + 50 + 50 + 50,
+ .vdisplay = 1560,
+ .vsync_start = 1560 + 20,
+ .vsync_end = 1560 + 20 + 20,
+ .vtotal = 1560 + 20 + 20 + 20,
+};
+
+/* 8.8inch 480x1920
+ * https://www.waveshare.com/8.8inch-dsi-lcd.htm
+ */
+static const struct drm_display_mode ws_panel_8_8_mode = {
+ .clock = 83333,
+ .hdisplay = 480,
+ .hsync_start = 480 + 50,
+ .hsync_end = 480 + 50 + 50,
+ .htotal = 480 + 50 + 50 + 50,
+ .vdisplay = 1920,
+ .vsync_start = 1920 + 20,
+ .vsync_end = 1920 + 20 + 20,
+ .vtotal = 1920 + 20 + 20 + 20,
+};
+
static struct ws_panel *panel_to_ts(struct drm_panel *panel)
{
return container_of(panel, struct ws_panel, base);
@@ -413,6 +458,16 @@ static const struct of_device_id ws_pane
.compatible = "waveshare,4inch-panel",
.data = &ws_panel_4_mode,
}, {
+ .compatible = "waveshare,5.0inch-panel",
+ .data = &ws_panel_5_0_mode,
+ }, {
+ .compatible = "waveshare,6.25inch-panel",
+ .data = &ws_panel_6_25_mode,
+ }, {
+ .compatible = "waveshare,8.8inch-panel",
+ .data = &ws_panel_8_8_mode,
+ }, {
+ }, {
/* sentinel */
}
};

View File

@ -0,0 +1,27 @@
From 769cd349d65fb29aaa8f443f9c7a701205b0409c Mon Sep 17 00:00:00 2001
From: eng33 <eng33@waveshare.com>
Date: Wed, 4 Sep 2024 10:56:13 +0800
Subject: [PATCH 1240/1350] arch:arm:boot:dts:overlays: Added waveshare
5.0inch, 6.25inch, and 8.8inch dsi screen dts
Signed-off-by: eng33 <eng33@waveshare.com>
---
.../dts/overlays/vc4-kms-dsi-waveshare-panel-overlay.dts | 7 +++++++
1 file changed, 7 insertions(+)
--- a/arch/arm/boot/dts/overlays/vc4-kms-dsi-waveshare-panel-overlay.dts
+++ b/arch/arm/boot/dts/overlays/vc4-kms-dsi-waveshare-panel-overlay.dts
@@ -113,6 +113,13 @@
4_0_inchC = <&panel>, "compatible=waveshare,4inch-panel",
<&touch>, "touchscreen-size-x:0=720",
<&touch>, "touchscreen-size-y:0=720";
+ 5_0_inch = <&panel>, "compatible=waveshare,5.0inch-panel",
+ <&touch>, "touchscreen-inverted-x?",
+ <&touch>, "touchscreen-inverted-y?";
+ 6_25_inch = <&panel>, "compatible=waveshare,6.25inch-panel",
+ <&touch>, "touchscreen-inverted-x?",
+ <&touch>, "touchscreen-inverted-y?";
+ 8_8_inch = <&panel>, "compatible=waveshare,8.8inch-panel";
i2c1 = <&i2c_frag>, "target:0=",<&i2c1>,
<0>, "-3-4+5";
disable_touch = <&touch>, "status=disabled";

View File

@ -0,0 +1,23 @@
From 3d39588b52abb06ed2b4b0d2db026133a920758b Mon Sep 17 00:00:00 2001
From: eng33 <eng33@waveshare.com>
Date: Thu, 5 Sep 2024 17:19:56 +0800
Subject: [PATCH 1241/1350] arch:arm:boot:dts:overlays: Added waveshare
5.0inch, 6.25inch, and 8.8inch dsi screen description
Signed-off-by: eng33 <eng33@waveshare.com>
---
arch/arm/boot/dts/overlays/README | 3 +++
1 file changed, 3 insertions(+)
--- a/arch/arm/boot/dts/overlays/README
+++ b/arch/arm/boot/dts/overlays/README
@@ -5233,6 +5233,9 @@ Params: 2_8_inch 2.8" 480
3_4_inch 3.4" 800x800 round
4_0_inch 4.0" 480x800
4_0_inchC 4.0" 720x720
+ 5_0_inch 5.0" 720x1280
+ 6_25_inch 6.25" 720x1560
+ 8_8_inch 8.8" 480x1920
7_0_inchC 7.0" C 1024x600
7_9_inch 7.9" 400x1280
8_0_inch 8.0" 1280x800

View File

@ -0,0 +1,89 @@
From 4d219b15a7a01a14c1be1eeee9a939732130d30a Mon Sep 17 00:00:00 2001
From: Naushir Patuck <naush@raspberrypi.com>
Date: Tue, 13 Aug 2024 13:45:54 +0100
Subject: [PATCH 1242/1350] spi: rp2040-gpio-bridge: Add debugfs progress
indicator
Useful for tracking upload progress via userspace.
Signed-off-by: Naushir Patuck <naush@raspberrypi.com>
---
drivers/spi/spi-rp2040-gpio-bridge.c | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
--- a/drivers/spi/spi-rp2040-gpio-bridge.c
+++ b/drivers/spi/spi-rp2040-gpio-bridge.c
@@ -6,6 +6,7 @@
*/
#include <crypto/hash.h>
+#include <linux/debugfs.h>
#include <linux/crypto.h>
#include <linux/delay.h>
#include <linux/firmware.h>
@@ -91,6 +92,9 @@ enum rp2040_gbdg_fixed_size_commands {
struct rp2040_gbdg {
struct spi_controller *controller;
+ struct dentry *debugfs;
+ size_t transfer_progress;
+
struct i2c_client *client;
struct crypto_shash *shash;
struct shash_desc *shash_desc;
@@ -702,6 +706,7 @@ static int rp2040_gbdg_transfer_cached(s
return 0;
}
+ priv_data->transfer_progress = 0;
while (length) {
unsigned int xfer = min(length, RP2040_GBDG_BLOCK_SIZE);
@@ -710,7 +715,9 @@ static int rp2040_gbdg_transfer_cached(s
return ret;
length -= xfer;
data += xfer;
+ priv_data->transfer_progress += xfer;
}
+ priv_data->transfer_progress = 0;
return 0;
}
@@ -1016,6 +1023,16 @@ static int rp2040_gbdg_power_on(struct r
return 0;
}
+static int transfer_progress_show(struct seq_file *s, void *data)
+{
+ struct rp2040_gbdg *rp2040_gbdg = s->private;
+
+ seq_printf(s, "%zu\n", rp2040_gbdg->transfer_progress);
+ return 0;
+}
+
+DEFINE_SHOW_ATTRIBUTE(transfer_progress);
+
static int rp2040_gbdg_probe(struct i2c_client *client)
{
struct rp2040_gbdg_device_info info;
@@ -1023,6 +1040,7 @@ static int rp2040_gbdg_probe(struct i2c_
struct device *dev = &client->dev;
struct rp2040_gbdg *rp2040_gbdg;
struct device_node *np;
+ char debugfs_name[128];
int ret;
np = dev->of_node;
@@ -1136,6 +1154,12 @@ static int rp2040_gbdg_probe(struct i2c_
rp2040_gbdg_parse_dt(rp2040_gbdg);
+ snprintf(debugfs_name, sizeof(debugfs_name), "rp2040-spi:%s",
+ dev_name(dev));
+ rp2040_gbdg->debugfs = debugfs_create_dir(debugfs_name, NULL);
+ debugfs_create_file("transfer_progress", 0444, rp2040_gbdg->debugfs,
+ rp2040_gbdg, &transfer_progress_fops);
+
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);

View File

@ -0,0 +1,166 @@
From 30921ddfa24a5325d0f4980c72f98d20bace87a2 Mon Sep 17 00:00:00 2001
From: Richard Oliver <richard.oliver@raspberrypi.com>
Date: Fri, 24 May 2024 11:43:07 +0100
Subject: [PATCH 1243/1350] media: dt-bindings: i2c: Add Sony IMX500
Add YAML device tree binding for the Sony IMX500 CMOS image sensor /
CNN inference engine. Also, add a MAINTAINERS entry.
Signed-off-by: Richard Oliver <richard.oliver@raspberrypi.com>
---
.../bindings/media/i2c/sony,imx500.yaml | 132 ++++++++++++++++++
MAINTAINERS | 7 +
2 files changed, 139 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/i2c/sony,imx500.yaml
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/i2c/sony,imx500.yaml
@@ -0,0 +1,132 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/i2c/sony,imx500.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Sony CMOS Digital Image Sensor and CNN
+
+maintainers:
+ - Raspberry Pi <kernel-list@raspberrypi.com>
+
+description: |-
+ The Sony IMX500 is a stacked 1/2.3-inch CMOS digital image sensor and inbuilt
+ AI processor with an active array CNN (Convolutional Neural Network) inference
+ engine. The native sensor size is 4056H x 3040V, and the module also contains
+ an in-built ISP for the CNN. The module is programmable through an I2C
+ interface with firmware and neural network uploads being made over SPI. The
+ default I2C address is 0x1A, with an address of 0x10 being selectable via
+ SLASEL. The module also has a second I2C interface available with a fixed
+ address of 0x36. Image data is sent through MIPI CSI-2, which is configured
+ as either 2 or 4 data lanes.
+
+properties:
+ compatible:
+ const: sony,imx500
+
+ reg:
+ description: I2C device address
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ description: |-
+ Input clock (12 to 27 MHz)
+ items:
+ - const: inck
+
+ interrupts:
+ maxItems: 1
+
+ vana-supply:
+ description: Supply voltage (analog) - 2.7 V
+
+ vdig-supply:
+ description: Supply voltage (digital) - 0.84 V
+
+ vif-supply:
+ description: Supply voltage (interface) - 1.8 V
+
+ reset-gpios:
+ description: |-
+ Sensor reset (XCLR) GPIO
+
+ Chip clear in lieu of built-in power on reset. To be set 'High' after
+ power supplies are brought up and INCK supplied.
+
+ port:
+ $ref: /schemas/graph.yaml#/$defs/port-base
+ additionalProperties: false
+ description: |
+ Video output port
+
+ properties:
+ endpoint:
+ $ref: /schemas/media/video-interfaces.yaml#
+ type: object
+ unevaluatedProperties: false
+ properties:
+ data-lanes:
+ items:
+ - const: 2
+ - const: 4
+ clock-noncontinuous: true
+ link-frequencies: true
+ required:
+ - link-frequencies
+ - data-lanes
+
+ spi:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: |-
+ SPI peripheral
+
+ Optional SPI peripheral for uploading firmware and network weights to AI
+ processor.
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - vana-supply
+ - vdig-supply
+ - vif-supply
+ - port
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ imx500: sensor@1a {
+ compatible = "sony,imx500";
+ reg = <0x1a>;
+
+ clocks = <&imx500_clk>;
+ clock-names = "inck";
+
+ vana-supply = <&imx500_vana>; /* 2.7 +/- 0.1 V */
+ vdig-supply = <&imx500_vdig>; /* 0.84 +/- 0.04 V */
+ vif-supply = <&imx500_vif>; /* 1.8 +/- 0.1 V */
+
+ reset-gpios = <&gpio_sensor 0 GPIO_ACTIVE_LOW>;
+
+ port {
+ imx500_0: endpoint {
+ remote-endpoint = <&csi1_ep>;
+ data-lanes = <1 2>;
+ clock-noncontinuous;
+ link-frequencies = /bits/ 64 <499500000>;
+ };
+ };
+ };
+ };
+
+...
+
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -20127,6 +20127,13 @@ F: Documentation/devicetree/bindings/med
F: Documentation/devicetree/bindings/media/i2c/imx477.yaml
F: drivers/media/i2c/imx477.c
+SONY IMX500 SENSOR DRIVER
+M: Raspberry Pi Kernel Maintenance <kernel-list@raspberrypi.com>
+L: linux-media@vger.kernel.org
+S: Maintained
+T: git git://linuxtv.org/media_tree.git
+F: Documentation/devicetree/bindings/media/i2c/sony,imx500.yaml
+
SONY IMX519 SENSOR DRIVER
M: Arducam Kernel Maintenance <info@arducam.com>
L: linux-media@vger.kernel.org

View File

@ -0,0 +1,20 @@
From a32f7dae82774d6064181dcc989c1c1349c4e47e Mon Sep 17 00:00:00 2001
From: Richard Oliver <richard.oliver@raspberrypi.com>
Date: Thu, 20 Jun 2024 09:58:32 +0100
Subject: [PATCH 1245/1350] lib: earlycpio: export symbol find_cpio_data()
Add EXPORT_SYMBOL_GPL() for find_cpio_data() so that loadable modules
may also parse uncompressed cpio.
Signed-off-by: Richard Oliver <richard.oliver@raspberrypi.com>
---
lib/earlycpio.c | 1 +
1 file changed, 1 insertion(+)
--- a/lib/earlycpio.c
+++ b/lib/earlycpio.c
@@ -139,3 +139,4 @@ struct cpio_data find_cpio_data(const ch
quit:
return cd;
}
+EXPORT_SYMBOL_GPL(find_cpio_data);

View File

@ -0,0 +1,41 @@
From 15cc525406cf311399d182ffcc18711651b7c8b2 Mon Sep 17 00:00:00 2001
From: Richard Oliver <richard.oliver@raspberrypi.com>
Date: Fri, 12 Jul 2024 13:32:30 +0100
Subject: [PATCH 1247/1350] dts: bcm{283x,2712}: /clocks as "simple-bus"
Make /clocks node compatible with "simple-bus" to ensure that all children
(not just those that are "fixed-clock" compatible) are automatically
probed.
Signed-off-by: Richard Oliver <richard.oliver@raspberrypi.com>
---
arch/arm/boot/dts/broadcom/bcm283x.dtsi | 4 ++++
arch/arm64/boot/dts/broadcom/bcm2712.dtsi | 4 ++++
2 files changed, 8 insertions(+)
--- a/arch/arm/boot/dts/broadcom/bcm283x.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm283x.dtsi
@@ -478,6 +478,10 @@
};
clocks {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
/* The oscillator is the root of the clock tree. */
clk_osc: clk-osc {
compatible = "fixed-clock";
--- a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
@@ -1258,6 +1258,10 @@
};
clocks {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
/* The oscillator is the root of the clock tree. */
clk_osc: clk-osc {
compatible = "fixed-clock";

View File

@ -0,0 +1,389 @@
From 4113b1097fe40ff3a64ee7a9ade7c258e9ecdb5b Mon Sep 17 00:00:00 2001
From: Richard Oliver <richard.oliver@raspberrypi.com>
Date: Mon, 3 Jun 2024 14:10:27 +0100
Subject: [PATCH 1248/1350] dts: Add 'AI Camera' support
The AI Camera combines an IMX500 and a RP2040 GPIO bridge on a single
module. The Raspberry Pi camera regulator is used for both IMX500 and
RP2040. SPI, clocks, and reset (required by IMX500) are provided by the
RP2040 GPIO bridge.
Signed-off-by: Richard Oliver <richard.oliver@raspberrypi.com>
---
arch/arm/boot/dts/overlays/Makefile | 2 +
arch/arm/boot/dts/overlays/README | 21 +++
arch/arm/boot/dts/overlays/imx500-overlay.dts | 119 +++++++++++++++++
.../boot/dts/overlays/imx500-pi5-overlay.dts | 124 ++++++++++++++++++
arch/arm/boot/dts/overlays/imx500.dtsi | 28 ++++
arch/arm/boot/dts/overlays/overlay_map.dts | 10 ++
.../dts/overlays/rpi-rp2040-gpio-bridge.dtsi | 21 +++
7 files changed, 325 insertions(+)
create mode 100644 arch/arm/boot/dts/overlays/imx500-overlay.dts
create mode 100644 arch/arm/boot/dts/overlays/imx500-pi5-overlay.dts
create mode 100644 arch/arm/boot/dts/overlays/imx500.dtsi
create mode 100644 arch/arm/boot/dts/overlays/rpi-rp2040-gpio-bridge.dtsi
--- a/arch/arm/boot/dts/overlays/Makefile
+++ b/arch/arm/boot/dts/overlays/Makefile
@@ -136,6 +136,8 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
imx378.dtbo \
imx462.dtbo \
imx477.dtbo \
+ imx500.dtbo \
+ imx500-pi5.dtbo \
imx519.dtbo \
imx708.dtbo \
interludeaudio-analog.dtbo \
--- a/arch/arm/boot/dts/overlays/README
+++ b/arch/arm/boot/dts/overlays/README
@@ -2818,6 +2818,27 @@ Params: rotation Mounting
sync-sink Configure as vsync sink
+Name: imx500
+Info: Sony IMX500 camera module.
+ Uses Unicam 1, which is the standard camera connector on most Pi
+ variants.
+Load: dtoverlay=imx500,<param>=<val>
+Params: rotation Mounting rotation of the camera sensor (0 or
+ 180, default 0)
+ orientation Sensor orientation (0 = front, 1 = rear,
+ 2 = external, default external)
+ media-controller Configure use of Media Controller API for
+ configuring the sensor (default on)
+ cam0 Adopt the default configuration for CAM0 on a
+ Compute Module (CSI0, i2c_vc, and cam0_reg).
+ bypass-cache Do save blocks of data to flash when using
+ rp2040-gpio-bridge for SPI transfers.
+
+
+Name: imx500-pi5
+Info: See imx500 (this is the Pi 5 version)
+
+
Name: imx519
Info: Sony IMX519 camera module.
Uses Unicam 1, which is the standard camera connector on most Pi
--- /dev/null
+++ b/arch/arm/boot/dts/overlays/imx500-overlay.dts
@@ -0,0 +1,119 @@
+// SPDX-License-Identifier: GPL-2.0-only
+// Definitions for IMX500 camera module on VC I2C bus
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+
+/{
+ compatible = "brcm,bcm2835";
+
+ fragment@0 {
+ target = <&i2c0if>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@1 {
+ target = <&i2c0mux>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ reg_frag: fragment@2 {
+ target = <&cam1_reg>;
+ cam_reg: __overlay__ {
+ startup-delay-us = <300000>;
+ };
+ };
+
+ i2c_frag: fragment@100 {
+ target = <&i2c_csi_dsi>;
+ __overlay__ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ #include "imx500.dtsi"
+ #include "rpi-rp2040-gpio-bridge.dtsi"
+ };
+ };
+
+ csi_frag: fragment@101 {
+ target = <&csi1>;
+ csi: __overlay__ {
+ status = "okay";
+ brcm,media-controller;
+
+ port {
+ csi_ep: endpoint {
+ remote-endpoint = <&cam_endpoint>;
+ clock-lanes = <0>;
+ data-lanes = <1 2>;
+ clock-noncontinuous;
+ };
+ };
+ };
+ };
+
+ spi_frag: fragment@102 {
+ target = <&spi_bridgedev0>;
+ __overlay__ {
+ compatible = "sony,imx500";
+ };
+ };
+
+ chosen_frag: fragment@103 {
+ target = <&chosen>;
+ __overlay__ {
+ core_freq_fixed;
+ };
+ };
+
+ clocks_frag: fragment@104 {
+ target-path = "/clocks";
+ __overlay__ {
+ clk_aicam: clk-aicam {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24000000>;
+ };
+
+ clk_aicam_gated: clk-aicam-gated {
+ compatible = "gpio-gate-clock";
+ clocks = <&clk_aicam>;
+ #clock-cells = <0>;
+ enable-gpios = <&spi_bridge 21 GPIO_ACTIVE_HIGH>;
+ };
+ };
+ };
+
+ __overrides__ {
+ rotation = <&cam_node>,"rotation:0";
+ orientation = <&cam_node>,"orientation:0";
+ media-controller = <&csi>,"brcm,media-controller?";
+ cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
+ <&csi_frag>, "target:0=",<&csi0>,
+ <&spi_bridge>, "power-supply:0=",<&cam0_reg>,
+ <&reg_frag>, "target:0=",<&cam0_reg>,
+ <&cam_node>, "VANA-supply:0=",<&cam0_reg>;
+ bypass-cache = <&spi_bridge>,"bypass-cache?";
+ };
+};
+
+&cam_node {
+ status = "okay";
+ reset-gpios = <&spi_bridge 20 GPIO_ACTIVE_HIGH>;
+ clocks = <&clk_aicam_gated>;
+ spi = <&spi_bridgedev0>;
+};
+
+&spi_bridge {
+ status = "okay";
+};
+
+&cam_endpoint {
+ remote-endpoint = <&csi_ep>;
+};
--- /dev/null
+++ b/arch/arm/boot/dts/overlays/imx500-pi5-overlay.dts
@@ -0,0 +1,124 @@
+// SPDX-License-Identifier: GPL-2.0-only
+// Definitions for IMX500 camera module on VC I2C bus
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+
+/{
+ compatible = "brcm,bcm2712";
+
+ fragment@0 {
+ target = <&i2c0if>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@1 {
+ target = <&i2c0mux>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ reg_frag: fragment@2 {
+ target = <&cam1_reg>;
+ cam_reg: __overlay__ {
+ startup-delay-us = <300000>;
+ };
+ };
+
+ i2c_frag: fragment@100 {
+ target = <&i2c_csi_dsi>;
+ __overlay__ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ #include "imx500.dtsi"
+ #include "rpi-rp2040-gpio-bridge.dtsi"
+ };
+ };
+
+ csi_frag: fragment@101 {
+ target = <&csi1>;
+ csi: __overlay__ {
+ status = "okay";
+ brcm,media-controller;
+
+ port {
+ csi_ep: endpoint {
+ remote-endpoint = <&cam_endpoint>;
+ clock-lanes = <0>;
+ data-lanes = <1 2>;
+ clock-noncontinuous;
+ };
+ };
+ };
+ };
+
+ spi_frag: fragment@102 {
+ target = <&spi_bridge>;
+ spi_frag_overlay: __overlay__ {
+ fast_xfer_requires_i2c_lock = <1>;
+ fast_xfer_recv_gpio_base = <11>;
+ fast_xfer-gpios = <&rp1_gpio 40 0>, // CD1_SDA (used as data)
+ <&rp1_gpio 48 0>; // CD1_IO1_MICDAT1 (clock)
+ };
+ };
+
+ spi_bridge_frag: fragment@103 {
+ target = <&spi_bridgedev0>;
+ __overlay__ {
+ compatible = "sony,imx500";
+ };
+ };
+
+ clocks_frag: fragment@104 {
+ target-path = "/clocks";
+ __overlay__ {
+ clk_aicam: clk-aicam {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24000000>;
+ };
+
+ clk_aicam_gated: clk-aicam-gated {
+ compatible = "gpio-gate-clock";
+ clocks = <&clk_aicam>;
+ #clock-cells = <0>;
+ enable-gpios = <&spi_bridge 21 GPIO_ACTIVE_HIGH>;
+ };
+ };
+ };
+
+ __overrides__ {
+ rotation = <&cam_node>,"rotation:0";
+ orientation = <&cam_node>,"orientation:0";
+ media-controller = <&csi>,"brcm,media-controller?";
+ cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
+ <&csi_frag>, "target:0=",<&csi0>,
+ <&spi_frag_overlay>, "fast_xfer-gpios:4=38", // CD0_SDA (data)
+ <&spi_frag_overlay>, "fast_xfer-gpios:16=35", // CD0_IO1_MICDAT0 (clock)
+ <&spi_bridge>, "power-supply:0=",<&cam0_reg>,
+ <&reg_frag>, "target:0=",<&cam0_reg>,
+ <&cam_node>, "VANA-supply:0=",<&cam0_reg>;
+ bypass-cache = <&spi_bridge>,"bypass-cache?";
+ };
+};
+
+&cam_node {
+ status = "okay";
+ reset-gpios = <&spi_bridge 20 GPIO_ACTIVE_HIGH>;
+ clocks = <&clk_aicam_gated>;
+ spi = <&spi_bridgedev0>;
+};
+
+&spi_bridge {
+ status = "okay";
+};
+
+&cam_endpoint {
+ remote-endpoint = <&csi_ep>;
+};
--- /dev/null
+++ b/arch/arm/boot/dts/overlays/imx500.dtsi
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: GPL-2.0-only
+cam_node: imx500@1a {
+ reg = <0x1a>;
+ compatible = "sony,imx500";
+ status = "disabled";
+
+ clocks = <&cam1_clk>;
+ clock-names = "inck";
+
+ vana-supply = <&cam1_reg>; /* 2.7v */
+ vdig-supply = <&cam_dummy_reg>; /* 0.84v */
+ vif-supply = <&cam_dummy_reg>; /* 1.8v */
+
+ reset-gpios = <&gpio 255 GPIO_ACTIVE_HIGH>;
+
+ rotation = <0>;
+ orientation = <2>;
+
+ port {
+ cam_endpoint: endpoint {
+ clock-lanes = <0>;
+ data-lanes = <1 2>;
+ clock-noncontinuous;
+ link-frequencies =
+ /bits/ 64 <444000000>;
+ };
+ };
+};
--- a/arch/arm/boot/dts/overlays/overlay_map.dts
+++ b/arch/arm/boot/dts/overlays/overlay_map.dts
@@ -118,6 +118,16 @@
bcm2711;
};
+ imx500 {
+ bcm2835;
+ bcm2711;
+ bcm2712 = "imx500-pi5";
+ };
+
+ imx500-pi5 {
+ bcm2712;
+ };
+
lirc-rpi {
deprecated = "use gpio-ir";
};
--- /dev/null
+++ b/arch/arm/boot/dts/overlays/rpi-rp2040-gpio-bridge.dtsi
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0-only
+spi_bridge: spi@40 {
+ reg = <0x40>;
+ compatible = "raspberrypi,rp2040-gpio-bridge";
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ power-supply = <&cam1_reg>;
+
+ #gpio-cells = <2>;
+ gpio-controller;
+
+ spi_bridgedev0: spidev@0{
+ compatible = "spidev";
+ reg = <0>; /* CE0 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi-max-frequency = <35000000>;
+ };
+};

View File

@ -0,0 +1,66 @@
From 62faabb61ae152e8289a00ffb3445f4c47777b33 Mon Sep 17 00:00:00 2001
From: Richard Oliver <richard.oliver@raspberrypi.com>
Date: Mon, 3 Jun 2024 16:02:41 +0100
Subject: [PATCH 1250/1350] media: i2c: imx500: Enable LED during SPI transfers
The Raspberry Pi 'AI Camera' is equipped with an LED. Enable this LED
during SPI transfers to indicate to the end-user that progress is being
made during large tramsfers.
Signed-off-by: Richard Oliver <richard.oliver@raspberrypi.com>
---
arch/arm/boot/dts/overlays/imx500-overlay.dts | 1 +
arch/arm/boot/dts/overlays/imx500-pi5-overlay.dts | 1 +
drivers/media/i2c/imx500.c | 6 ++++++
3 files changed, 8 insertions(+)
--- a/arch/arm/boot/dts/overlays/imx500-overlay.dts
+++ b/arch/arm/boot/dts/overlays/imx500-overlay.dts
@@ -105,6 +105,7 @@
&cam_node {
status = "okay";
+ led-gpios = <&spi_bridge 19 GPIO_ACTIVE_HIGH>;
reset-gpios = <&spi_bridge 20 GPIO_ACTIVE_HIGH>;
clocks = <&clk_aicam_gated>;
spi = <&spi_bridgedev0>;
--- a/arch/arm/boot/dts/overlays/imx500-pi5-overlay.dts
+++ b/arch/arm/boot/dts/overlays/imx500-pi5-overlay.dts
@@ -110,6 +110,7 @@
&cam_node {
status = "okay";
+ led-gpios = <&spi_bridge 19 GPIO_ACTIVE_HIGH>;
reset-gpios = <&spi_bridge 20 GPIO_ACTIVE_HIGH>;
clocks = <&clk_aicam_gated>;
spi = <&spi_bridgedev0>;
--- a/drivers/media/i2c/imx500.c
+++ b/drivers/media/i2c/imx500.c
@@ -965,6 +965,7 @@ struct imx500 {
struct clk *xclk;
u32 xclk_freq;
+ struct gpio_desc *led_gpio;
struct gpio_desc *reset_gpio;
struct regulator_bulk_data supplies[IMX500_NUM_SUPPLIES];
@@ -1990,7 +1991,10 @@ static int imx500_state_transition(struc
}
/* Do SPI transfer */
+ gpiod_set_value_cansleep(imx500->led_gpio, 1);
ret = imx500_spi_write(imx500, data, size);
+ gpiod_set_value_cansleep(imx500->led_gpio, 0);
+
imx500->fw_progress += size;
if (ret < 0)
@@ -2670,6 +2674,8 @@ static int imx500_probe(struct i2c_clien
return ret;
}
+ imx500->led_gpio = devm_gpiod_get_optional(dev, "led", GPIOD_OUT_LOW);
+
imx500->reset_gpio =
devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);

View File

@ -0,0 +1,24 @@
From cc50cdbcf3e8f065bd7798a92689f54578b4169f Mon Sep 17 00:00:00 2001
From: Richard Oliver <richard.oliver@raspberrypi.com>
Date: Wed, 24 Jul 2024 15:48:22 +0100
Subject: [PATCH 1251/1350] spi: rp2040-gpio-bridge: add missing MD5 dependency
rp2040-gpio-bridge relies on the md5 crypto driver. This dependency
cannot be determined automatically as rp2040-gpio-bridge does not
use any of md5's symbols directly.
Declare a soft 'pre' dependency on md5 to ensure that it is included and
loaded before rp2040-gpio-bridge.
Signed-off-by: Richard Oliver <richard.oliver@raspberrypi.com>
---
drivers/spi/spi-rp2040-gpio-bridge.c | 1 +
1 file changed, 1 insertion(+)
--- a/drivers/spi/spi-rp2040-gpio-bridge.c
+++ b/drivers/spi/spi-rp2040-gpio-bridge.c
@@ -1241,3 +1241,4 @@ module_i2c_driver(rp2040_gbdg_driver);
MODULE_AUTHOR("Richard Oliver <richard.oliver@raspberrypi.com>");
MODULE_DESCRIPTION("Raspberry Pi RP2040 GPIO Bridge");
MODULE_LICENSE("GPL");
+MODULE_SOFTDEP("pre: md5");

View File

@ -0,0 +1,50 @@
From eab19e7bde679f56241db0c51f94f056fcffd6a9 Mon Sep 17 00:00:00 2001
From: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
Date: Wed, 4 Sep 2024 19:28:50 +0100
Subject: [PATCH 1252/1350] drivers: drm: rp1-vec: Increase width limit, for
PAL 16:9 @ 18MHz
There was no technical reason for the DRM mode's width limit of 848;
increase it to 960 (720*18MHz/13.5MHz) to support ~square pixels on
16:9 screens. Tweak the PAL active window to start slightly earlier.
(The maximum number of visible columns at 18MHz is about 942.)
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
---
drivers/gpu/drm/rp1/rp1-vec/rp1_vec.c | 4 ++--
drivers/gpu/drm/rp1/rp1-vec/rp1_vec_hw.c | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
--- a/drivers/gpu/drm/rp1/rp1-vec/rp1_vec.c
+++ b/drivers/gpu/drm/rp1/rp1-vec/rp1_vec.c
@@ -508,8 +508,8 @@ static int rp1vec_platform_probe(struct
vec->drm.mode_config.min_width = 256;
vec->drm.mode_config.min_height = 128;
- vec->drm.mode_config.max_width = 848; /* for System E */
- vec->drm.mode_config.max_height = 738; /* for System E */
+ vec->drm.mode_config.max_width = 960; /* for "widescreen" @ 18MHz */
+ vec->drm.mode_config.max_height = 738; /* for System E only */
vec->drm.mode_config.preferred_depth = 32;
vec->drm.mode_config.prefer_shadow = 0;
vec->drm.mode_config.quirk_addfb_prefer_host_byte_order = true;
--- a/drivers/gpu/drm/rp1/rp1-vec/rp1_vec_hw.c
+++ b/drivers/gpu/drm/rp1/rp1-vec/rp1_vec_hw.c
@@ -195,7 +195,7 @@ static const struct rp1vec_hwmode rp1vec
.misc = 0x00091c01, /* 5-tap FIR, SEQ_EN, 8 fld sync, PAL */
.nco_freq = 0x0a8262b2cc48c1d1,
.timing_regs = {
- 0x046e0cee, 0x0d8001fb, 0x025c034f, 0x00fd0b84,
+ 0x04660cee, 0x0d8001fb, 0x025c034f, 0x00fd0b84,
0x026c0270, 0x00000004, 0x00050009, 0x00070135,
0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00170136, 0x00000000,
@@ -218,7 +218,7 @@ static const struct rp1vec_hwmode rp1vec
.misc = 0x0009dc03, /* 5-tap FIR, SEQ_EN, 4 flds, 8 fld sync, ilace, PAL */
.nco_freq = 0x0a8262b2cc48c1d1,
.timing_regs = {
- 0x046e0cee, 0x0d8001fb, 0x025c034f, 0x00fd0b84,
+ 0x04660cee, 0x0d8001fb, 0x025c034f, 0x00fd0b84,
0x026c0270, 0x00000004, 0x00050009, 0x00070135,
0x013f026d, 0x00060136, 0x0140026e, 0x0150026e,
0x00180136, 0x026f0017,

View File

@ -1,7 +1,7 @@
From eaeca896d077e9e42866f7f7caae7b62211a0d0d Mon Sep 17 00:00:00 2001
From d6a12dd8f4e9362f7dd355969dd046adc44b1f47 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.com>
Date: Mon, 1 Mar 2021 09:12:44 +0000
Subject: [PATCH 0058/1085] Revert "Bluetooth: Always request for user
Subject: [PATCH 1255/1350] Revert "Bluetooth: Always request for user
confirmation for Just Works (LE SC)"
This reverts commit ffee202a78c2980688bc5d2f7d56480e69a5e0c9.
@ -24,7 +24,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
--- a/net/bluetooth/smp.c
+++ b/net/bluetooth/smp.c
@@ -2215,7 +2215,7 @@ mackey_and_ltk:
@@ -2208,7 +2208,7 @@ mackey_and_ltk:
if (err)
return SMP_UNSPECIFIED;
@ -33,7 +33,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
if (test_bit(SMP_FLAG_INITIATOR, &smp->flags)) {
sc_dhkey_check(smp);
SMP_ALLOW_CMD(smp, SMP_CMD_DHKEY_CHECK);
@@ -2230,9 +2230,6 @@ mackey_and_ltk:
@@ -2223,9 +2223,6 @@ mackey_and_ltk:
confirm_hint = 0;
confirm:

View File

@ -0,0 +1,126 @@
From e4c2a7731efcd7abe7554debef783b5358712d6d Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Mon, 9 Sep 2024 16:41:12 +0100
Subject: [PATCH 1256/1350] media: i2c: ov5647: Add control of V4L2_CID_HBLANK
The driver did expose V4L2_CID_HBLANK, but as a READ_ONLY control.
The sensor only uses the HTS register to control the line length,
so convert this control to read/write, with the appropriate ranges.
Adopt the old fixed values as the minimum values permitted in each
mode to avoid issues of it not streaming.
This should allow exposure times up to ~3 seconds (up from ~1sec).
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
drivers/media/i2c/ov5647.c | 26 +++++++++++++-------------
1 file changed, 13 insertions(+), 13 deletions(-)
--- a/drivers/media/i2c/ov5647.c
+++ b/drivers/media/i2c/ov5647.c
@@ -53,6 +53,8 @@
#define OV5647_REG_AEC_AGC 0x3503
#define OV5647_REG_GAIN_HI 0x350a
#define OV5647_REG_GAIN_LO 0x350b
+#define OV5647_REG_HTS_HI 0x380c
+#define OV5647_REG_HTS_LO 0x380d
#define OV5647_REG_VTS_HI 0x380e
#define OV5647_REG_VTS_LO 0x380f
#define OV5647_REG_VFLIP 0x3820
@@ -79,6 +81,8 @@
#define OV5647_VBLANK_MIN 24
#define OV5647_VTS_MAX 32767
+#define OV5647_HTS_MAX 0x1fff
+
#define OV5647_EXPOSURE_MIN 4
#define OV5647_EXPOSURE_STEP 1
#define OV5647_EXPOSURE_DEFAULT 1000
@@ -188,8 +192,6 @@ static struct regval_list ov5647_2592x19
{0x3a19, 0xf8},
{0x3c01, 0x80},
{0x3b07, 0x0c},
- {0x380c, 0x0b},
- {0x380d, 0x1c},
{0x3814, 0x11},
{0x3815, 0x11},
{0x3708, 0x64},
@@ -277,8 +279,6 @@ static struct regval_list ov5647_1080p30
{0x3a19, 0xf8},
{0x3c01, 0x80},
{0x3b07, 0x0c},
- {0x380c, 0x09},
- {0x380d, 0x70},
{0x3814, 0x11},
{0x3815, 0x11},
{0x3708, 0x64},
@@ -376,8 +376,6 @@ static struct regval_list ov5647_2x2binn
{0x3809, 0x10},
{0x380a, 0x03},
{0x380b, 0xcc},
- {0x380c, 0x07},
- {0x380d, 0x68},
{0x3811, 0x0c},
{0x3813, 0x06},
{0x3814, 0x31},
@@ -451,8 +449,6 @@ static struct regval_list ov5647_640x480
{0x3a19, 0xf8},
{0x3c01, 0x80},
{0x3b07, 0x0c},
- {0x380c, 0x07},
- {0x380d, 0x3c},
{0x3814, 0x35},
{0x3815, 0x35},
{0x3708, 0x64},
@@ -1079,7 +1075,8 @@ static int ov5647_set_pad_fmt(struct v4l
mode->pixel_rate, 1, mode->pixel_rate);
hblank = mode->hts - mode->format.width;
- __v4l2_ctrl_modify_range(sensor->hblank, hblank, hblank, 1,
+ __v4l2_ctrl_modify_range(sensor->hblank, hblank,
+ OV5647_HTS_MAX - mode->format.width, 1,
hblank);
vblank = mode->vts - mode->format.height;
@@ -1343,6 +1340,10 @@ static int ov5647_s_ctrl(struct v4l2_ctr
ret = ov5647_write16(sd, OV5647_REG_VTS_HI,
sensor->mode->format.height + ctrl->val);
break;
+ case V4L2_CID_HBLANK:
+ ret = ov5647_write16(sd, OV5647_REG_HTS_HI,
+ sensor->mode->format.width + ctrl->val);
+ break;
case V4L2_CID_TEST_PATTERN:
ret = ov5647_write(sd, OV5647_REG_ISPCTRL3D,
ov5647_test_pattern_val[ctrl->val]);
@@ -1350,7 +1351,6 @@ static int ov5647_s_ctrl(struct v4l2_ctr
/* Read-only, but we adjust it based on mode. */
case V4L2_CID_PIXEL_RATE:
- case V4L2_CID_HBLANK:
/* Read-only, but we adjust it based on mode. */
break;
@@ -1427,10 +1427,11 @@ static int ov5647_init_controls(struct o
sensor->mode->pixel_rate, 1,
sensor->mode->pixel_rate);
- /* By default, HBLANK is read only, but it does change per mode. */
hblank = sensor->mode->hts - sensor->mode->format.width;
sensor->hblank = v4l2_ctrl_new_std(&sensor->ctrls, &ov5647_ctrl_ops,
- V4L2_CID_HBLANK, hblank, hblank, 1,
+ V4L2_CID_HBLANK, hblank,
+ OV5647_HTS_MAX -
+ sensor->mode->format.width, 1,
hblank);
sensor->vblank = v4l2_ctrl_new_std(&sensor->ctrls, &ov5647_ctrl_ops,
@@ -1464,7 +1465,6 @@ static int ov5647_init_controls(struct o
goto handler_free;
sensor->pixel_rate->flags |= V4L2_CTRL_FLAG_READ_ONLY;
- sensor->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
sensor->sd.ctrl_handler = &sensor->ctrls;
return 0;

View File

@ -0,0 +1,170 @@
From d6a3a3f106010d9576a700148220842cac4c5739 Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Thu, 25 Jul 2024 15:42:41 +0100
Subject: [PATCH 1257/1350] drm/vc4: Add support for per plane scaling filter
selection
Seeing as the HVS can be configured with regard the scaling filter,
and DRM now supports selecting scaling filters at a per CRTC or
per plane level, we can implement it.
Default remains as the Mitchell/Netravali filter, but nearest
neighbour is now also implemented.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
drivers/gpu/drm/vc4/vc4_drv.h | 1 +
drivers/gpu/drm/vc4/vc4_hvs.c | 14 ++++++++--
drivers/gpu/drm/vc4/vc4_plane.c | 48 ++++++++++++++++++++++++++-------
3 files changed, 52 insertions(+), 11 deletions(-)
--- a/drivers/gpu/drm/vc4/vc4_drv.h
+++ b/drivers/gpu/drm/vc4/vc4_drv.h
@@ -358,6 +358,7 @@ struct vc4_hvs {
struct work_struct free_dlist_work;
struct drm_mm_node mitchell_netravali_filter;
+ struct drm_mm_node nearest_neighbour_filter;
struct debugfs_regset32 regset;
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
@@ -469,6 +469,9 @@ static int vc4_hvs_debugfs_dlist_allocs(
static const u32 mitchell_netravali_1_3_1_3_kernel[] =
VC4_LINEAR_PHASE_KERNEL(0, -2, -6, -8, -10, -8, -3, 2, 18,
50, 82, 119, 155, 187, 213, 227);
+static const u32 nearest_neighbour_kernel[] =
+ VC4_LINEAR_PHASE_KERNEL(0, 0, 0, 0, 0, 0, 0, 0,
+ 1, 1, 1, 1, 255, 255, 255, 255);
static int vc4_hvs_upload_linear_kernel(struct vc4_hvs *hvs,
struct drm_mm_node *space,
@@ -2255,14 +2258,19 @@ static int vc4_hvs_bind(struct device *d
if (ret)
return ret;
- /* Upload filter kernels. We only have the one for now, so we
- * keep it around for the lifetime of the driver.
+ /* Upload filter kernels. We only have the two for now, so we
+ * keep them around for the lifetime of the driver.
*/
ret = vc4_hvs_upload_linear_kernel(hvs,
&hvs->mitchell_netravali_filter,
mitchell_netravali_1_3_1_3_kernel);
if (ret)
return ret;
+ ret = vc4_hvs_upload_linear_kernel(hvs,
+ &hvs->nearest_neighbour_filter,
+ nearest_neighbour_kernel);
+ if (ret)
+ return ret;
ret = vc4_hvs_cob_init(hvs);
if (ret)
@@ -2288,6 +2296,8 @@ static void vc4_hvs_unbind(struct device
if (drm_mm_node_allocated(&vc4->hvs->mitchell_netravali_filter))
drm_mm_remove_node(&vc4->hvs->mitchell_netravali_filter);
+ if (drm_mm_node_allocated(&vc4->hvs->nearest_neighbour_filter))
+ drm_mm_remove_node(&vc4->hvs->nearest_neighbour_filter);
drm_mm_for_each_node_safe(node, next, &vc4->hvs->dlist_mm)
drm_mm_remove_node(node);
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
@@ -582,7 +582,9 @@ static void vc4_write_tpz(struct vc4_pla
/* phase magnitude bits */
#define PHASE_BITS 6
-static void vc4_write_ppf(struct vc4_plane_state *vc4_state, u32 src, u32 dst, u32 xy, int channel, int chroma_offset)
+static void vc4_write_ppf(struct vc4_plane_state *vc4_state, u32 src, u32 dst,
+ u32 xy, int channel, int chroma_offset,
+ bool no_interpolate)
{
struct vc4_dev *vc4 = to_vc4_dev(vc4_state->base.plane->dev);
u32 scale = src / dst;
@@ -621,6 +623,7 @@ static void vc4_write_ppf(struct vc4_pla
phase &= SCALER_PPF_IPHASE_MASK;
vc4_dlist_write(vc4_state,
+ no_interpolate ? SCALER_PPF_NOINTERP : 0 |
SCALER_PPF_AGC |
VC4_SET_FIELD(scale, SCALER_PPF_SCALE) |
/*
@@ -815,15 +818,17 @@ static void vc4_write_scaling_parameters
/* Ch0 H-PPF Word 0: Scaling Parameters */
if (vc4_state->x_scaling[channel] == VC4_SCALING_PPF) {
vc4_write_ppf(vc4_state,
- vc4_state->src_w[channel], vc4_state->crtc_w, vc4_state->src_x, channel,
- state->chroma_siting_h);
+ vc4_state->src_w[channel], vc4_state->crtc_w, vc4_state->src_x,
+ channel, state->chroma_siting_h,
+ state->scaling_filter == DRM_SCALING_FILTER_NEAREST_NEIGHBOR);
}
/* Ch0 V-PPF Words 0-1: Scaling Parameters, Context */
if (vc4_state->y_scaling[channel] == VC4_SCALING_PPF) {
vc4_write_ppf(vc4_state,
- vc4_state->src_h[channel], vc4_state->crtc_h, vc4_state->src_y, channel,
- state->chroma_siting_v);
+ vc4_state->src_h[channel], vc4_state->crtc_h, vc4_state->src_y,
+ channel, state->chroma_siting_v,
+ state->scaling_filter == DRM_SCALING_FILTER_NEAREST_NEIGHBOR);
vc4_dlist_write(vc4_state, 0xc0c0c0c0);
}
@@ -1573,7 +1578,18 @@ static int vc4_plane_mode_set(struct drm
vc4_state->y_scaling[0] == VC4_SCALING_PPF ||
vc4_state->x_scaling[1] == VC4_SCALING_PPF ||
vc4_state->y_scaling[1] == VC4_SCALING_PPF) {
- u32 kernel = VC4_SET_FIELD(vc4->hvs->mitchell_netravali_filter.start,
+ struct drm_mm_node *filter;
+
+ switch (state->scaling_filter) {
+ case DRM_SCALING_FILTER_DEFAULT:
+ default:
+ filter = &vc4->hvs->mitchell_netravali_filter;
+ break;
+ case DRM_SCALING_FILTER_NEAREST_NEIGHBOR:
+ filter = &vc4->hvs->nearest_neighbour_filter;
+ break;
+ }
+ u32 kernel = VC4_SET_FIELD(filter->start,
SCALER_PPF_KERNEL_OFFSET);
/* HPPF plane 0 */
@@ -1984,9 +2000,19 @@ static int vc6_plane_mode_set(struct drm
vc4_state->y_scaling[0] == VC4_SCALING_PPF ||
vc4_state->x_scaling[1] == VC4_SCALING_PPF ||
vc4_state->y_scaling[1] == VC4_SCALING_PPF) {
- u32 kernel =
- VC4_SET_FIELD(vc4->hvs->mitchell_netravali_filter.start,
- SCALER_PPF_KERNEL_OFFSET);
+ struct drm_mm_node *filter;
+
+ switch (state->scaling_filter) {
+ case DRM_SCALING_FILTER_DEFAULT:
+ default:
+ filter = &vc4->hvs->mitchell_netravali_filter;
+ break;
+ case DRM_SCALING_FILTER_NEAREST_NEIGHBOR:
+ filter = &vc4->hvs->nearest_neighbour_filter;
+ break;
+ }
+ u32 kernel = VC4_SET_FIELD(filter->start,
+ SCALER_PPF_KERNEL_OFFSET);
/* HPPF plane 0 */
vc4_dlist_write(vc4_state, kernel);
@@ -2468,6 +2494,10 @@ struct drm_plane *vc4_plane_init(struct
DRM_COLOR_YCBCR_BT709,
DRM_COLOR_YCBCR_LIMITED_RANGE);
+ drm_plane_create_scaling_filter_property(plane,
+ BIT(DRM_SCALING_FILTER_DEFAULT) |
+ BIT(DRM_SCALING_FILTER_NEAREST_NEIGHBOR));
+
drm_plane_create_chroma_siting_properties(plane, 0, 0);
if (type == DRM_PLANE_TYPE_PRIMARY)

View File

@ -0,0 +1,37 @@
From 7a3d1c22ecbdac458883991beae0461137cbfc8a Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Thu, 12 Sep 2024 18:04:58 +0100
Subject: [PATCH 1258/1350] drm: panel: waveshare: Remove duplicated sentinel
on compatible list
Remove the duplicated sentinel that got added, otherwise we have
an extra blank compatible string match in the module, and that matches
everything.
$ modinfo panel_waveshare_dsi
filename: /lib/modules/6.6.50-v8+/kernel/drivers/gpu/drm/panel/panel-waveshare-dsi.ko.xz
license: GPL
description: Waveshare DSI panel driver
author: Dave Stevenson <dave.stevenson@raspberrypi.com>
srcversion: E767180DABD8B00B45571AF
alias: of:N*T*C*
alias: of:N*T*
alias: of:N*T*Cwaveshare,8.8inch-panelC*
alias: of:N*T*Cwaveshare,8.8inch-panel
Fixes: f955b7838f9c ("drivers:gpu:drm:panel: Added waveshare 5.0inch, 6.25inch, and 8.8inch dsi screen devices")
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
drivers/gpu/drm/panel/panel-waveshare-dsi.c | 1 -
1 file changed, 1 deletion(-)
--- a/drivers/gpu/drm/panel/panel-waveshare-dsi.c
+++ b/drivers/gpu/drm/panel/panel-waveshare-dsi.c
@@ -467,7 +467,6 @@ static const struct of_device_id ws_pane
.compatible = "waveshare,8.8inch-panel",
.data = &ws_panel_8_8_mode,
}, {
- }, {
/* sentinel */
}
};

View File

@ -1,7 +1,7 @@
From 43730828eca754b4b527d79fc5a1d3ff50c50481 Mon Sep 17 00:00:00 2001
From c9b61d1d83073761871c7acba332216494e6f0bb Mon Sep 17 00:00:00 2001
From: Jonathan Bell <jonathan@raspberrypi.com>
Date: Mon, 8 Apr 2024 16:09:52 +0100
Subject: [PATCH 1019/1085] drivers: mmc: disable write-caching on Samsung 2023
Subject: [PATCH 1260/1350] drivers: mmc: disable write-caching on Samsung 2023
model year SD cards
Samsung EVO Plus, Pro Plus and Evo Ultimate cards of this era appear to

View File

@ -0,0 +1,27 @@
From 536f2097dc397e4ebd0566e8f00219c02d7c8073 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.com>
Date: Thu, 12 Sep 2024 10:06:50 +0100
Subject: [PATCH 1261/1350] mm/vmscan: Maintain TLB coherency in LRU code
As a workaround (and possibly a fix) for CPU spins observed on BCM2837,
use ptep_clear_flush_young instead of ptep_test_and_clear_young inside
lru_gen_look_around in order to expose PTE changes to the MMU. Note that
on architectures that don't require an explicit flush,
ptep_clear_flush_young just calls ptep_test_and_clear_young.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
---
mm/vmscan.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/mm/vmscan.c
+++ b/mm/vmscan.c
@@ -4716,7 +4716,7 @@ void lru_gen_look_around(struct page_vma
if (!folio)
continue;
- if (!ptep_test_and_clear_young(vma, addr, pte + i))
+ if (!ptep_clear_flush_young(vma, addr, pte + i))
VM_WARN_ON_ONCE(true);
young++;

View File

@ -0,0 +1,35 @@
From c763cf351ea25b7fb31f2d388dab0838565d1b75 Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Fri, 13 Sep 2024 14:44:08 +0100
Subject: [PATCH 1262/1350] drm: panel: ili9881: Correct symmetry on
enable/disable return codes
ili9881c_enable is always returning 0.
ili9881c_disable was returning the error code from
mipi_dsi_dcs_set_display_off.
If non-zero, the drm_panel framework will leave the panel marked as
enabled, and not run the enable hook next time around. That isn't
helpful, particularly as we're expecting unprepare to disable
resets and regulators.
Change ili9881c_disable to match enable in always returning 0.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
drivers/gpu/drm/panel/panel-ilitek-ili9881c.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
--- a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c
+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c
@@ -1745,7 +1745,9 @@ static int ili9881c_disable(struct drm_p
{
struct ili9881c *ctx = panel_to_ili9881c(panel);
- return mipi_dsi_dcs_set_display_off(ctx->dsi);
+ mipi_dsi_dcs_set_display_off(ctx->dsi);
+
+ return 0;
}
static int ili9881c_unprepare(struct drm_panel *panel)

View File

@ -0,0 +1,113 @@
From 77773aec03f65758c760ec5b43a79ad6edeb211b Mon Sep 17 00:00:00 2001
From: j-schambacher <joerg@hifiberry.com>
Date: Thu, 12 Sep 2024 16:44:12 +0200
Subject: [PATCH 1263/1350] dtoverlays: adds the definitions for the HiFiBerry
8-channel ADC
Additions and changes for the 8 channel ADC card. This card uses only
HW-controlled devices which allows the uses of the 'dummy-dai'.
It will run only on a PI5 as it requires the designware I2S0 module.
The necessary output lanes I2S0_DI[0..3] are claimed from within the
DT overlay.
Signed-off-by: j-schambacher <joerg@hifiberry.com>
---
arch/arm/boot/dts/overlays/Makefile | 1 +
arch/arm/boot/dts/overlays/README | 6 +++
.../dts/overlays/hifiberry-adc8x-overlay.dts | 50 +++++++++++++++++++
arch/arm/boot/dts/overlays/overlay_map.dts | 4 ++
4 files changed, 61 insertions(+)
create mode 100644 arch/arm/boot/dts/overlays/hifiberry-adc8x-overlay.dts
--- a/arch/arm/boot/dts/overlays/Makefile
+++ b/arch/arm/boot/dts/overlays/Makefile
@@ -86,6 +86,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
hd44780-lcd.dtbo \
hdmi-backlight-hwhack-gpio.dtbo \
hifiberry-adc.dtbo \
+ hifiberry-adc8x.dtbo \
hifiberry-amp.dtbo \
hifiberry-amp100.dtbo \
hifiberry-amp3.dtbo \
--- a/arch/arm/boot/dts/overlays/README
+++ b/arch/arm/boot/dts/overlays/README
@@ -1778,6 +1778,12 @@ Params: leds_off If set t
is switched off at all times.
+Name: hifiberry-adc8x
+Info: Configures the HifiBerry ADC8X audio card (only on Pi5)
+Load: dtoverlay=hifiberry-adc8x
+Params: <None>
+
+
Name: hifiberry-amp
Info: Configures the HifiBerry Amp and Amp+ audio cards
Load: dtoverlay=hifiberry-amp
--- /dev/null
+++ b/arch/arm/boot/dts/overlays/hifiberry-adc8x-overlay.dts
@@ -0,0 +1,50 @@
+// Definitions for HiFiBerry ADC8x
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "brcm,bcm2712";
+
+ fragment@0 {
+ target = <&gpio>;
+ __overlay__ {
+ rp1_i2s0_adc8x: rp1_i2s0_adc8x {
+ function = "i2s0";
+ pins = "gpio18", "gpio19", "gpio20",
+ "gpio22", "gpio24", "gpio26";
+ bias-disable;
+ status = "okay";
+ };
+ };
+ };
+
+ fragment@1 {
+ target = <&i2s_clk_producer>;
+ __overlay__ {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rp1_i2s0_adc8x>;
+ status = "okay";
+ };
+ };
+
+ fragment@2 {
+ target-path = "/";
+ __overlay__ {
+ dummy-codec {
+ #sound-dai-cells = <0>;
+ compatible = "snd-soc-dummy";
+ status = "okay";
+ };
+ };
+ };
+
+ fragment@3 {
+ target = <&sound>;
+ __overlay__ {
+ compatible = "hifiberry,hifiberry-adc8x";
+ i2s-controller = <&i2s_clk_producer>;
+ status = "okay";
+ };
+ };
+
+};
--- a/arch/arm/boot/dts/overlays/overlay_map.dts
+++ b/arch/arm/boot/dts/overlays/overlay_map.dts
@@ -48,6 +48,10 @@
bcm2712;
};
+ hifiberry-adc8x {
+ bcm2712;
+ };
+
hifiberry-dac8x {
bcm2712;
};

View File

@ -0,0 +1,88 @@
From 4d2eaa194d77588fa42567ba174c3c14c5798027 Mon Sep 17 00:00:00 2001
From: j-schambacher <joerg@hifiberry.com>
Date: Thu, 12 Sep 2024 17:42:13 +0200
Subject: [PATCH 1264/1350] ASoC: add HiFiBerry ADC8x 8-channel ADC to
simple-card-driver
Definitions for the 8 channel ADC card. The card uses only
HW-controlled devices which allows the uses of the 'dummy-dai'.
It will run only on a PI5 as it requires the designware I2S0 module.
The necessary output lanes I2S0_DI[0..3] are claimed from within the
DT overlay.
Signed-off-by: j-schambacher <joerg@hifiberry.com>
---
sound/soc/bcm/Kconfig | 7 ++++++
sound/soc/bcm/rpi-simple-soundcard.c | 37 ++++++++++++++++++++++++++++
2 files changed, 44 insertions(+)
--- a/sound/soc/bcm/Kconfig
+++ b/sound/soc/bcm/Kconfig
@@ -47,6 +47,13 @@ config SND_BCM2708_SOC_HIFIBERRY_ADC
Say Y or M if you want to add support for HifiBerry ADC.
Use this module for HiFiBerry's ADC-only sound cards
+config SND_BCM2708_SOC_HIFIBERRY_ADC8X
+ tristate "Support for HifiBerry ADC8X"
+ select SND_RPI_SIMPLE_SOUNDCARD
+ help
+ Say Y or M if you want to add support for HifiBerry ADC8X.
+ Note: ADC8X only works on PI5
+
config SND_BCM2708_SOC_HIFIBERRY_DAC
tristate "Support for HifiBerry DAC and DAC8X"
select SND_SOC_PCM5102A
--- a/sound/soc/bcm/rpi-simple-soundcard.c
+++ b/sound/soc/bcm/rpi-simple-soundcard.c
@@ -254,6 +254,41 @@ static struct snd_rpi_simple_drvdata drv
.dai = snd_hifiberrydacplusdsp_soundcard_dai,
};
+SND_SOC_DAILINK_DEFS(hifiberry_adc,
+ DAILINK_COMP_ARRAY(COMP_EMPTY()),
+ DAILINK_COMP_ARRAY(COMP_CODEC("snd-soc-dummy", "snd-soc-dummy-dai")),
+ DAILINK_COMP_ARRAY(COMP_EMPTY()));
+
+static int hifiberry_adc8x_init(struct snd_soc_pcm_runtime *rtd)
+{
+ struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0);
+
+ /* set limits of 8 channels and 192ksps sample rate
+ */
+ codec_dai->driver->capture.channels_max = 8;
+ codec_dai->driver->capture.rates = SNDRV_PCM_RATE_8000_192000;
+
+ return 0;
+}
+
+static struct snd_soc_dai_link snd_hifiberry_adc8x_dai[] = {
+ {
+ .name = "HifiBerry ADC8x",
+ .stream_name = "HifiBerry ADC8x HiFi",
+ .dai_fmt = SND_SOC_DAIFMT_I2S |
+ SND_SOC_DAIFMT_NB_NF |
+ SND_SOC_DAIFMT_CBS_CFS,
+ .init = hifiberry_adc8x_init,
+ SND_SOC_DAILINK_REG(hifiberry_adc),
+ },
+};
+
+static struct snd_rpi_simple_drvdata drvdata_hifiberry_adc8x = {
+ .card_name = "snd_rpi_hifiberry_adc8x",
+ .dai = snd_hifiberry_adc8x_dai,
+ .fixed_bclk_ratio = 64,
+};
+
SND_SOC_DAILINK_DEFS(hifiberry_amp,
DAILINK_COMP_ARRAY(COMP_EMPTY()),
DAILINK_COMP_ARRAY(COMP_CODEC("tas5713.1-001b", "tas5713-hifi")),
@@ -445,6 +480,8 @@ static const struct of_device_id snd_rpi
.data = (void *) &drvdata_googlevoicehat },
{ .compatible = "hifiberrydacplusdsp,hifiberrydacplusdsp-soundcard",
.data = (void *) &drvdata_hifiberrydacplusdsp },
+ { .compatible = "hifiberry,hifiberry-adc8x",
+ .data = (void *) &drvdata_hifiberry_adc8x },
{ .compatible = "hifiberry,hifiberry-amp",
.data = (void *) &drvdata_hifiberry_amp },
{ .compatible = "hifiberry,hifiberry-amp3",

View File

@ -0,0 +1,35 @@
From 8c9ca647449ba9df7e3b300c480242f9b5bdd867 Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Tue, 10 Sep 2024 16:58:56 +0100
Subject: [PATCH 1265/1350] vc04_services: codec: Allocate the max number of
buffers on the VPU
The VPU's API can't match the use of VIDIOC_CREATE_BUFS to add buffers
to the internal pool whilst a port is enabled, therefore allocate
the maximum number of buffers possible in V4L2 to avoid the issue.
As these are only buffer headers, the overhead is relatively small.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
.../vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
--- a/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c
+++ b/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c
@@ -2871,8 +2871,14 @@ static int bcm2835_codec_queue_setup(str
if (*nbuffers < port->minimum_buffer.num)
*nbuffers = port->minimum_buffer.num;
- /* Add one buffer to take an EOS */
- port->current_buffer.num = *nbuffers + 1;
+
+ /*
+ * The VPU uses this number to allocate a pool of headers at port_enable.
+ * We can't increase it later, so use of CREATE_BUFS is going to result
+ * in bad things happening. Adopt worst-case allocation, and add one
+ * buffer to take an EOS
+ */
+ port->current_buffer.num = VB2_MAX_FRAME + 1;
return 0;
}

View File

@ -0,0 +1,26 @@
From c1321370c9af9681e0604c4d3363cf362fb48598 Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Mon, 16 Sep 2024 15:56:51 +0100
Subject: [PATCH 1266/1350] drm: vc4: Fix interpolate bit for nearest neighbour
filter
Operator precedence resulted in the wrong value being written
for nearest neighbour mode. Correct it.
Fixes: d6a3a3f10601 ("drm/vc4: Add support for per plane scaling filter selection")
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
drivers/gpu/drm/vc4/vc4_plane.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
@@ -623,7 +623,7 @@ static void vc4_write_ppf(struct vc4_pla
phase &= SCALER_PPF_IPHASE_MASK;
vc4_dlist_write(vc4_state,
- no_interpolate ? SCALER_PPF_NOINTERP : 0 |
+ (no_interpolate ? SCALER_PPF_NOINTERP : 0) |
SCALER_PPF_AGC |
VC4_SET_FIELD(scale, SCALER_PPF_SCALE) |
/*

View File

@ -0,0 +1,34 @@
From cc63d552b9aab92fb581dfb08267d5af697f477b Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.com>
Date: Wed, 18 Sep 2024 16:45:24 +0100
Subject: [PATCH 1267/1350] dts: rp1: Disable DMA usage for UART0
Some recent DMA changes have led to data loss in UART0 on Pi 5. It also
seems that even prior to these changes there was a problem with aborted
transfers.
As this is the only RP1 UART configured for DMA, it is better to remove
the DMA usage until it is shown to be reliable.
Link: https://github.com/raspberrypi/linux/issues/6365
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
---
arch/arm64/boot/dts/broadcom/rp1.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
--- a/arch/arm64/boot/dts/broadcom/rp1.dtsi
+++ b/arch/arm64/boot/dts/broadcom/rp1.dtsi
@@ -55,9 +55,9 @@
interrupts = <RP1_INT_UART0 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>;
clock-names = "uartclk", "apb_pclk";
- dmas = <&rp1_dma RP1_DMA_UART0_TX>,
- <&rp1_dma RP1_DMA_UART0_RX>;
- dma-names = "tx", "rx";
+ // dmas = <&rp1_dma RP1_DMA_UART0_TX>,
+ // <&rp1_dma RP1_DMA_UART0_RX>;
+ // dma-names = "tx", "rx";
pinctrl-names = "default";
arm,primecell-periphid = <0x00541011>;
uart-has-rtscts;

View File

@ -0,0 +1,50 @@
From f6c0447dfb915538a0d5fa966fc26ca022cf49c8 Mon Sep 17 00:00:00 2001
From: Naushir Patuck <naush@raspberrypi.com>
Date: Fri, 20 Sep 2024 08:25:58 +0100
Subject: [PATCH 1269/1350] drivers: media: imx500: Fixes for vblank control
Reduce the default/max framerate of the 2x2 binned mode to 30fps.
The current limit of 50fps can cause the sensor to produce corrupt
frames and cause missing framing events.
Also fixup the vblank control min/max/default/step paramters when
setting up.
Signed-off-by: Naushir Patuck <naush@raspberrypi.com>
---
drivers/media/i2c/imx500.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
--- a/drivers/media/i2c/imx500.c
+++ b/drivers/media/i2c/imx500.c
@@ -47,7 +47,7 @@
/* V_TIMING internal */
#define IMX500_REG_FRAME_LENGTH CCI_REG16(0x0340)
#define IMX500_FRAME_LENGTH_MAX 0xffdc
-#define IMX500_VBLANK_MIN 4
+#define IMX500_VBLANK_MIN 1117
/* H_TIMING internal */
#define IMX500_REG_LINE_LENGTH CCI_REG16(0x0342)
@@ -922,7 +922,7 @@ static const struct imx500_mode imx500_s
.width = 4056,
.height = 3040,
},
- .framerate_default = 40,
+ .framerate_default = 30,
.reg_list = {
.num_of_regs = ARRAY_SIZE(mode_2028x1520_regs),
.regs = mode_2028x1520_regs,
@@ -1771,10 +1771,10 @@ static void imx500_set_framing_limits(st
/* Update limits and set FPS to default */
__v4l2_ctrl_modify_range(
- imx500->vblank, 1,
+ imx500->vblank, IMX500_VBLANK_MIN,
((1 << IMX500_LONG_EXP_SHIFT_MAX) * IMX500_FRAME_LENGTH_MAX) -
mode->height,
- IMX500_VBLANK_MIN, frm_length_default - mode->height);
+ 1, frm_length_default - mode->height);
/* Setting this will adjust the exposure limits as well. */
__v4l2_ctrl_s_ctrl(imx500->vblank, frm_length_default - mode->height);

View File

@ -0,0 +1,56 @@
From d62184f6b06627b4fe922b08132e38c181d389a0 Mon Sep 17 00:00:00 2001
From: Jagan Teki <jagan@amarulasolutions.com>
Date: Tue, 28 Mar 2023 22:37:52 +0530
Subject: [PATCH 1270/1350] drm/bridge: Document bridge init order with
pre_enable_prev_first
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Upstream commit 113cc3ad8566e06d6c8ef4fc0075a938dedefab5
In order to satisfy the MIPI DSI initialization sequence the bridge
init order has been altered with the help of pre_enable_prev_first
in pre_enable and post_disable bridge operations.
Document the affected bridge init order with an example on the
bridge operations helpers.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Robert Foss <rfoss@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20230328170752.1102347-2-jagan@amarulasolutions.com
---
drivers/gpu/drm/drm_bridge.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
--- a/drivers/gpu/drm/drm_bridge.c
+++ b/drivers/gpu/drm/drm_bridge.c
@@ -657,6 +657,13 @@ static void drm_atomic_bridge_call_post_
* bridge will be called before the previous one to reverse the @pre_enable
* calling direction.
*
+ * Example:
+ * Bridge A ---> Bridge B ---> Bridge C ---> Bridge D ---> Bridge E
+ *
+ * With pre_enable_prev_first flag enable in Bridge B, D, E then the resulting
+ * @post_disable order would be,
+ * Bridge B, Bridge A, Bridge E, Bridge D, Bridge C.
+ *
* Note: the bridge passed should be the one closest to the encoder
*/
void drm_atomic_bridge_chain_post_disable(struct drm_bridge *bridge,
@@ -753,6 +760,13 @@ static void drm_atomic_bridge_call_pre_e
* If a bridge sets @pre_enable_prev_first, then the pre_enable for the
* prev bridge will be called before pre_enable of this bridge.
*
+ * Example:
+ * Bridge A ---> Bridge B ---> Bridge C ---> Bridge D ---> Bridge E
+ *
+ * With pre_enable_prev_first flag enable in Bridge B, D, E then the resulting
+ * @pre_enable order would be,
+ * Bridge C, Bridge D, Bridge E, Bridge A, Bridge B.
+ *
* Note: the bridge passed should be the one closest to the encoder
*/
void drm_atomic_bridge_chain_pre_enable(struct drm_bridge *bridge,

View File

@ -0,0 +1,50 @@
From ef34d0100e0f2f137ad0e6af333aad4e0d5c3319 Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Thu, 2 May 2024 12:03:58 +0100
Subject: [PATCH 1271/1350] drm/vc4: dsi: Don't reset the host until
post_disable
Some DSI peripheral drivers wish to send commands in the
post_disable or panel unprepare callback. These are called
after the DSI host's disable call, but before the host's
post_disable if pre_enable_prev_first is set.
Don't reset the block until post_disable to allow these
commands to be sent.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
drivers/gpu/drm/vc4/vc4_dsi.c | 15 +++++++--------
1 file changed, 7 insertions(+), 8 deletions(-)
--- a/drivers/gpu/drm/vc4/vc4_dsi.c
+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
@@ -818,6 +818,13 @@ static void vc4_dsi_bridge_disable(struc
disp0_ctrl = DSI_PORT_READ(DISP0_CTRL);
disp0_ctrl &= ~DSI_DISP0_ENABLE;
DSI_PORT_WRITE(DISP0_CTRL, disp0_ctrl);
+}
+
+static void vc4_dsi_bridge_post_disable(struct drm_bridge *bridge,
+ struct drm_bridge_state *state)
+{
+ struct vc4_dsi *dsi = bridge_to_vc4_dsi(bridge);
+ struct device *dev = &dsi->pdev->dev;
/* Reset the DSI and all its fifos. */
DSI_PORT_WRITE(CTRL, DSI_CTRL_SOFT_RESET_CFG |
@@ -828,14 +835,6 @@ static void vc4_dsi_bridge_disable(struc
DSI_PORT_BIT(PHY_AFEC0_PD) |
DSI_PORT_BIT(AFEC0_PD_ALL_LANES));
-}
-
-static void vc4_dsi_bridge_post_disable(struct drm_bridge *bridge,
- struct drm_bridge_state *state)
-{
- struct vc4_dsi *dsi = bridge_to_vc4_dsi(bridge);
- struct device *dev = &dsi->pdev->dev;
-
clk_disable_unprepare(dsi->pll_phy_clock);
clk_disable_unprepare(dsi->escape_clock);
clk_disable_unprepare(dsi->pixel_clock);

View File

@ -0,0 +1,111 @@
From 6da70162dd1e729c04e2dc25472b39390868af79 Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Fri, 20 Sep 2024 12:05:18 +0100
Subject: [PATCH 1272/1350] drm: vc4: dsi: enable video and then retry failed
transfers
The DSI block appears to be able to come up stuck in a condition where
it leaves the lanes in HS mode or just jabbering. This stops LP
transfers from completing as there is no LP time available. This is
signalled via the LP1 contention error.
Enabling video briefly clears that condition, so if we detect the
error condition, enable video mode and then retry.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
drivers/gpu/drm/vc4/vc4_dsi.c | 54 +++++++++++++++++++++++++++++------
1 file changed, 46 insertions(+), 8 deletions(-)
--- a/drivers/gpu/drm/vc4/vc4_dsi.c
+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
@@ -286,6 +286,8 @@
DSI1_INT_PR_TO)
#define DSI0_STAT 0x2c
+# define DSI0_STAT_ERR_CONT_LP1 BIT(6)
+# define DSI0_STAT_ERR_CONT_LP0 BIT(5)
#define DSI0_HSTX_TO_CNT 0x30
#define DSI0_LPRX_TO_CNT 0x34
#define DSI0_TA_TO_CNT 0x38
@@ -1203,10 +1205,9 @@ static int vc4_dsi_bridge_attach(struct
&dsi->bridge, flags);
}
-static ssize_t vc4_dsi_host_transfer(struct mipi_dsi_host *host,
- const struct mipi_dsi_msg *msg)
+static ssize_t vc4_dsi_transfer(struct vc4_dsi *dsi,
+ const struct mipi_dsi_msg *msg, bool log_error)
{
- struct vc4_dsi *dsi = host_to_dsi(host);
struct mipi_dsi_packet packet;
u32 pkth = 0, pktc = 0;
int i, ret;
@@ -1315,10 +1316,12 @@ static ssize_t vc4_dsi_host_transfer(str
DSI_PORT_WRITE(TXPKT1C, pktc);
if (!wait_for_completion_timeout(&dsi->xfer_completion,
- msecs_to_jiffies(1000))) {
- dev_err(&dsi->pdev->dev, "transfer interrupt wait timeout");
- dev_err(&dsi->pdev->dev, "instat: 0x%08x\n",
- DSI_PORT_READ(INT_STAT));
+ msecs_to_jiffies(500))) {
+ if (log_error) {
+ dev_err(&dsi->pdev->dev, "transfer interrupt wait timeout");
+ dev_err(&dsi->pdev->dev, "instat: 0x%08x, stat: 0x%08x\n",
+ DSI_PORT_READ(INT_STAT), DSI_PORT_READ(INT_STAT));
+ }
ret = -ETIMEDOUT;
} else {
ret = dsi->xfer_result;
@@ -1361,7 +1364,8 @@ static ssize_t vc4_dsi_host_transfer(str
return ret;
reset_fifo_and_return:
- DRM_ERROR("DSI transfer failed, resetting: %d\n", ret);
+ if (log_error)
+ DRM_ERROR("DSI transfer failed, resetting: %d\n", ret);
DSI_PORT_WRITE(TXPKT1C, DSI_PORT_READ(TXPKT1C) & ~DSI_TXPKT1C_CMD_EN);
udelay(1);
@@ -1374,6 +1378,40 @@ reset_fifo_and_return:
return ret;
}
+static ssize_t vc4_dsi_host_transfer(struct mipi_dsi_host *host,
+ const struct mipi_dsi_msg *msg)
+{
+ struct vc4_dsi *dsi = host_to_dsi(host);
+ u32 stat, disp0_ctrl;
+ int ret;
+
+ ret = vc4_dsi_transfer(dsi, msg, false);
+
+ if (ret == -ETIMEDOUT) {
+ stat = DSI_PORT_READ(STAT);
+ disp0_ctrl = DSI_PORT_READ(DISP0_CTRL);
+
+ DSI_PORT_WRITE(STAT, DSI_PORT_BIT(STAT_ERR_CONT_LP1));
+ if (!(disp0_ctrl & DSI_DISP0_ENABLE)) {
+ /* If video mode not enabled, then try recovering by
+ * enabling it briefly to clear FIFOs and the state.
+ */
+ disp0_ctrl |= DSI_DISP0_ENABLE;
+ DSI_PORT_WRITE(DISP0_CTRL, disp0_ctrl);
+ msleep(30);
+ disp0_ctrl &= ~DSI_DISP0_ENABLE;
+ DSI_PORT_WRITE(DISP0_CTRL, disp0_ctrl);
+ msleep(30);
+
+ ret = vc4_dsi_transfer(dsi, msg, true);
+ } else {
+ DRM_ERROR("DSI transfer failed whilst in HS mode stat: 0x%08x\n",
+ stat);
+ }
+ }
+ return ret;
+}
+
static const struct component_ops vc4_dsi_ops;
static int vc4_dsi_host_attach(struct mipi_dsi_host *host,
struct mipi_dsi_device *device)

View File

@ -0,0 +1,102 @@
From d644270369cc6bf39012cce735dde6b86ad01424 Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Wed, 18 Sep 2024 16:09:28 +0100
Subject: [PATCH 1273/1350] drm: panel: ili9881: Add option to reconfigure
setup commands
The driver is typically asking for LP commands, but then tries
to send set_display_[on|off] from enable/disable when the host
will be in HS mode.
It also sends shutdown commands just before it asserts reset and
disables the regulator, which is rather redundant.
Add an option to configure these two choices from the panel_desc.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
drivers/gpu/drm/panel/panel-ilitek-ili9881c.c | 32 ++++++++++++++++---
1 file changed, 28 insertions(+), 4 deletions(-)
--- a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c
+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c
@@ -40,12 +40,19 @@ struct ili9881c_instr {
} arg;
};
+enum ili9881_desc_flags {
+ ILI9881_FLAGS_NO_SHUTDOWN_CMDS = BIT(0),
+ ILI9881_FLAGS_PANEL_ON_IN_PREPARE = BIT(1),
+ ILI9881_FLAGS_MAX = BIT(31),
+};
+
struct ili9881c_desc {
const struct ili9881c_instr *init;
const size_t init_length;
const struct drm_display_mode *mode;
const unsigned long mode_flags;
unsigned int lanes;
+ enum ili9881_desc_flags flags;
};
struct ili9881c {
@@ -1727,6 +1734,12 @@ static int ili9881c_prepare(struct drm_p
if (ret)
return ret;
+ if (ctx->desc->flags & ILI9881_FLAGS_PANEL_ON_IN_PREPARE) {
+ msleep(120);
+
+ ret = mipi_dsi_dcs_set_display_on(ctx->dsi);
+ }
+
return 0;
}
@@ -1734,9 +1747,11 @@ static int ili9881c_enable(struct drm_pa
{
struct ili9881c *ctx = panel_to_ili9881c(panel);
- msleep(120);
+ if (!(ctx->desc->flags & ILI9881_FLAGS_PANEL_ON_IN_PREPARE)) {
+ msleep(120);
- mipi_dsi_dcs_set_display_on(ctx->dsi);
+ mipi_dsi_dcs_set_display_on(ctx->dsi);
+ }
return 0;
}
@@ -1745,7 +1760,8 @@ static int ili9881c_disable(struct drm_p
{
struct ili9881c *ctx = panel_to_ili9881c(panel);
- mipi_dsi_dcs_set_display_off(ctx->dsi);
+ if (!(ctx->desc->flags & ILI9881_FLAGS_PANEL_ON_IN_PREPARE))
+ mipi_dsi_dcs_set_display_off(ctx->dsi);
return 0;
}
@@ -1754,7 +1770,13 @@ static int ili9881c_unprepare(struct drm
{
struct ili9881c *ctx = panel_to_ili9881c(panel);
- mipi_dsi_dcs_enter_sleep_mode(ctx->dsi);
+ if (!(ctx->desc->flags & ILI9881_FLAGS_NO_SHUTDOWN_CMDS)) {
+ if (ctx->desc->flags & ILI9881_FLAGS_PANEL_ON_IN_PREPARE)
+ mipi_dsi_dcs_set_display_off(ctx->dsi);
+
+ mipi_dsi_dcs_enter_sleep_mode(ctx->dsi);
+ }
+
regulator_disable(ctx->power);
gpiod_set_value_cansleep(ctx->reset, 1);
@@ -2066,6 +2088,8 @@ static const struct ili9881c_desc rpi_7i
.mode = &rpi_7inch_default_mode,
.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_LPM,
.lanes = 2,
+ .flags = ILI9881_FLAGS_NO_SHUTDOWN_CMDS |
+ ILI9881_FLAGS_PANEL_ON_IN_PREPARE,
};
static const struct of_device_id ili9881c_of_match[] = {

View File

@ -0,0 +1,90 @@
From b510e5cbbf8b8e2da3198cf931452290629876b7 Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Fri, 20 Sep 2024 18:32:11 +0100
Subject: [PATCH 1274/1350] regulator/rpi-panel: Remove the ID read
Reading from the Atmel has always been troublesome due to
clock stretching, and the driver does nothing with it anyway.
Remove the read and assume that if the overlay has been
configured (most likely through the firmware autodetection)
that the hardware is present.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
.../regulator/rpi-panel-attiny-regulator.c | 50 -------------------
1 file changed, 50 deletions(-)
--- a/drivers/regulator/rpi-panel-attiny-regulator.c
+++ b/drivers/regulator/rpi-panel-attiny-regulator.c
@@ -229,39 +229,6 @@ static void attiny_gpio_set(struct gpio_
mutex_unlock(&state->lock);
}
-static int attiny_i2c_read(struct i2c_client *client, u8 reg, unsigned int *buf)
-{
- struct i2c_msg msgs[1];
- u8 addr_buf[1] = { reg };
- u8 data_buf[1] = { 0, };
- int ret;
-
- /* Write register address */
- msgs[0].addr = client->addr;
- msgs[0].flags = 0;
- msgs[0].len = ARRAY_SIZE(addr_buf);
- msgs[0].buf = addr_buf;
-
- ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
- if (ret != ARRAY_SIZE(msgs))
- return -EIO;
-
- usleep_range(5000, 10000);
-
- /* Read data from register */
- msgs[0].addr = client->addr;
- msgs[0].flags = I2C_M_RD;
- msgs[0].len = 1;
- msgs[0].buf = data_buf;
-
- ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
- if (ret != ARRAY_SIZE(msgs))
- return -EIO;
-
- *buf = data_buf[0];
- return 0;
-}
-
/*
* I2C driver interface functions
*/
@@ -273,7 +240,6 @@ static int attiny_i2c_probe(struct i2c_c
struct regulator_dev *rdev;
struct attiny_lcd *state;
struct regmap *regmap;
- unsigned int data;
int ret;
state = devm_kzalloc(&i2c->dev, sizeof(*state), GFP_KERNEL);
@@ -291,22 +257,6 @@ static int attiny_i2c_probe(struct i2c_c
goto error;
}
- ret = attiny_i2c_read(i2c, REG_ID, &data);
- if (ret < 0) {
- dev_err(&i2c->dev, "Failed to read REG_ID reg: %d\n", ret);
- goto error;
- }
-
- switch (data) {
- case 0xde: /* ver 1 */
- case 0xc3: /* ver 2 */
- break;
- default:
- dev_err(&i2c->dev, "Unknown Atmel firmware revision: 0x%02x\n", data);
- ret = -ENODEV;
- goto error;
- }
-
regmap_write(regmap, REG_POWERON, 0);
msleep(30);
regmap_write(regmap, REG_PWM, 0);

View File

@ -0,0 +1,29 @@
From 2f9fad762e8ed78aa4220d582b4d1856808f4a7a Mon Sep 17 00:00:00 2001
From: Charles Mirabile <cmirabil@redhat.com>
Date: Tue, 19 Apr 2022 16:51:53 -0400
Subject: [PATCH 1275/1350] drivers/mfd: sensehat: Add Raspberry Pi Sense HAT
to simple_mfd_i2c
This patch adds the compatible string for the Sense HAT device to
the list of compatible strings in the simple_mfd_i2c driver so that
it can match against the device and load its children and their drivers
Co-developed-by: Mwesigwa Guma <mguma@redhat.com>
Signed-off-by: Mwesigwa Guma <mguma@redhat.com>
Co-developed-by: Joel Savitz <jsavitz@redhat.com>
Signed-off-by: Joel Savitz <jsavitz@redhat.com>
Signed-off-by: Charles Mirabile <cmirabil@redhat.com>
---
drivers/mfd/simple-mfd-i2c.c | 1 +
1 file changed, 1 insertion(+)
--- a/drivers/mfd/simple-mfd-i2c.c
+++ b/drivers/mfd/simple-mfd-i2c.c
@@ -98,6 +98,7 @@ static const struct of_device_id simple_
{ .compatible = "maxim,max5970", .data = &maxim_max5970},
{ .compatible = "maxim,max5978", .data = &maxim_max5970},
{ .compatible = "raspberrypi,poe-core", &rpi_poe_core },
+ { .compatible = "raspberrypi,sensehat" },
{}
};
MODULE_DEVICE_TABLE(of, simple_mfd_i2c_of_match);

View File

@ -0,0 +1,24 @@
From 78518a36d7c87bafdbb06478e6b54be5df4b355b Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Mon, 23 Sep 2024 17:49:00 +0100
Subject: [PATCH 1281/1350] dtoverlays: Correct pinctrl assignment on mcp23017
The pinctrl definition used "pinctrl-name" which is missing
an "s" from the end.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
arch/arm/boot/dts/overlays/mcp23017-overlay.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm/boot/dts/overlays/mcp23017-overlay.dts
+++ b/arch/arm/boot/dts/overlays/mcp23017-overlay.dts
@@ -34,7 +34,7 @@
target = <&mcp23017>;
mcp23017_irq: __overlay__ {
#interrupt-cells=<2>;
- pinctrl-name = "default";
+ pinctrl-names = "default";
pinctrl-0 = <&mcp23017_pins>;
interrupt-parent = <&gpio>;
interrupts = <4 2>;

View File

@ -0,0 +1,22 @@
From 0fb3c83a9fa3011cb735ec011b7582d4749957b2 Mon Sep 17 00:00:00 2001
From: Dom Cobley <popcornmix@gmail.com>
Date: Fri, 20 Sep 2024 12:21:27 +0100
Subject: [PATCH 1282/1350] tty/serial: pl011: Also unregister
pl011_axi_platform_driver
See: https://github.com/raspberrypi/linux/issues/6379
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
---
drivers/tty/serial/amba-pl011.c | 1 +
1 file changed, 1 insertion(+)
--- a/drivers/tty/serial/amba-pl011.c
+++ b/drivers/tty/serial/amba-pl011.c
@@ -3122,6 +3122,7 @@ static int __init pl011_init(void)
static void __exit pl011_exit(void)
{
platform_driver_unregister(&arm_sbsa_uart_platform_driver);
+ platform_driver_unregister(&pl011_axi_platform_driver);
amba_driver_unregister(&pl011_driver);
}

View File

@ -0,0 +1,62 @@
From 409a0e2fd41da7a4b04672136aa7d749988faf61 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.com>
Date: Wed, 25 Sep 2024 16:41:55 +0100
Subject: [PATCH 1283/1350] overlays: wm8960-soundcard: Fix clock declaration
How did this ever work? The static-clock declaration is fine, but the
reference to it is attached to part of the simple-audio-card node,
rather than the instantiation of the codec driver (a subnode of the
I2C controller).
Move the clock reference where it should be, and fix a few minor
cosmetic issues at the same time.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
---
.../arm/boot/dts/overlays/wm8960-soundcard-overlay.dts | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
--- a/arch/arm/boot/dts/overlays/wm8960-soundcard-overlay.dts
+++ b/arch/arm/boot/dts/overlays/wm8960-soundcard-overlay.dts
@@ -13,7 +13,7 @@
};
fragment@1 {
- target-path="/";
+ target-path = "/";
__overlay__ {
wm8960_mclk: wm8960_mclk {
compatible = "fixed-clock";
@@ -29,17 +29,18 @@
#size-cells = <0>;
status = "okay";
- wm8960: wm8960 {
+ wm8960: wm8960@1a {
compatible = "wlf,wm8960";
reg = <0x1a>;
#sound-dai-cells = <0>;
AVDD-supply = <&vdd_5v0_reg>;
DVDD-supply = <&vdd_3v3_reg>;
+ clocks = <&wm8960_mclk>;
+ clock-names = "mclk";
};
};
};
-
fragment@3 {
target = <&sound>;
slave_overlay: __overlay__ {
@@ -67,10 +68,9 @@
simple-audio-card,cpu {
sound-dai = <&i2s_clk_producer>;
};
+
dailink0_slave: simple-audio-card,codec {
sound-dai = <&wm8960>;
- clocks = <&wm8960_mclk>;
- clock-names = "mclk";
};
};
};

View File

@ -0,0 +1,44 @@
From d52d2bd85ad4d1cfc37a87a6b7bfcc37207c6025 Mon Sep 17 00:00:00 2001
From: Ali Tekin <140681099+alitekin-saha@users.noreply.github.com>
Date: Thu, 26 Sep 2024 10:51:13 +0300
Subject: [PATCH 1284/1350] googlevoicehat: Fix playback muting when recording
is stopped
Fixed audio amplifier control logic in the voicehat trigger function
Resolves improper handling of the SDMODE pin, which caused issues when the microphone and speaker were used simultaneously. The playback stream check is now correctly based on `substream->stream == SNDRV_PCM_STREAM_PLAYBACK`, ensuring proper control of the audio amplifier.
Signed-off-by: Ali Tekin <ali.tekin@saharobotik.com>
---
sound/soc/bcm/googlevoicehat-codec.c | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
--- a/sound/soc/bcm/googlevoicehat-codec.c
+++ b/sound/soc/bcm/googlevoicehat-codec.c
@@ -95,8 +95,7 @@ static int voicehat_daiops_trigger(struc
struct snd_soc_dai *dai)
{
struct snd_soc_component *component = dai->component;
- struct voicehat_priv *voicehat =
- snd_soc_component_get_drvdata(component);
+ struct voicehat_priv *voicehat = snd_soc_component_get_drvdata(component);
if (voicehat->sdmode_delay_jiffies == 0)
return 0;
@@ -109,7 +108,7 @@ static int voicehat_daiops_trigger(struc
case SNDRV_PCM_TRIGGER_START:
case SNDRV_PCM_TRIGGER_RESUME:
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
- if (dai->stream[SNDRV_PCM_STREAM_PLAYBACK].active) {
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
dev_info(dai->dev, "Enabling audio amp...\n");
queue_delayed_work(
system_power_efficient_wq,
@@ -120,7 +119,7 @@ static int voicehat_daiops_trigger(struc
case SNDRV_PCM_TRIGGER_STOP:
case SNDRV_PCM_TRIGGER_SUSPEND:
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
- if (dai->stream[SNDRV_PCM_STREAM_PLAYBACK].active) {
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
cancel_delayed_work(&voicehat->enable_sdmode_work);
dev_info(dai->dev, "Disabling audio amp...\n");
gpiod_set_value(voicehat->sdmode_gpio, 0);

View File

@ -0,0 +1,48 @@
From a382d82b99a078f2ce65e78df9ba6db0d01c8ca3 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.com>
Date: Tue, 24 Sep 2024 20:34:54 +0100
Subject: [PATCH 1285/1350] ASoC: bcm2835-i2s: Set the PERIOD_BYTES min to 256
Commit [1] set the minimum PERIOD_BYTES value to the product of the DMA
burst size and 8. For the I2S interface on BCM2835 that equates to 16
where it used to be 256. ffmpeg uses the minimum value as its preferred
value, leading to many, many very small periods, which affects
performance and leads to complaints about DTS timestamps.
Restore the previous behaviour and performance by making the bcm2835-i2s
driver set a minimum PERIOD_BYTES value of 256.
Link: https://github.com/raspberrypi/linux/issues/5709
[1] 300689fb04b3 ("ASoC: soc-generic-dmaengine-pcm: set
period_bytes_min based on maxburst")
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
---
sound/soc/bcm/bcm2835-i2s.c | 8 ++++++++
1 file changed, 8 insertions(+)
--- a/sound/soc/bcm/bcm2835-i2s.c
+++ b/sound/soc/bcm/bcm2835-i2s.c
@@ -619,6 +619,10 @@ static int bcm2835_i2s_prepare(struct sn
struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai);
uint32_t cs_reg;
+ snd_pcm_hw_constraint_minmax(substream->runtime,
+ SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 256,
+ ~0);
+
/*
* Clear both FIFOs if the one that should be started
* is not empty at the moment. This should only happen
@@ -700,6 +704,10 @@ static int bcm2835_i2s_startup(struct sn
/* Should this still be running stop it */
bcm2835_i2s_stop_clock(dev);
+ snd_pcm_hw_constraint_minmax(substream->runtime,
+ SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
+ 256, ~0);
+
/* Enable PCM block */
regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG,
BCM2835_I2S_EN, BCM2835_I2S_EN);

View File

@ -0,0 +1,30 @@
From d290bef1f99e24cd590c64db149d007c6a631b65 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.com>
Date: Mon, 16 Sep 2024 11:48:08 +0100
Subject: [PATCH 1286/1350] clk: clk-rp1: Don't crash on duplicate clocks
When using DTBs that don't match the kernel version, it's possible for
clock registration to fail. Handle that failure, in the hope that the
system can continue to boot, with a suitable error message.
Link: https://github.com/raspberrypi/linux/issues/6321
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
---
drivers/clk/clk-rp1.c | 5 +++++
1 file changed, 5 insertions(+)
--- a/drivers/clk/clk-rp1.c
+++ b/drivers/clk/clk-rp1.c
@@ -2454,6 +2454,11 @@ static int rp1_clk_probe(struct platform
desc = &clk_desc_array[i];
if (desc->clk_register && desc->data) {
hws[i] = desc->clk_register(clockman, desc->data);
+ if (IS_ERR_OR_NULL(hws[i])) {
+ pr_err("Failed to register RP1 clock '%s' (%ld) - wrong dtbs?\n", *(char **)desc->data, PTR_ERR(hws[i]));
+ hws[i] = NULL;
+ continue;
+ }
if (!strcmp(clk_hw_get_name(hws[i]), "clk_i2s")) {
clk_i2s = hws[i];
clk_xosc = clk_hw_get_parent_by_index(clk_i2s, 0);

View File

@ -0,0 +1,98 @@
From 0094eba3f2a4338cfa6854b0b5104d02ba0fa01f Mon Sep 17 00:00:00 2001
From: Naushir Patuck <naush@raspberrypi.com>
Date: Thu, 26 Sep 2024 13:12:23 +0100
Subject: [PATCH 1287/1350] drivers: media: imx500: Simplify the vblank control
init
Set the VBLANK control minimum and default values to IMX500_VBLANK_MIN
unconditionally everywhere.
Remove the mode specific framerate_default parameter, it is now unused.
Signed-off-by: Naushir Patuck <naush@raspberrypi.com>
---
drivers/media/i2c/imx500.c | 32 +++++---------------------------
1 file changed, 5 insertions(+), 27 deletions(-)
--- a/drivers/media/i2c/imx500.c
+++ b/drivers/media/i2c/imx500.c
@@ -274,9 +274,6 @@ struct imx500_mode {
/* Analog crop rectangle. */
struct v4l2_rect crop;
- /* Default framerate. */
- unsigned int framerate_default;
-
/* Default register values */
struct imx500_reg_list reg_list;
};
@@ -905,7 +902,6 @@ static const struct imx500_mode imx500_s
.width = 4056,
.height = 3040,
},
- .framerate_default = 10,
.reg_list = {
.num_of_regs = ARRAY_SIZE(mode_4056x3040_regs),
.regs = mode_4056x3040_regs,
@@ -922,7 +918,6 @@ static const struct imx500_mode imx500_s
.width = 4056,
.height = 3040,
},
- .framerate_default = 30,
.reg_list = {
.num_of_regs = ARRAY_SIZE(mode_2028x1520_regs),
.regs = mode_2028x1520_regs,
@@ -1744,28 +1739,11 @@ static int imx500_get_pad_format(struct
return 0;
}
-static unsigned int imx500_get_frame_length(const struct imx500_mode *mode,
- unsigned int framerate_default)
-{
- u64 frame_length;
-
- frame_length = IMX500_PIXEL_RATE;
- do_div(frame_length, (u64)framerate_default * mode->line_length_pix);
-
- if (WARN_ON(frame_length > IMX500_FRAME_LENGTH_MAX))
- frame_length = IMX500_FRAME_LENGTH_MAX;
-
- return max_t(unsigned int, frame_length, mode->height);
-}
-
static void imx500_set_framing_limits(struct imx500 *imx500)
{
- unsigned int frm_length_default, hblank_min;
+ unsigned int hblank_min;
const struct imx500_mode *mode = imx500->mode;
- frm_length_default =
- imx500_get_frame_length(mode, mode->framerate_default);
-
/* Default to no long exposure multiplier. */
imx500->long_exp_shift = 0;
@@ -1773,11 +1751,10 @@ static void imx500_set_framing_limits(st
__v4l2_ctrl_modify_range(
imx500->vblank, IMX500_VBLANK_MIN,
((1 << IMX500_LONG_EXP_SHIFT_MAX) * IMX500_FRAME_LENGTH_MAX) -
- mode->height,
- 1, frm_length_default - mode->height);
+ mode->height, 1, IMX500_VBLANK_MIN);
/* Setting this will adjust the exposure limits as well. */
- __v4l2_ctrl_s_ctrl(imx500->vblank, frm_length_default - mode->height);
+ __v4l2_ctrl_s_ctrl(imx500->vblank, IMX500_VBLANK_MIN);
hblank_min = mode->line_length_pix - mode->width;
__v4l2_ctrl_modify_range(imx500->hblank, hblank_min, hblank_min, 1,
@@ -2499,7 +2476,8 @@ static int imx500_init_controls(struct i
* in the imx500_set_framing_limits() call below.
*/
imx500->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx500_ctrl_ops,
- V4L2_CID_VBLANK, 0, 0xffff, 1, 0);
+ V4L2_CID_VBLANK, IMX500_VBLANK_MIN,
+ 0xffff, 1, IMX500_VBLANK_MIN);
imx500->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx500_ctrl_ops,
V4L2_CID_HBLANK, 0, 0xffff, 1, 0);

View File

@ -0,0 +1,28 @@
From 9557336c4fc4ac4606ac9e78c239aa689c26e870 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.com>
Date: Thu, 26 Sep 2024 17:46:25 +0100
Subject: [PATCH 1288/1350] dts: overlay_map: ramoops-pi4 works on Pi 5
Add the necessary overlay_map entries so that ramoops-pi4 is loaded
with dtoverlay=ramoops on Pi 5.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
---
arch/arm/boot/dts/overlays/overlay_map.dts | 2 ++
1 file changed, 2 insertions(+)
--- a/arch/arm/boot/dts/overlays/overlay_map.dts
+++ b/arch/arm/boot/dts/overlays/overlay_map.dts
@@ -247,10 +247,12 @@
ramoops {
bcm2835;
bcm2711 = "ramoops-pi4";
+ bcm2712 = "ramoops-pi4";
};
ramoops-pi4 {
bcm2711;
+ bcm2712;
};
rpi-cirrus-wm5102 {

View File

@ -0,0 +1,109 @@
From 2b5de12af9bb390239d5f3385c49e0c34f335de8 Mon Sep 17 00:00:00 2001
From: Jonathan Bell <jonathan@raspberrypi.com>
Date: Fri, 27 Sep 2024 10:59:02 +0100
Subject: [PATCH 1289/1350] dts: align PCI BAR allocation on bcm2711 and
bcm2712 to start at 2GB
Fold the Pi 5 mmio-hi compatibility option into the base DTB, and
shuffle the single MMIO window on bcm2711 to match.
Certain devices cannot handle low addresses, e.g. by failing to
enumerate or failing to route the traffic appropriately.
Link: https://github.com/raspberrypi/linux/issues/6134
Link: https://github.com/raspberrypi/linux/issues/6278
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
---
.../arm/boot/dts/broadcom/bcm2711-rpi-ds.dtsi | 6 +++---
arch/arm/boot/dts/overlays/README | 2 --
.../overlays/pciex1-compat-pi5-overlay.dts | 20 -------------------
arch/arm64/boot/dts/broadcom/bcm2712.dtsi | 10 ++++++----
4 files changed, 9 insertions(+), 29 deletions(-)
--- a/arch/arm/boot/dts/broadcom/bcm2711-rpi-ds.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm2711-rpi-ds.dtsi
@@ -123,7 +123,7 @@
ranges = <0x0 0x7c000000 0x0 0xfc000000 0x0 0x03800000>,
<0x0 0x40000000 0x0 0xff800000 0x0 0x00800000>,
- <0x6 0x00000000 0x6 0x00000000 0x0 0x40000000>,
+ <0x6 0x00000000 0x6 0x00000000 0x0 0x80000000>,
<0x0 0x00000000 0x0 0x00000000 0x0 0xfc000000>;
dma-ranges = <0x4 0x7c000000 0x0 0xfc000000 0x0 0x03800000>,
<0x0 0x00000000 0x0 0x00000000 0x4 0x00000000>;
@@ -167,8 +167,8 @@
&pcie0 {
reg = <0x0 0x7d500000 0x0 0x9310>;
- ranges = <0x02000000 0x0 0xc0000000 0x6 0x00000000
- 0x0 0x40000000>;
+ ranges = <0x02000000 0x0 0x80000000 0x6 0x00000000
+ 0x0 0x80000000>;
};
&genet {
--- a/arch/arm/boot/dts/overlays/README
+++ b/arch/arm/boot/dts/overlays/README
@@ -3617,8 +3617,6 @@ Params: l1ss Enable A
the MSI-MIP peripheral. Use if a) more than 8
interrupt vectors are required or b) the EP
requires DMA and MSI addresses to be 32bit.
- mmio-hi Move the start of outbound 32bit addresses to
- 2GB and expand 64bit outbound space to 14GB.
[ The pcf2127-rtc overlay has been deleted. See i2c-rtc. ]
--- a/arch/arm/boot/dts/overlays/pciex1-compat-pi5-overlay.dts
+++ b/arch/arm/boot/dts/overlays/pciex1-compat-pi5-overlay.dts
@@ -32,29 +32,9 @@
};
};
- /*
- * Shift the start of the 32bit outbound window to 2GB,
- * so there are no BARs starting at 0x0. Expand the 64bit
- * outbound window to use the spare 2GB.
- */
- fragment@3 {
- target = <&pciex1>;
- __dormant__ {
- #address-cells = <3>;
- #size-cells = <2>;
- ranges = <0x02000000 0x00 0x80000000
- 0x1b 0x80000000
- 0x00 0x7ffffffc>,
- <0x43000000 0x04 0x00000000
- 0x18 0x00000000
- 0x03 0x80000000>;
- };
- };
-
__overrides__ {
l1ss = <0>, "+0";
no-l0s = <0>, "+1";
no-mip = <0>, "+2";
- mmio-hi = <0>, "+3";
};
};
--- a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
@@ -1052,12 +1052,14 @@
msi-controller;
msi-parent = <&mip1>;
- ranges = <0x02000000 0x00 0x00000000
- 0x1b 0x00000000
- 0x00 0xfffffffc>,
+ // 2GB, 32-bit, non-prefetchable at PCIe 00_80000000
+ ranges = <0x02000000 0x00 0x80000000
+ 0x1b 0x80000000
+ 0x00 0x80000000>,
+ // 14GB, 64-bit, prefetchable at PCIe 04_00000000
<0x43000000 0x04 0x00000000
0x18 0x00000000
- 0x03 0x00000000>;
+ 0x03 0x80000000>;
dma-ranges = <0x03000000 0x10 0x00000000
0x00 0x00000000

View File

@ -0,0 +1,61 @@
From 35b3f98bb2bfb80a718c52ba49c167da6c78d2ea Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Micha=C5=82=20Gapi=C5=84ski?=
<mikegapinski@users.noreply.github.com>
Date: Mon, 30 Sep 2024 16:47:20 +0200
Subject: [PATCH 1290/1350] overlays: Add Pineboards HatDrive! POE+ (#6257)
overlays: Add Pineboards HatDrive! POE+
---
arch/arm/boot/dts/overlays/Makefile | 1 +
arch/arm/boot/dts/overlays/README | 6 ++++++
.../pineboards-hatdrive-poe-plus-overlay.dts | 19 +++++++++++++++++++
3 files changed, 26 insertions(+)
create mode 100644 arch/arm/boot/dts/overlays/pineboards-hatdrive-poe-plus-overlay.dts
--- a/arch/arm/boot/dts/overlays/Makefile
+++ b/arch/arm/boot/dts/overlays/Makefile
@@ -204,6 +204,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
pifi-mini-210.dtbo \
piglow.dtbo \
pineboards-hat-ai.dtbo \
+ pineboards-hatdrive-poe-plus.dtbo \
piscreen.dtbo \
piscreen2r.dtbo \
pisound.dtbo \
--- a/arch/arm/boot/dts/overlays/README
+++ b/arch/arm/boot/dts/overlays/README
@@ -3703,6 +3703,12 @@ Load: dtoverlay=pineboards-hat-ai
Params: <None>
+Name: pineboards-hatdrive-poe-plus
+Info: Configures the Pineboards HatDrive! PoE+
+Load: dtoverlay=pineboards-hatdrive-poe-plus
+Params: <None>
+
+
Name: piscreen
Info: PiScreen display by OzzMaker.com
Load: dtoverlay=piscreen,<param>=<val>
--- /dev/null
+++ b/arch/arm/boot/dts/overlays/pineboards-hatdrive-poe-plus-overlay.dts
@@ -0,0 +1,19 @@
+/*
+ * Device Tree overlay for Pineboards HatDrive! PoE+.
+ */
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "brcm,bcm2712";
+
+ fragment@0 {
+ target-path = "/chosen";
+ __overlay__ {
+ power: power {
+ hat_current_supply = <5000>;
+ };
+ };
+ };
+};

View File

@ -0,0 +1,31 @@
From 50a6e5cf28a24e7f4192ad6f70f472eca2097cc6 Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Wed, 2 Oct 2024 16:36:45 +0100
Subject: [PATCH 1296/1350] dtoverlays: Correct vc4-kms-dpi-generic for
[width|height]-mm
These two overrides were updating the &panel node from
vc4-kms-dpi.dtsi, when fragment0 from the vc4-kms-dpi-generic
was also updating the same node. Application order meant that
the override value was overwritten.
Correct the target.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
arch/arm/boot/dts/overlays/vc4-kms-dpi-generic-overlay.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/arch/arm/boot/dts/overlays/vc4-kms-dpi-generic-overlay.dts
+++ b/arch/arm/boot/dts/overlays/vc4-kms-dpi-generic-overlay.dts
@@ -60,8 +60,8 @@
de-invert = <&timing>, "de-active:0=0";
pixclk-invert = <&timing>, "pixelclk-active:0=0";
- width-mm = <&panel>, "width-mm:0";
- height-mm = <&panel>, "height-mm:0";
+ width-mm = <&panel_generic>, "width-mm:0";
+ height-mm = <&panel_generic>, "height-mm:0";
rgb565 = <&panel_generic>, "bus-format:0=0x1017",
<&dpi_node_generic>, "pinctrl-0:0=",<&dpi_16bit_gpio0>;

View File

@ -0,0 +1,32 @@
From e044f6af1b2b41bc2212551b4fd6353469cb7263 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.com>
Date: Thu, 12 Sep 2024 16:29:57 +0100
Subject: [PATCH 1297/1350] dts: bcm2712-rpi: Add four missing GPIOs to 2712D0
It's useful for gpioinfo and pinctrl to distinguish between unused and
absent GPIOs. We use "-" for the former and "" for the latter.
With this convention, gpioinfo shows absent GPIOs as "unnamed", while
pinctrl omits them altogether.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
---
arch/arm64/boot/dts/broadcom/bcm2712d0-rpi-5-b.dts | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
--- a/arch/arm64/boot/dts/broadcom/bcm2712d0-rpi-5-b.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm2712d0-rpi-5-b.dts
@@ -15,10 +15,10 @@
"", // GPIO_007
"", // GPIO_008
"", // GPIO_009
- "", // GPIO_010
- "", // GPIO_011
- "", // GPIO_012
- "", // GPIO_013
+ "-", // GPIO_010
+ "-", // GPIO_011
+ "-", // GPIO_012
+ "-", // GPIO_013
"PCIE_SDA", // GPIO_014
"PCIE_SCL", // GPIO_015
"", // GPIO_016

View File

@ -0,0 +1,169 @@
From 3be1a52ad9e3ae7b0e16eb20c77d9df60e29f139 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.com>
Date: Tue, 10 Sep 2024 14:07:16 +0100
Subject: [PATCH 1298/1350] arm64: dts: Add preliminary bcm2712-rpi-500 dts
Add the first DTS file for Pi 500.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
---
arch/arm64/boot/dts/broadcom/Makefile | 1 +
.../boot/dts/broadcom/bcm2712-rpi-500.dts | 142 ++++++++++++++++++
2 files changed, 143 insertions(+)
create mode 100644 arch/arm64/boot/dts/broadcom/bcm2712-rpi-500.dts
--- a/arch/arm64/boot/dts/broadcom/Makefile
+++ b/arch/arm64/boot/dts/broadcom/Makefile
@@ -22,6 +22,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rp
dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-cm4s.dtb
dtb-$(CONFIG_ARCH_BCM2835) += bcm2712-rpi-5-b.dtb
dtb-$(CONFIG_ARCH_BCM2835) += bcm2712d0-rpi-5-b.dtb
+dtb-$(CONFIG_ARCH_BCM2835) += bcm2712-rpi-500.dtb
dtb-$(CONFIG_ARCH_BCM2835) += bcm2712-rpi-cm5-cm5io.dtb
dtb-$(CONFIG_ARCH_BCM2835) += bcm2712-rpi-cm5-cm4io.dtb
dtb-$(CONFIG_ARCH_BCM2835) += bcm2712-rpi-cm5l-cm5io.dtb
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-500.dts
@@ -0,0 +1,142 @@
+// SPDX-License-Identifier: GPL-2.0
+#include "bcm2712d0-rpi-5-b.dts"
+
+/ {
+ compatible = "raspberrypi,500", "brcm,bcm2712";
+ model = "Raspberry Pi 500";
+};
+
+&pwr_key {
+ debounce-interval = <400>;
+};
+
+&gio {
+ gpio-line-names =
+ "", // GPIO_000
+ "2712_BOOT_CS_N", // GPIO_001
+ "2712_BOOT_MISO", // GPIO_002
+ "2712_BOOT_MOSI", // GPIO_003
+ "2712_BOOT_SCLK", // GPIO_004
+ "", // GPIO_005
+ "", // GPIO_006
+ "", // GPIO_007
+ "", // GPIO_008
+ "", // GPIO_009
+ "-", // GPIO_010
+ "-", // GPIO_011
+ "-", // GPIO_012
+ "-", // GPIO_013
+ "M2_DET_WAKE", // GPIO_014
+ "M2_PWR_EN", // GPIO_015
+ "", // GPIO_016
+ "", // GPIO_017
+ "KEYB_BOOTSEL", // GPIO_018
+ "-", // GPIO_019
+ "PWR_GPIO", // GPIO_020
+ "KEYB_RUN", // GPIO_021
+ "-", // GPIO_022
+ "-", // GPIO_023
+ "BT_RTS", // GPIO_024
+ "BT_CTS", // GPIO_025
+ "BT_TXD", // GPIO_026
+ "BT_RXD", // GPIO_027
+ "WL_ON", // GPIO_028
+ "BT_ON", // GPIO_029
+ "WIFI_SDIO_CLK", // GPIO_030
+ "WIFI_SDIO_CMD", // GPIO_031
+ "WIFI_SDIO_D0", // GPIO_032
+ "WIFI_SDIO_D1", // GPIO_033
+ "WIFI_SDIO_D2", // GPIO_034
+ "WIFI_SDIO_D3"; // GPIO_035
+};
+
+&gio_aon {
+ gpio-line-names =
+ "RP1_SDA", // AON_GPIO_00
+ "RP1_SCL", // AON_GPIO_01
+ "RP1_RUN", // AON_GPIO_02
+ "SD_IOVDD_SEL", // AON_GPIO_03
+ "SD_PWR_ON", // AON_GPIO_04
+ "SD_CDET_N", // AON_GPIO_05
+ "SD_FLG_N", // AON_GPIO_06
+ "", // AON_GPIO_07
+ "2712_WAKE", // AON_GPIO_08
+ "2712_STAT_LED", // AON_GPIO_09
+ "", // AON_GPIO_10
+ "", // AON_GPIO_11
+ "PMIC_INT", // AON_GPIO_12
+ "UART_TX_FS", // AON_GPIO_13
+ "UART_RX_FS", // AON_GPIO_14
+ "", // AON_GPIO_15
+ "", // AON_GPIO_16
+
+ // Pad bank0 out to 32 entries
+ "", "", "", "", "", "", "", "", "", "", "", "", "", "", "",
+
+ "HDMI0_SCL", // AON_SGPIO_00
+ "HDMI0_SDA", // AON_SGPIO_01
+ "HDMI1_SCL", // AON_SGPIO_02
+ "HDMI1_SDA", // AON_SGPIO_03
+ "PMIC_SCL", // AON_SGPIO_04
+ "PMIC_SDA"; // AON_SGPIO_05
+};
+
+&rp1_gpio {
+ gpio-line-names =
+ "ID_SDA", // GPIO0
+ "ID_SCL", // GPIO1
+ "GPIO2", // GPIO2
+ "GPIO3", // GPIO3
+ "GPIO4", // GPIO4
+ "GPIO5", // GPIO5
+ "GPIO6", // GPIO6
+ "GPIO7", // GPIO7
+ "GPIO8", // GPIO8
+ "GPIO9", // GPIO9
+ "GPIO10", // GPIO10
+ "GPIO11", // GPIO11
+ "GPIO12", // GPIO12
+ "GPIO13", // GPIO13
+ "GPIO14", // GPIO14
+ "GPIO15", // GPIO15
+ "GPIO16", // GPIO16
+ "GPIO17", // GPIO17
+ "GPIO18", // GPIO18
+ "GPIO19", // GPIO19
+ "GPIO20", // GPIO20
+ "GPIO21", // GPIO21
+ "GPIO22", // GPIO22
+ "GPIO23", // GPIO23
+ "GPIO24", // GPIO24
+ "GPIO25", // GPIO25
+ "GPIO26", // GPIO26
+ "GPIO27", // GPIO27
+
+ "PCIE_RP1_WAKE", // GPIO28
+ "-", // GPIO29
+ "HOST_SDA", // GPIO30
+ "HOST_SCL", // GPIO31
+ "ETH_RST_N", // GPIO32
+ "PCIE_DET_WAKE", // GPIO33
+
+ "-", // GPIO34
+ "-", // GPIO35
+ "RP1_PCIE_CLKREQ_N", // GPIO36
+ "-", // GPIO37
+ "-", // GPIO38
+ "-", // GPIO39
+ "CD1_SDA", // GPIO40
+ "CD1_SCL", // GPIO41
+ "USB_VBUS_EN", // GPIO42
+ "USB_OC_N", // GPIO43
+ "RP1_STAT_LED", // GPIO44
+ "-", // GPIO45
+ "-", // GPIO46
+ "HOST_WAKE", // GPIO47
+ "-", // GPIO48
+ "EN_MAX_USB_CUR", // GPIO49
+ "-", // GPIO50
+ "-", // GPIO51
+ "-", // GPIO52
+ "-"; // GPIO53
+};

View File

@ -0,0 +1,30 @@
From 3edaa3875fbeb0b2effd77c62baabf2933efc6ef Mon Sep 17 00:00:00 2001
From: Dom Cobley <popcornmix@gmail.com>
Date: Fri, 13 Sep 2024 17:23:58 +0100
Subject: [PATCH 1301/1350] dts: 2712: Reduce default cma usage on Pi5
Significant cma shouldn't really be needed on Pi5 as the hardware
blocks support iommu and can access system memory.
We've migrated codec and camera support to system memory, and 3d
has always (even on Pi4) used system memory.
A large cma block causes issues with enabling NUMA on a low
memory (2G) Pi5, as cma cannot span numa regions.
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
---
arch/arm/boot/dts/overlays/vc4-kms-v3d-pi5-overlay.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm/boot/dts/overlays/vc4-kms-v3d-pi5-overlay.dts
+++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-pi5-overlay.dts
@@ -3,7 +3,7 @@
#include "cma-overlay.dts"
&frag0 {
- size = <((320-4)*1024*1024)>;
+ size = <(64*1024*1024)>;
};
/ {

View File

@ -0,0 +1,39 @@
From d69bca1f0425be1a42f7ad1e3cff5313ba7c122a Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.com>
Date: Wed, 9 Oct 2024 15:13:14 +0100
Subject: [PATCH 1305/1350] dts: bcm2712d0: Add non-d0 vc6 compatible string
Although the VC4/VC6 driver requires a special compatible string for the
"d0" stepping, the removal of the old compatible string upsets Mesa.
Satisfy both requirements by adding the old "brcm,bcm2712-vc6" string
as a fallback.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
---
arch/arm/boot/dts/overlays/bcm2712d0-overlay.dts | 2 +-
arch/arm64/boot/dts/broadcom/bcm2712d0-rpi-5-b.dts | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
--- a/arch/arm/boot/dts/overlays/bcm2712d0-overlay.dts
+++ b/arch/arm/boot/dts/overlays/bcm2712d0-overlay.dts
@@ -41,7 +41,7 @@
fragment@4 {
target = <&vc4>;
__overlay__ {
- compatible = "brcm,bcm2712d0-vc6";
+ compatible = "brcm,bcm2712d0-vc6", "brcm,bcm2712-vc6";
};
};
--- a/arch/arm64/boot/dts/broadcom/bcm2712d0-rpi-5-b.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm2712d0-rpi-5-b.dts
@@ -87,7 +87,7 @@
};
&vc4 {
- compatible = "brcm,bcm2712d0-vc6";
+ compatible = "brcm,bcm2712d0-vc6", "brcm,bcm2712-vc6";
};
&uart10 {

View File

@ -0,0 +1,100 @@
From 9a86952570b925e68dfd30a12642000353242745 Mon Sep 17 00:00:00 2001
From: Dom Cobley <popcornmix@gmail.com>
Date: Thu, 10 Oct 2024 17:16:08 +0100
Subject: [PATCH 1312/1350] Reapply "dtoverlays: Convert SenseHAT overlays to
use MFD and upstream drivers"
This reverts commit 82a50e430ef1d6eb37d78e25aa572c1f6ea56160.
---
.../boot/dts/overlays/rpi-sense-overlay.dts | 28 +++++++++++++++++--
.../dts/overlays/rpi-sense-v2-overlay.dts | 28 +++++++++++++++++--
2 files changed, 50 insertions(+), 6 deletions(-)
--- a/arch/arm/boot/dts/overlays/rpi-sense-overlay.dts
+++ b/arch/arm/boot/dts/overlays/rpi-sense-overlay.dts
@@ -12,11 +12,23 @@
#size-cells = <0>;
status = "okay";
- rpi-sense@46 {
- compatible = "rpi,rpi-sense";
+ sensehat@46 {
+ compatible = "raspberrypi,sensehat";
reg = <0x46>;
- keys-int-gpios = <&gpio 23 1>;
+ interrupt-parent = <&gpio>;
status = "okay";
+
+ display {
+ compatible = "raspberrypi,rpi-sense-fb";
+ status = "okay";
+ };
+ joystick {
+ compatible = "raspberrypi,sensehat-joystick";
+ interrupts = <23 1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sensehat_pins>;
+ status = "okay";
+ };
};
lsm9ds1-magn@1c {
@@ -44,4 +56,14 @@
};
};
};
+
+ fragment@1 {
+ target = <&gpio>;
+ __overlay__ {
+ sensehat_pins: sensehat_pins {
+ brcm,pins = <23>;
+ brcm,function = <0>;
+ };
+ };
+ };
};
--- a/arch/arm/boot/dts/overlays/rpi-sense-v2-overlay.dts
+++ b/arch/arm/boot/dts/overlays/rpi-sense-v2-overlay.dts
@@ -12,11 +12,23 @@
#size-cells = <0>;
status = "okay";
- rpi-sense@46 {
- compatible = "rpi,rpi-sense";
+ sensehat@46 {
+ compatible = "raspberrypi,sensehat";
reg = <0x46>;
- keys-int-gpios = <&gpio 23 1>;
+ interrupt-parent = <&gpio>;
status = "okay";
+
+ display {
+ compatible = "raspberrypi,rpi-sense-fb";
+ status = "okay";
+ };
+ joystick {
+ compatible = "raspberrypi,sensehat-joystick";
+ interrupts = <23 1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sensehat_pins>;
+ status = "okay";
+ };
};
lsm9ds1-magn@1c {
@@ -44,4 +56,14 @@
};
};
};
+
+ fragment@1 {
+ target = <&gpio>;
+ __overlay__ {
+ sensehat_pins: sensehat_pins {
+ brcm,pins = <23>;
+ brcm,function = <0>;
+ };
+ };
+ };
};

View File

@ -0,0 +1,608 @@
From 9fb57f6b8920a8aceb74ceb3e171a7e5769205a5 Mon Sep 17 00:00:00 2001
From: Dom Cobley <popcornmix@gmail.com>
Date: Thu, 10 Oct 2024 17:18:39 +0100
Subject: [PATCH 1313/1350] Reapply "drivers: Remove downstream SenseHAT core
and joystick drivers"
This reverts commit e6493e2d6a1f572fbb4a1d724e54715cb748b424.
---
drivers/input/joystick/Kconfig | 8 --
drivers/input/joystick/Makefile | 1 -
drivers/input/joystick/rpisense-js.c | 153 ---------------------
drivers/mfd/Kconfig | 8 --
drivers/mfd/Makefile | 1 -
drivers/mfd/rpisense-core.c | 163 -----------------------
drivers/video/fbdev/Kconfig | 4 +-
drivers/video/fbdev/rpisense-fb.c | 53 ++++----
include/linux/mfd/rpisense/core.h | 47 -------
include/linux/mfd/rpisense/framebuffer.h | 5 +-
10 files changed, 32 insertions(+), 411 deletions(-)
delete mode 100644 drivers/input/joystick/rpisense-js.c
delete mode 100644 drivers/mfd/rpisense-core.c
delete mode 100644 include/linux/mfd/rpisense/core.h
--- a/drivers/input/joystick/Kconfig
+++ b/drivers/input/joystick/Kconfig
@@ -412,12 +412,4 @@ config JOYSTICK_SENSEHAT
To compile this driver as a module, choose M here: the
module will be called sensehat_joystick.
-config JOYSTICK_RPISENSE
- tristate "Raspberry Pi Sense HAT joystick"
- depends on GPIOLIB && INPUT
- select MFD_RPISENSE_CORE
-
- help
- This is the joystick driver for the Raspberry Pi Sense HAT
-
endif
--- a/drivers/input/joystick/Makefile
+++ b/drivers/input/joystick/Makefile
@@ -40,4 +40,3 @@ obj-$(CONFIG_JOYSTICK_WARRIOR) += warri
obj-$(CONFIG_JOYSTICK_WALKERA0701) += walkera0701.o
obj-$(CONFIG_JOYSTICK_XPAD) += xpad.o
obj-$(CONFIG_JOYSTICK_ZHENHUA) += zhenhua.o
-obj-$(CONFIG_JOYSTICK_RPISENSE) += rpisense-js.o
--- a/drivers/input/joystick/rpisense-js.c
+++ /dev/null
@@ -1,153 +0,0 @@
-/*
- * Raspberry Pi Sense HAT joystick driver
- * http://raspberrypi.org
- *
- * Copyright (C) 2015 Raspberry Pi
- *
- * Author: Serge Schneider
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-
-#include <linux/module.h>
-
-#include <linux/mfd/rpisense/joystick.h>
-#include <linux/mfd/rpisense/core.h>
-
-static struct rpisense *rpisense;
-static unsigned char keymap[5] = {KEY_DOWN, KEY_RIGHT, KEY_UP, KEY_ENTER, KEY_LEFT,};
-
-static void keys_work_fn(struct work_struct *work)
-{
- int i;
- static s32 prev_keys;
- struct rpisense_js *rpisense_js = &rpisense->joystick;
- s32 keys = rpisense_reg_read(rpisense, RPISENSE_KEYS);
- s32 changes = keys ^ prev_keys;
-
- prev_keys = keys;
- for (i = 0; i < 5; i++) {
- if (changes & 1) {
- input_report_key(rpisense_js->keys_dev,
- keymap[i], keys & 1);
- }
- changes >>= 1;
- keys >>= 1;
- }
- input_sync(rpisense_js->keys_dev);
-}
-
-static irqreturn_t keys_irq_handler(int irq, void *pdev)
-{
- struct rpisense_js *rpisense_js = &rpisense->joystick;
-
- schedule_work(&rpisense_js->keys_work_s);
- return IRQ_HANDLED;
-}
-
-static int rpisense_js_probe(struct platform_device *pdev)
-{
- int ret;
- int i;
- struct rpisense_js *rpisense_js;
-
- rpisense = rpisense_get_dev();
- rpisense_js = &rpisense->joystick;
-
- INIT_WORK(&rpisense_js->keys_work_s, keys_work_fn);
-
- rpisense_js->keys_dev = input_allocate_device();
- if (!rpisense_js->keys_dev) {
- dev_err(&pdev->dev, "Could not allocate input device.\n");
- return -ENOMEM;
- }
-
- rpisense_js->keys_dev->evbit[0] = BIT_MASK(EV_KEY);
- for (i = 0; i < ARRAY_SIZE(keymap); i++) {
- set_bit(keymap[i],
- rpisense_js->keys_dev->keybit);
- }
-
- rpisense_js->keys_dev->name = "Raspberry Pi Sense HAT Joystick";
- rpisense_js->keys_dev->phys = "rpi-sense-joy/input0";
- rpisense_js->keys_dev->id.bustype = BUS_I2C;
- rpisense_js->keys_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_REP);
- rpisense_js->keys_dev->keycode = keymap;
- rpisense_js->keys_dev->keycodesize = sizeof(unsigned char);
- rpisense_js->keys_dev->keycodemax = ARRAY_SIZE(keymap);
-
- ret = input_register_device(rpisense_js->keys_dev);
- if (ret) {
- dev_err(&pdev->dev, "Could not register input device.\n");
- goto err_keys_alloc;
- }
-
- ret = gpiod_direction_input(rpisense_js->keys_desc);
- if (ret) {
- dev_err(&pdev->dev, "Could not set keys-int direction.\n");
- goto err_keys_reg;
- }
-
- rpisense_js->keys_irq = gpiod_to_irq(rpisense_js->keys_desc);
- if (rpisense_js->keys_irq < 0) {
- dev_err(&pdev->dev, "Could not determine keys-int IRQ.\n");
- ret = rpisense_js->keys_irq;
- goto err_keys_reg;
- }
-
- ret = devm_request_irq(&pdev->dev, rpisense_js->keys_irq,
- keys_irq_handler, IRQF_TRIGGER_RISING,
- "keys", &pdev->dev);
- if (ret) {
- dev_err(&pdev->dev, "IRQ request failed.\n");
- goto err_keys_reg;
- }
- return 0;
-err_keys_reg:
- input_unregister_device(rpisense_js->keys_dev);
-err_keys_alloc:
- input_free_device(rpisense_js->keys_dev);
- return ret;
-}
-
-static int rpisense_js_remove(struct platform_device *pdev)
-{
- struct rpisense_js *rpisense_js = &rpisense->joystick;
-
- input_unregister_device(rpisense_js->keys_dev);
- input_free_device(rpisense_js->keys_dev);
- return 0;
-}
-
-#ifdef CONFIG_OF
-static const struct of_device_id rpisense_js_id[] = {
- { .compatible = "rpi,rpi-sense-js" },
- { },
-};
-MODULE_DEVICE_TABLE(of, rpisense_js_id);
-#endif
-
-static struct platform_device_id rpisense_js_device_id[] = {
- { .name = "rpi-sense-js" },
- { },
-};
-MODULE_DEVICE_TABLE(platform, rpisense_js_device_id);
-
-static struct platform_driver rpisense_js_driver = {
- .probe = rpisense_js_probe,
- .remove = rpisense_js_remove,
- .driver = {
- .name = "rpi-sense-js",
- .owner = THIS_MODULE,
- },
-};
-
-module_platform_driver(rpisense_js_driver);
-
-MODULE_DESCRIPTION("Raspberry Pi Sense HAT joystick driver");
-MODULE_AUTHOR("Serge Schneider <serge@raspberrypi.org>");
-MODULE_LICENSE("GPL");
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -11,14 +11,6 @@ config MFD_CORE
select IRQ_DOMAIN
default n
-config MFD_RPISENSE_CORE
- tristate "Raspberry Pi Sense HAT core functions"
- depends on I2C
- select MFD_CORE
- help
- This is the core driver for the Raspberry Pi Sense HAT. This provides
- the necessary functions to communicate with the hardware.
-
config MFD_CS5535
tristate "AMD CS5535 and CS5536 southbridge core functions"
select MFD_CORE
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -268,7 +268,6 @@ obj-$(CONFIG_MFD_STMFX) += stmfx.o
obj-$(CONFIG_MFD_KHADAS_MCU) += khadas-mcu.o
obj-$(CONFIG_MFD_ACER_A500_EC) += acer-ec-a500.o
obj-$(CONFIG_MFD_QCOM_PM8008) += qcom-pm8008.o
-obj-$(CONFIG_MFD_RPISENSE_CORE) += rpisense-core.o
obj-$(CONFIG_SGI_MFD_IOC3) += ioc3.o
obj-$(CONFIG_MFD_SIMPLE_MFD_I2C) += simple-mfd-i2c.o
--- a/drivers/mfd/rpisense-core.c
+++ /dev/null
@@ -1,163 +0,0 @@
-/*
- * Raspberry Pi Sense HAT core driver
- * http://raspberrypi.org
- *
- * Copyright (C) 2015 Raspberry Pi
- *
- * Author: Serge Schneider
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * This driver is based on wm8350 implementation.
- */
-
-#include <linux/module.h>
-#include <linux/moduleparam.h>
-#include <linux/err.h>
-#include <linux/init.h>
-#include <linux/i2c.h>
-#include <linux/platform_device.h>
-#include <linux/mfd/rpisense/core.h>
-#include <linux/slab.h>
-
-static struct rpisense *rpisense;
-
-static void rpisense_client_dev_register(struct rpisense *rpisense,
- const char *name,
- struct platform_device **pdev)
-{
- int ret;
-
- *pdev = platform_device_alloc(name, -1);
- if (*pdev == NULL) {
- dev_err(rpisense->dev, "Failed to allocate %s\n", name);
- return;
- }
-
- (*pdev)->dev.parent = rpisense->dev;
- platform_set_drvdata(*pdev, rpisense);
- ret = platform_device_add(*pdev);
- if (ret != 0) {
- dev_err(rpisense->dev, "Failed to register %s: %d\n",
- name, ret);
- platform_device_put(*pdev);
- *pdev = NULL;
- }
-}
-
-static int rpisense_probe(struct i2c_client *i2c)
-{
- int ret;
- struct rpisense_js *rpisense_js;
-
- rpisense = devm_kzalloc(&i2c->dev, sizeof(struct rpisense), GFP_KERNEL);
- if (rpisense == NULL)
- return -ENOMEM;
-
- i2c_set_clientdata(i2c, rpisense);
- rpisense->dev = &i2c->dev;
- rpisense->i2c_client = i2c;
-
- ret = rpisense_reg_read(rpisense, RPISENSE_WAI);
- if (ret > 0) {
- if (ret != 's')
- return -EINVAL;
- } else {
- return ret;
- }
- ret = rpisense_reg_read(rpisense, RPISENSE_VER);
- if (ret < 0)
- return ret;
-
- dev_info(rpisense->dev,
- "Raspberry Pi Sense HAT firmware version %i\n", ret);
-
- rpisense_js = &rpisense->joystick;
- rpisense_js->keys_desc = devm_gpiod_get(&i2c->dev,
- "keys-int", GPIOD_IN);
- if (IS_ERR(rpisense_js->keys_desc)) {
- dev_warn(&i2c->dev, "Failed to get keys-int descriptor.\n");
- rpisense_js->keys_desc = gpio_to_desc(23);
- if (rpisense_js->keys_desc == NULL) {
- dev_err(&i2c->dev, "GPIO23 fallback failed.\n");
- return PTR_ERR(rpisense_js->keys_desc);
- }
- }
- rpisense_client_dev_register(rpisense, "rpi-sense-js",
- &(rpisense->joystick.pdev));
- rpisense_client_dev_register(rpisense, "rpi-sense-fb",
- &(rpisense->framebuffer.pdev));
-
- return 0;
-}
-
-static void rpisense_remove(struct i2c_client *i2c)
-{
- struct rpisense *rpisense = i2c_get_clientdata(i2c);
-
- platform_device_unregister(rpisense->joystick.pdev);
-}
-
-struct rpisense *rpisense_get_dev(void)
-{
- return rpisense;
-}
-EXPORT_SYMBOL_GPL(rpisense_get_dev);
-
-s32 rpisense_reg_read(struct rpisense *rpisense, int reg)
-{
- int ret = i2c_smbus_read_byte_data(rpisense->i2c_client, reg);
-
- if (ret < 0)
- dev_err(rpisense->dev, "Read from reg %d failed\n", reg);
- /* Due to the BCM270x I2C clock stretching bug, some values
- * may have MSB set. Clear it to avoid incorrect values.
- * */
- return ret & 0x7F;
-}
-EXPORT_SYMBOL_GPL(rpisense_reg_read);
-
-int rpisense_block_write(struct rpisense *rpisense, const char *buf, int count)
-{
- int ret = i2c_master_send(rpisense->i2c_client, buf, count);
-
- if (ret < 0)
- dev_err(rpisense->dev, "Block write failed\n");
- return ret;
-}
-EXPORT_SYMBOL_GPL(rpisense_block_write);
-
-static const struct i2c_device_id rpisense_i2c_id[] = {
- { "rpi-sense", 0 },
- { }
-};
-MODULE_DEVICE_TABLE(i2c, rpisense_i2c_id);
-
-#ifdef CONFIG_OF
-static const struct of_device_id rpisense_core_id[] = {
- { .compatible = "rpi,rpi-sense" },
- { },
-};
-MODULE_DEVICE_TABLE(of, rpisense_core_id);
-#endif
-
-
-static struct i2c_driver rpisense_driver = {
- .driver = {
- .name = "rpi-sense",
- .owner = THIS_MODULE,
- },
- .probe = rpisense_probe,
- .remove = rpisense_remove,
- .id_table = rpisense_i2c_id,
-};
-
-module_i2c_driver(rpisense_driver);
-
-MODULE_DESCRIPTION("Raspberry Pi Sense HAT core driver");
-MODULE_AUTHOR("Serge Schneider <serge@raspberrypi.org>");
-MODULE_LICENSE("GPL");
-
--- a/drivers/video/fbdev/Kconfig
+++ b/drivers/video/fbdev/Kconfig
@@ -1967,8 +1967,8 @@ config FB_SM712
config FB_RPISENSE
tristate "Raspberry Pi Sense HAT framebuffer"
- depends on FB
- select MFD_RPISENSE_CORE
+ depends on FB && I2C
+ select MFD_SIMPLE_MFD_I2C
select FB_SYS_FOPS
select FB_SYS_FILLRECT
select FB_SYS_COPYAREA
--- a/drivers/video/fbdev/rpisense-fb.c
+++ b/drivers/video/fbdev/rpisense-fb.c
@@ -23,16 +23,14 @@
#include <linux/delay.h>
#include <linux/fb.h>
#include <linux/init.h>
+#include <linux/platform_device.h>
#include <linux/mfd/rpisense/framebuffer.h>
-#include <linux/mfd/rpisense/core.h>
static bool lowlight;
module_param(lowlight, bool, 0);
MODULE_PARM_DESC(lowlight, "Reduce LED matrix brightness to one third");
-static struct rpisense *rpisense;
-
struct rpisense_fb_param {
char __iomem *vmem;
u8 *vmem_work;
@@ -116,26 +114,26 @@ static void rpisense_fb_imageblit(struct
}
static void rpisense_fb_deferred_io(struct fb_info *info,
- struct list_head *pagelist)
+ struct list_head *pagelist)
{
int i;
int j;
u8 *vmem_work = rpisense_fb_param.vmem_work;
u16 *mem = (u16 *)rpisense_fb_param.vmem;
u8 *gamma = rpisense_fb_param.gamma;
+ struct rpisense_fb *rpisense_fb = info->par;
- vmem_work[0] = 0;
for (j = 0; j < 8; j++) {
for (i = 0; i < 8; i++) {
- vmem_work[(j * 24) + i + 1] =
+ vmem_work[(j * 24) + i] =
gamma[(mem[(j * 8) + i] >> 11) & 0x1F];
- vmem_work[(j * 24) + (i + 8) + 1] =
+ vmem_work[(j * 24) + (i + 8)] =
gamma[(mem[(j * 8) + i] >> 6) & 0x1F];
- vmem_work[(j * 24) + (i + 16) + 1] =
+ vmem_work[(j * 24) + (i + 16)] =
gamma[(mem[(j * 8) + i]) & 0x1F];
}
}
- rpisense_block_write(rpisense, vmem_work, 193);
+ regmap_bulk_write(rpisense_fb->regmap, 0, vmem_work, 192);
}
static struct fb_deferred_io rpisense_fb_defio = {
@@ -200,8 +198,22 @@ static int rpisense_fb_probe(struct plat
int ret = -ENOMEM;
struct rpisense_fb *rpisense_fb;
- rpisense = rpisense_get_dev();
- rpisense_fb = &rpisense->framebuffer;
+ info = framebuffer_alloc(sizeof(*rpisense_fb), &pdev->dev);
+ if (!info) {
+ dev_err(&pdev->dev, "Could not allocate framebuffer.\n");
+ goto err_malloc;
+ }
+
+ rpisense_fb = info->par;
+ platform_set_drvdata(pdev, rpisense_fb);
+
+ rpisense_fb->pdev = pdev;
+ rpisense_fb->regmap = dev_get_regmap(pdev->dev.parent, NULL);
+ if (!rpisense_fb->regmap) {
+ dev_err(&pdev->dev,
+ "unable to get sensehat regmap");
+ return -ENODEV;
+ }
rpisense_fb_param.vmem = vzalloc(rpisense_fb_param.vmemsize);
if (!rpisense_fb_param.vmem)
@@ -211,12 +223,6 @@ static int rpisense_fb_probe(struct plat
if (!rpisense_fb_param.vmem_work)
goto err_malloc;
- info = framebuffer_alloc(0, &pdev->dev);
- if (!info) {
- dev_err(&pdev->dev, "Could not allocate framebuffer.\n");
- goto err_malloc;
- }
- rpisense_fb->info = info;
rpisense_fb_fix.smem_start = (unsigned long)rpisense_fb_param.vmem;
rpisense_fb_fix.smem_len = rpisense_fb_param.vmemsize;
@@ -253,7 +259,7 @@ err_malloc:
static int rpisense_fb_remove(struct platform_device *pdev)
{
- struct rpisense_fb *rpisense_fb = &rpisense->framebuffer;
+ struct rpisense_fb *rpisense_fb = platform_get_drvdata(pdev);
struct fb_info *info = rpisense_fb->info;
if (info) {
@@ -266,19 +272,11 @@ static int rpisense_fb_remove(struct pla
return 0;
}
-#ifdef CONFIG_OF
static const struct of_device_id rpisense_fb_id[] = {
- { .compatible = "rpi,rpi-sense-fb" },
+ { .compatible = "raspberrypi,rpi-sense-fb" },
{ },
};
MODULE_DEVICE_TABLE(of, rpisense_fb_id);
-#endif
-
-static struct platform_device_id rpisense_fb_device_id[] = {
- { .name = "rpi-sense-fb" },
- { },
-};
-MODULE_DEVICE_TABLE(platform, rpisense_fb_device_id);
static struct platform_driver rpisense_fb_driver = {
.probe = rpisense_fb_probe,
@@ -286,6 +284,7 @@ static struct platform_driver rpisense_f
.driver = {
.name = "rpi-sense-fb",
.owner = THIS_MODULE,
+ .of_match_table = rpisense_fb_id,
},
};
--- a/include/linux/mfd/rpisense/core.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * Raspberry Pi Sense HAT core driver
- * http://raspberrypi.org
- *
- * Copyright (C) 2015 Raspberry Pi
- *
- * Author: Serge Schneider
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-
-#ifndef __LINUX_MFD_RPISENSE_CORE_H_
-#define __LINUX_MFD_RPISENSE_CORE_H_
-
-#include <linux/mfd/rpisense/joystick.h>
-#include <linux/mfd/rpisense/framebuffer.h>
-
-/*
- * Register values.
- */
-#define RPISENSE_FB 0x00
-#define RPISENSE_WAI 0xF0
-#define RPISENSE_VER 0xF1
-#define RPISENSE_KEYS 0xF2
-#define RPISENSE_EE_WP 0xF3
-
-#define RPISENSE_ID 's'
-
-struct rpisense {
- struct device *dev;
- struct i2c_client *i2c_client;
-
- /* Client devices */
- struct rpisense_js joystick;
- struct rpisense_fb framebuffer;
-};
-
-struct rpisense *rpisense_get_dev(void);
-s32 rpisense_reg_read(struct rpisense *rpisense, int reg);
-int rpisense_reg_write(struct rpisense *rpisense, int reg, u16 val);
-int rpisense_block_write(struct rpisense *rpisense, const char *buf, int count);
-
-#endif
--- a/include/linux/mfd/rpisense/framebuffer.h
+++ b/include/linux/mfd/rpisense/framebuffer.h
@@ -16,6 +16,8 @@
#ifndef __LINUX_RPISENSE_FB_H_
#define __LINUX_RPISENSE_FB_H_
+#include <linux/regmap.h>
+
#define SENSEFB_FBIO_IOC_MAGIC 0xF1
#define SENSEFB_FBIOGET_GAMMA _IO(SENSEFB_FBIO_IOC_MAGIC, 0)
@@ -25,8 +27,9 @@
struct rpisense;
struct rpisense_fb {
- struct platform_device *pdev;
struct fb_info *info;
+ struct platform_device *pdev;
+ struct regmap *regmap;
};
#endif

View File

@ -0,0 +1,22 @@
From 3a7ab92b9be0f8849941ed66049b9c3744cbd5aa Mon Sep 17 00:00:00 2001
From: Dom Cobley <popcornmix@gmail.com>
Date: Thu, 10 Oct 2024 17:18:57 +0100
Subject: [PATCH 1315/1350] Reapply "Input: sensehat-joystick : Revert to
downstream keymap"
This reverts commit bdb00151ff537c119cea7125e665a9bee1f76c58.
---
drivers/input/joystick/sensehat-joystick.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/input/joystick/sensehat-joystick.c
+++ b/drivers/input/joystick/sensehat-joystick.c
@@ -28,7 +28,7 @@ struct sensehat_joystick {
};
static const unsigned int keymap[] = {
- BTN_DPAD_DOWN, BTN_DPAD_RIGHT, BTN_DPAD_UP, BTN_SELECT, BTN_DPAD_LEFT,
+ KEY_DOWN, KEY_RIGHT, KEY_UP, KEY_ENTER, KEY_LEFT
};
static irqreturn_t sensehat_joystick_report(int irq, void *cookie)

View File

@ -0,0 +1,27 @@
From 2132f8aad4e978a9789a84f667567ce2bc93cb3c Mon Sep 17 00:00:00 2001
From: Dom Cobley <popcornmix@gmail.com>
Date: Thu, 10 Oct 2024 17:19:06 +0100
Subject: [PATCH 1316/1350] Reapply "dtoverlays: Add Sense Hat to hat_map"
This reverts commit 14fc8b7994220e9b3d85c07b53c5704d5e082944.
---
arch/arm/boot/dts/overlays/hat_map.dts | 10 ++++++++++
1 file changed, 10 insertions(+)
--- a/arch/arm/boot/dts/overlays/hat_map.dts
+++ b/arch/arm/boot/dts/overlays/hat_map.dts
@@ -95,4 +95,14 @@
uuid = [ 1c955808 681f 4bbc a2ef b7ea47cd388e ];
overlay = "recalboxrgbdual";
};
+
+ sensehat-v1 {
+ uuid = [ 5d960035 8e87 428f 95d8 59852d697754 ];
+ overlay = "rpi-sense";
+ };
+
+ sensehat-v2 {
+ uuid = [ 1aa9c428 72eb 48da 9306 8c3706ed3653 ];
+ overlay = "rpi-sense-v2";
+ };
};

View File

@ -0,0 +1,54 @@
From e53eefbc711622f0702e887f88d69f867aa0bf1a Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.com>
Date: Tue, 1 Oct 2024 12:14:57 +0100
Subject: [PATCH 1317/1350] overlays: hat_map: Add Sense and Hailo AI HATs
Add mappings to overlays for the Sense HATs and the Hailo AI HATs. Note
that mapping by product names (and not UUIDs) as used here requires an
updated firmware.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
---
arch/arm/boot/dts/overlays/hat_map.dts | 20 ++++++++++++++++++--
1 file changed, 18 insertions(+), 2 deletions(-)
--- a/arch/arm/boot/dts/overlays/hat_map.dts
+++ b/arch/arm/boot/dts/overlays/hat_map.dts
@@ -1,6 +1,18 @@
/dts-v1/;
/ {
+ hailo-8 {
+ product = "Raspberry Pi AI Hat, Model Hailo-8";
+ vendor = "Hailo Technologies";
+ overlay = "none,pciex1,pciex1_gen=3";
+ };
+
+ hailo-8l {
+ product = "Raspberry Pi AI Hat, Model Hailo-8L";
+ vendor = "Hailo Technologies";
+ overlay = "none,pciex1,pciex1_gen=3";
+ };
+
hifiberry-amp100-1 {
uuid = [ 5eb863b8 12f9 41ad 978f 4cee1b3eca62 ];
overlay = "hifiberry-amp100";
@@ -97,12 +109,16 @@
};
sensehat-v1 {
- uuid = [ 5d960035 8e87 428f 95d8 59852d697754 ];
+ product = "Sense HAT";
+ vendor = "Raspberry Pi";
+ pver = < 0x0001 >;
overlay = "rpi-sense";
};
sensehat-v2 {
- uuid = [ 1aa9c428 72eb 48da 9306 8c3706ed3653 ];
+ product = "Sense HAT";
+ vendor = "Raspberry Pi";
+ pver = < 0x0002 >;
overlay = "rpi-sense-v2";
};
};

View File

@ -0,0 +1,408 @@
From e2cafea49115af21f84e315e228121ec10dd4cb3 Mon Sep 17 00:00:00 2001
From: Naushir Patuck <naush@raspberrypi.com>
Date: Fri, 11 Oct 2024 12:32:46 +0100
Subject: [PATCH 1318/1350] drivers: media: imx500: Enable LS correction
This correction is calibrated to approx 5000K.
Signed-off-by: Naushir Patuck <naush@raspberrypi.com>
---
drivers/media/i2c/imx500.c | 387 +++++++++++++++++++++++++++++++++++++
1 file changed, 387 insertions(+)
--- a/drivers/media/i2c/imx500.c
+++ b/drivers/media/i2c/imx500.c
@@ -887,6 +887,393 @@ static const struct cci_reg_sequence dnn
{ CCI_REG32(0xd950), 0xfb00f7 },
{ CCI_REG16(0xd954), 0xff },
{ CCI_REG8(0xd826), 1 },
+ /* LSC */
+ { CCI_REG32(0xe000), 0x2e502a0 },
+ { CCI_REG32(0xe004), 0x2c80283 },
+ { CCI_REG32(0xe008), 0x2700233 },
+ { CCI_REG32(0xe00c), 0x22d01f6 },
+ { CCI_REG32(0xe010), 0x1f401c3 },
+ { CCI_REG32(0xe014), 0x1c5019c },
+ { CCI_REG32(0xe018), 0x1bb0192 },
+ { CCI_REG32(0xe01c), 0x1ba0192 },
+ { CCI_REG32(0xe020), 0x1b90192 },
+ { CCI_REG32(0xe024), 0x1ba0192 },
+ { CCI_REG32(0xe028), 0x1ca019f },
+ { CCI_REG32(0xe02c), 0x1fb01c8 },
+ { CCI_REG32(0xe030), 0x23601fb },
+ { CCI_REG32(0xe034), 0x27a0239 },
+ { CCI_REG32(0xe038), 0x2d5028a },
+ { CCI_REG32(0xe03c), 0x2f302a8 },
+ { CCI_REG32(0xe040), 0x2c60283 },
+ { CCI_REG32(0xe044), 0x27c0240 },
+ { CCI_REG32(0xe048), 0x22d01f6 },
+ { CCI_REG32(0xe04c), 0x1fd01cd },
+ { CCI_REG32(0xe050), 0x1c4019c },
+ { CCI_REG32(0xe054), 0x19c017b },
+ { CCI_REG32(0xe058), 0x1810165 },
+ { CCI_REG32(0xe05c), 0x175015c },
+ { CCI_REG32(0xe060), 0x175015c },
+ { CCI_REG32(0xe064), 0x1840167 },
+ { CCI_REG32(0xe068), 0x1a0017e },
+ { CCI_REG32(0xe06c), 0x1cc01a1 },
+ { CCI_REG32(0xe070), 0x20501d1 },
+ { CCI_REG32(0xe074), 0x23601fc },
+ { CCI_REG32(0xe078), 0x2890246 },
+ { CCI_REG32(0xe07c), 0x2d3028a },
+ { CCI_REG32(0xe080), 0x2800243 },
+ { CCI_REG32(0xe084), 0x245020e },
+ { CCI_REG32(0xe088), 0x1ff01ce },
+ { CCI_REG32(0xe08c), 0x1c4019c },
+ { CCI_REG32(0xe090), 0x19a017b },
+ { CCI_REG32(0xe094), 0x1650150 },
+ { CCI_REG32(0xe098), 0x14a013a },
+ { CCI_REG32(0xe09c), 0x13f0131 },
+ { CCI_REG32(0xe0a0), 0x1400131 },
+ { CCI_REG32(0xe0a4), 0x14d013c },
+ { CCI_REG32(0xe0a8), 0x16a0154 },
+ { CCI_REG32(0xe0ac), 0x1a1017e },
+ { CCI_REG32(0xe0b0), 0x1cc01a1 },
+ { CCI_REG32(0xe0b4), 0x20801d3 },
+ { CCI_REG32(0xe0b8), 0x2510214 },
+ { CCI_REG32(0xe0bc), 0x28b0249 },
+ { CCI_REG32(0xe0c0), 0x2640229 },
+ { CCI_REG32(0xe0c4), 0x22101ed },
+ { CCI_REG32(0xe0c8), 0x1dc01b0 },
+ { CCI_REG32(0xe0cc), 0x19c017c },
+ { CCI_REG32(0xe0d0), 0x1650150 },
+ { CCI_REG32(0xe0d4), 0x148013a },
+ { CCI_REG32(0xe0d8), 0x123011c },
+ { CCI_REG32(0xe0dc), 0x1190113 },
+ { CCI_REG32(0xe0e0), 0x1190113 },
+ { CCI_REG32(0xe0e4), 0x1280120 },
+ { CCI_REG32(0xe0e8), 0x14c013c },
+ { CCI_REG32(0xe0ec), 0x16b0154 },
+ { CCI_REG32(0xe0f0), 0x1a30181 },
+ { CCI_REG32(0xe0f4), 0x1e601b6 },
+ { CCI_REG32(0xe0f8), 0x22c01f3 },
+ { CCI_REG32(0xe0fc), 0x2700230 },
+ { CCI_REG32(0xe100), 0x257021d },
+ { CCI_REG32(0xe104), 0x20901d8 },
+ { CCI_REG32(0xe108), 0x1c4019d },
+ { CCI_REG32(0xe10c), 0x1820167 },
+ { CCI_REG32(0xe110), 0x14b013b },
+ { CCI_REG32(0xe114), 0x124011c },
+ { CCI_REG32(0xe118), 0x1170113 },
+ { CCI_REG32(0xe11c), 0x1010101 },
+ { CCI_REG32(0xe120), 0x1030102 },
+ { CCI_REG32(0xe124), 0x1190113 },
+ { CCI_REG32(0xe128), 0x1280120 },
+ { CCI_REG32(0xe12c), 0x14f013f },
+ { CCI_REG32(0xe130), 0x189016c },
+ { CCI_REG32(0xe134), 0x1ce01a3 },
+ { CCI_REG32(0xe138), 0x21601df },
+ { CCI_REG32(0xe13c), 0x2630224 },
+ { CCI_REG32(0xe140), 0x257021d },
+ { CCI_REG32(0xe144), 0x20101d0 },
+ { CCI_REG32(0xe148), 0x1ba0194 },
+ { CCI_REG32(0xe14c), 0x176015d },
+ { CCI_REG32(0xe150), 0x13e0132 },
+ { CCI_REG32(0xe154), 0x1190114 },
+ { CCI_REG32(0xe158), 0x1010101 },
+ { CCI_REG32(0xe15c), 0x1000100 },
+ { CCI_REG32(0xe160), 0x1010100 },
+ { CCI_REG32(0xe164), 0x1040103 },
+ { CCI_REG32(0xe168), 0x11d0118 },
+ { CCI_REG32(0xe16c), 0x1450136 },
+ { CCI_REG32(0xe170), 0x17d0163 },
+ { CCI_REG32(0xe174), 0x1c4019a },
+ { CCI_REG32(0xe178), 0x20d01d6 },
+ { CCI_REG32(0xe17c), 0x2630224 },
+ { CCI_REG32(0xe180), 0x257021d },
+ { CCI_REG32(0xe184), 0x20001d0 },
+ { CCI_REG32(0xe188), 0x1b90194 },
+ { CCI_REG32(0xe18c), 0x175015d },
+ { CCI_REG32(0xe190), 0x13e0132 },
+ { CCI_REG32(0xe194), 0x1180114 },
+ { CCI_REG32(0xe198), 0x1040103 },
+ { CCI_REG32(0xe19c), 0x1000100 },
+ { CCI_REG32(0xe1a0), 0x1030102 },
+ { CCI_REG32(0xe1a4), 0x1050103 },
+ { CCI_REG32(0xe1a8), 0x11d0118 },
+ { CCI_REG32(0xe1ac), 0x1450136 },
+ { CCI_REG32(0xe1b0), 0x17d0163 },
+ { CCI_REG32(0xe1b4), 0x1c4019a },
+ { CCI_REG32(0xe1b8), 0x20d01d6 },
+ { CCI_REG32(0xe1bc), 0x2640224 },
+ { CCI_REG32(0xe1c0), 0x258021f },
+ { CCI_REG32(0xe1c4), 0x20e01db },
+ { CCI_REG32(0xe1c8), 0x1c7019f },
+ { CCI_REG32(0xe1cc), 0x1840169 },
+ { CCI_REG32(0xe1d0), 0x14d013e },
+ { CCI_REG32(0xe1d4), 0x1290120 },
+ { CCI_REG32(0xe1d8), 0x1180114 },
+ { CCI_REG32(0xe1dc), 0x1050103 },
+ { CCI_REG32(0xe1e0), 0x1050103 },
+ { CCI_REG32(0xe1e4), 0x11e0117 },
+ { CCI_REG32(0xe1e8), 0x12c0123 },
+ { CCI_REG32(0xe1ec), 0x1530142 },
+ { CCI_REG32(0xe1f0), 0x18d016f },
+ { CCI_REG32(0xe1f4), 0x1d201a6 },
+ { CCI_REG32(0xe1f8), 0x21a01e2 },
+ { CCI_REG32(0xe1fc), 0x2640225 },
+ { CCI_REG32(0xe200), 0x269022d },
+ { CCI_REG32(0xe204), 0x22601f1 },
+ { CCI_REG32(0xe208), 0x1e101b4 },
+ { CCI_REG32(0xe20c), 0x1a10181 },
+ { CCI_REG32(0xe210), 0x16c0156 },
+ { CCI_REG32(0xe214), 0x14d013e },
+ { CCI_REG32(0xe218), 0x1290120 },
+ { CCI_REG32(0xe21c), 0x11f0118 },
+ { CCI_REG32(0xe220), 0x11f0118 },
+ { CCI_REG32(0xe224), 0x12b0123 },
+ { CCI_REG32(0xe228), 0x1530142 },
+ { CCI_REG32(0xe22c), 0x172015a },
+ { CCI_REG32(0xe230), 0x1aa0187 },
+ { CCI_REG32(0xe234), 0x1ec01bb },
+ { CCI_REG32(0xe238), 0x23301f8 },
+ { CCI_REG32(0xe23c), 0x2750233 },
+ { CCI_REG32(0xe240), 0x28b024c },
+ { CCI_REG32(0xe244), 0x24f0216 },
+ { CCI_REG32(0xe248), 0x20701d4 },
+ { CCI_REG32(0xe24c), 0x1ce01a4 },
+ { CCI_REG32(0xe250), 0x1a10181 },
+ { CCI_REG32(0xe254), 0x16c0156 },
+ { CCI_REG32(0xe258), 0x1520141 },
+ { CCI_REG32(0xe25c), 0x1480138 },
+ { CCI_REG32(0xe260), 0x1480138 },
+ { CCI_REG32(0xe264), 0x1550143 },
+ { CCI_REG32(0xe268), 0x172015a },
+ { CCI_REG32(0xe26c), 0x1aa0187 },
+ { CCI_REG32(0xe270), 0x1d701a9 },
+ { CCI_REG32(0xe274), 0x21201db },
+ { CCI_REG32(0xe278), 0x25d021d },
+ { CCI_REG32(0xe27c), 0x2990254 },
+ { CCI_REG32(0xe280), 0x2d70291 },
+ { CCI_REG32(0xe284), 0x28c024c },
+ { CCI_REG32(0xe288), 0x2390201 },
+ { CCI_REG32(0xe28c), 0x20701d4 },
+ { CCI_REG32(0xe290), 0x1ce01a4 },
+ { CCI_REG32(0xe294), 0x1a70184 },
+ { CCI_REG32(0xe298), 0x18c016e },
+ { CCI_REG32(0xe29c), 0x1810164 },
+ { CCI_REG32(0xe2a0), 0x1810164 },
+ { CCI_REG32(0xe2a4), 0x1900170 },
+ { CCI_REG32(0xe2a8), 0x1ad0188 },
+ { CCI_REG32(0xe2ac), 0x1d601a9 },
+ { CCI_REG32(0xe2b0), 0x21201da },
+ { CCI_REG32(0xe2b4), 0x2450207 },
+ { CCI_REG32(0xe2b8), 0x29a0254 },
+ { CCI_REG32(0xe2bc), 0x2ea029d },
+ { CCI_REG32(0xe2c0), 0x2f602ae },
+ { CCI_REG32(0xe2c4), 0x2d80291 },
+ { CCI_REG32(0xe2c8), 0x280023f },
+ { CCI_REG32(0xe2cc), 0x2390200 },
+ { CCI_REG32(0xe2d0), 0x1fe01cc },
+ { CCI_REG32(0xe2d4), 0x1d201a4 },
+ { CCI_REG32(0xe2d8), 0x1c6019b },
+ { CCI_REG32(0xe2dc), 0x1c6019b },
+ { CCI_REG32(0xe2e0), 0x1c6019b },
+ { CCI_REG32(0xe2e4), 0x1c8019b },
+ { CCI_REG32(0xe2e8), 0x1d701a9 },
+ { CCI_REG32(0xe2ec), 0x20801d1 },
+ { CCI_REG32(0xe2f0), 0x2450206 },
+ { CCI_REG32(0xe2f4), 0x28e0248 },
+ { CCI_REG32(0xe2f8), 0x2ec029d },
+ { CCI_REG32(0xe2fc), 0x30902b9 },
+ { CCI_REG32(0xe300), 0x2a002a4 },
+ { CCI_REG32(0xe304), 0x2830286 },
+ { CCI_REG32(0xe308), 0x2330234 },
+ { CCI_REG32(0xe30c), 0x1f601f7 },
+ { CCI_REG32(0xe310), 0x1c301c4 },
+ { CCI_REG32(0xe314), 0x19c019c },
+ { CCI_REG32(0xe318), 0x1920193 },
+ { CCI_REG32(0xe31c), 0x1920193 },
+ { CCI_REG32(0xe320), 0x1920192 },
+ { CCI_REG32(0xe324), 0x1920193 },
+ { CCI_REG32(0xe328), 0x19f01a1 },
+ { CCI_REG32(0xe32c), 0x1c801ca },
+ { CCI_REG32(0xe330), 0x1fb01fe },
+ { CCI_REG32(0xe334), 0x239023e },
+ { CCI_REG32(0xe338), 0x28a0292 },
+ { CCI_REG32(0xe33c), 0x2a802b0 },
+ { CCI_REG32(0xe340), 0x2830287 },
+ { CCI_REG32(0xe344), 0x2400242 },
+ { CCI_REG32(0xe348), 0x1f601f8 },
+ { CCI_REG32(0xe34c), 0x1cd01ce },
+ { CCI_REG32(0xe350), 0x19c019d },
+ { CCI_REG32(0xe354), 0x17b017d },
+ { CCI_REG32(0xe358), 0x1650166 },
+ { CCI_REG32(0xe35c), 0x15c015d },
+ { CCI_REG32(0xe360), 0x15c015d },
+ { CCI_REG32(0xe364), 0x1670168 },
+ { CCI_REG32(0xe368), 0x17e0180 },
+ { CCI_REG32(0xe36c), 0x1a101a3 },
+ { CCI_REG32(0xe370), 0x1d101d3 },
+ { CCI_REG32(0xe374), 0x1fc0200 },
+ { CCI_REG32(0xe378), 0x246024c },
+ { CCI_REG32(0xe37c), 0x28a0291 },
+ { CCI_REG32(0xe380), 0x2430245 },
+ { CCI_REG32(0xe384), 0x20e0211 },
+ { CCI_REG32(0xe388), 0x1ce01d0 },
+ { CCI_REG32(0xe38c), 0x19c019e },
+ { CCI_REG32(0xe390), 0x17b017c },
+ { CCI_REG32(0xe394), 0x1500152 },
+ { CCI_REG32(0xe398), 0x13a013c },
+ { CCI_REG32(0xe39c), 0x1310134 },
+ { CCI_REG32(0xe3a0), 0x1310134 },
+ { CCI_REG32(0xe3a4), 0x13c013f },
+ { CCI_REG32(0xe3a8), 0x1540156 },
+ { CCI_REG32(0xe3ac), 0x17e0180 },
+ { CCI_REG32(0xe3b0), 0x1a101a4 },
+ { CCI_REG32(0xe3b4), 0x1d301d8 },
+ { CCI_REG32(0xe3b8), 0x2140219 },
+ { CCI_REG32(0xe3bc), 0x249024e },
+ { CCI_REG32(0xe3c0), 0x229022b },
+ { CCI_REG32(0xe3c4), 0x1ed01ef },
+ { CCI_REG32(0xe3c8), 0x1b001b2 },
+ { CCI_REG32(0xe3cc), 0x17c017e },
+ { CCI_REG32(0xe3d0), 0x1500151 },
+ { CCI_REG32(0xe3d4), 0x13a013c },
+ { CCI_REG32(0xe3d8), 0x11c011f },
+ { CCI_REG32(0xe3dc), 0x1130117 },
+ { CCI_REG32(0xe3e0), 0x1130117 },
+ { CCI_REG32(0xe3e4), 0x1200123 },
+ { CCI_REG32(0xe3e8), 0x13c013f },
+ { CCI_REG32(0xe3ec), 0x1540156 },
+ { CCI_REG32(0xe3f0), 0x1810183 },
+ { CCI_REG32(0xe3f4), 0x1b601ba },
+ { CCI_REG32(0xe3f8), 0x1f301f6 },
+ { CCI_REG32(0xe3fc), 0x2300234 },
+ { CCI_REG32(0xe400), 0x21d0221 },
+ { CCI_REG32(0xe404), 0x1d801db },
+ { CCI_REG32(0xe408), 0x19d019f },
+ { CCI_REG32(0xe40c), 0x1670169 },
+ { CCI_REG32(0xe410), 0x13b013d },
+ { CCI_REG32(0xe414), 0x11c011f },
+ { CCI_REG32(0xe418), 0x1130117 },
+ { CCI_REG32(0xe41c), 0x1010106 },
+ { CCI_REG32(0xe420), 0x1020108 },
+ { CCI_REG32(0xe424), 0x1130117 },
+ { CCI_REG32(0xe428), 0x1200123 },
+ { CCI_REG32(0xe42c), 0x13f0142 },
+ { CCI_REG32(0xe430), 0x16c016f },
+ { CCI_REG32(0xe434), 0x1a301a6 },
+ { CCI_REG32(0xe438), 0x1df01e2 },
+ { CCI_REG32(0xe43c), 0x2240228 },
+ { CCI_REG32(0xe440), 0x21d0220 },
+ { CCI_REG32(0xe444), 0x1d001d3 },
+ { CCI_REG32(0xe448), 0x1940196 },
+ { CCI_REG32(0xe44c), 0x15d0160 },
+ { CCI_REG32(0xe450), 0x1320135 },
+ { CCI_REG32(0xe454), 0x1140118 },
+ { CCI_REG32(0xe458), 0x1010106 },
+ { CCI_REG32(0xe45c), 0x1000106 },
+ { CCI_REG32(0xe460), 0x1000106 },
+ { CCI_REG32(0xe464), 0x1030109 },
+ { CCI_REG32(0xe468), 0x118011b },
+ { CCI_REG32(0xe46c), 0x136013a },
+ { CCI_REG32(0xe470), 0x1630165 },
+ { CCI_REG32(0xe474), 0x19a019c },
+ { CCI_REG32(0xe478), 0x1d601d9 },
+ { CCI_REG32(0xe47c), 0x2240227 },
+ { CCI_REG32(0xe480), 0x21d0220 },
+ { CCI_REG32(0xe484), 0x1d001d3 },
+ { CCI_REG32(0xe488), 0x1940196 },
+ { CCI_REG32(0xe48c), 0x15d0160 },
+ { CCI_REG32(0xe490), 0x1320135 },
+ { CCI_REG32(0xe494), 0x1140118 },
+ { CCI_REG32(0xe498), 0x1030109 },
+ { CCI_REG32(0xe49c), 0x1000106 },
+ { CCI_REG32(0xe4a0), 0x1020108 },
+ { CCI_REG32(0xe4a4), 0x1030109 },
+ { CCI_REG32(0xe4a8), 0x118011b },
+ { CCI_REG32(0xe4ac), 0x1360139 },
+ { CCI_REG32(0xe4b0), 0x1630165 },
+ { CCI_REG32(0xe4b4), 0x19a019c },
+ { CCI_REG32(0xe4b8), 0x1d601d9 },
+ { CCI_REG32(0xe4bc), 0x2240227 },
+ { CCI_REG32(0xe4c0), 0x21f0221 },
+ { CCI_REG32(0xe4c4), 0x1db01de },
+ { CCI_REG32(0xe4c8), 0x19f01a2 },
+ { CCI_REG32(0xe4cc), 0x169016c },
+ { CCI_REG32(0xe4d0), 0x13e0141 },
+ { CCI_REG32(0xe4d4), 0x1200124 },
+ { CCI_REG32(0xe4d8), 0x1140119 },
+ { CCI_REG32(0xe4dc), 0x1030109 },
+ { CCI_REG32(0xe4e0), 0x1030109 },
+ { CCI_REG32(0xe4e4), 0x117011c },
+ { CCI_REG32(0xe4e8), 0x1230126 },
+ { CCI_REG32(0xe4ec), 0x1420145 },
+ { CCI_REG32(0xe4f0), 0x16f0171 },
+ { CCI_REG32(0xe4f4), 0x1a601a8 },
+ { CCI_REG32(0xe4f8), 0x1e201e4 },
+ { CCI_REG32(0xe4fc), 0x2250227 },
+ { CCI_REG32(0xe500), 0x22d0231 },
+ { CCI_REG32(0xe504), 0x1f101f4 },
+ { CCI_REG32(0xe508), 0x1b401b7 },
+ { CCI_REG32(0xe50c), 0x1810183 },
+ { CCI_REG32(0xe510), 0x1560159 },
+ { CCI_REG32(0xe514), 0x13e0141 },
+ { CCI_REG32(0xe518), 0x1200124 },
+ { CCI_REG32(0xe51c), 0x118011c },
+ { CCI_REG32(0xe520), 0x118011c },
+ { CCI_REG32(0xe524), 0x1230126 },
+ { CCI_REG32(0xe528), 0x1420145 },
+ { CCI_REG32(0xe52c), 0x15a015c },
+ { CCI_REG32(0xe530), 0x1870188 },
+ { CCI_REG32(0xe534), 0x1bb01bd },
+ { CCI_REG32(0xe538), 0x1f801fb },
+ { CCI_REG32(0xe53c), 0x2330236 },
+ { CCI_REG32(0xe540), 0x24c0250 },
+ { CCI_REG32(0xe544), 0x2160219 },
+ { CCI_REG32(0xe548), 0x1d401d7 },
+ { CCI_REG32(0xe54c), 0x1a401a6 },
+ { CCI_REG32(0xe550), 0x1810183 },
+ { CCI_REG32(0xe554), 0x1560158 },
+ { CCI_REG32(0xe558), 0x1410144 },
+ { CCI_REG32(0xe55c), 0x138013b },
+ { CCI_REG32(0xe560), 0x138013b },
+ { CCI_REG32(0xe564), 0x1430146 },
+ { CCI_REG32(0xe568), 0x15a015c },
+ { CCI_REG32(0xe56c), 0x1870188 },
+ { CCI_REG32(0xe570), 0x1a901ab },
+ { CCI_REG32(0xe574), 0x1db01dd },
+ { CCI_REG32(0xe578), 0x21d0221 },
+ { CCI_REG32(0xe57c), 0x2540259 },
+ { CCI_REG32(0xe580), 0x2910296 },
+ { CCI_REG32(0xe584), 0x24c0251 },
+ { CCI_REG32(0xe588), 0x2010204 },
+ { CCI_REG32(0xe58c), 0x1d401d6 },
+ { CCI_REG32(0xe590), 0x1a401a5 },
+ { CCI_REG32(0xe594), 0x1840186 },
+ { CCI_REG32(0xe598), 0x16e0170 },
+ { CCI_REG32(0xe59c), 0x1640167 },
+ { CCI_REG32(0xe5a0), 0x1640167 },
+ { CCI_REG32(0xe5a4), 0x1700173 },
+ { CCI_REG32(0xe5a8), 0x188018a },
+ { CCI_REG32(0xe5ac), 0x1a901ab },
+ { CCI_REG32(0xe5b0), 0x1da01dd },
+ { CCI_REG32(0xe5b4), 0x207020a },
+ { CCI_REG32(0xe5b8), 0x2540259 },
+ { CCI_REG32(0xe5bc), 0x29d02a3 },
+ { CCI_REG32(0xe5c0), 0x2ae02b4 },
+ { CCI_REG32(0xe5c4), 0x2910297 },
+ { CCI_REG32(0xe5c8), 0x23f0243 },
+ { CCI_REG32(0xe5cc), 0x2000201 },
+ { CCI_REG32(0xe5d0), 0x1cc01cd },
+ { CCI_REG32(0xe5d4), 0x1a401a6 },
+ { CCI_REG32(0xe5d8), 0x19b019d },
+ { CCI_REG32(0xe5dc), 0x19b019d },
+ { CCI_REG32(0xe5e0), 0x19b019d },
+ { CCI_REG32(0xe5e4), 0x19b019e },
+ { CCI_REG32(0xe5e8), 0x1a901ab },
+ { CCI_REG32(0xe5ec), 0x1d101d3 },
+ { CCI_REG32(0xe5f0), 0x2060209 },
+ { CCI_REG32(0xe5f4), 0x248024b },
+ { CCI_REG32(0xe5f8), 0x29d02a3 },
+ { CCI_REG32(0xe5fc), 0x2b902c0 },
+ { CCI_REG8(0xd822), 0x01 },
+ { CCI_REG8(0xd823), 0x0f },
};
/* Mode configs */

View File

@ -0,0 +1,23 @@
From 0985b32279d47e7ea01152233d26eedcdf721d09 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.com>
Date: Fri, 11 Oct 2024 14:24:51 +0100
Subject: [PATCH 1319/1350] dts: bcm2712-rpi-500: Add USER_LED GPIO name
The USER_LED signal was missing from the initial DTS.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
---
arch/arm64/boot/dts/broadcom/bcm2712-rpi-500.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-500.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-500.dts
@@ -35,7 +35,7 @@
"PWR_GPIO", // GPIO_020
"KEYB_RUN", // GPIO_021
"-", // GPIO_022
- "-", // GPIO_023
+ "USER_LED", // GPIO_023
"BT_RTS", // GPIO_024
"BT_CTS", // GPIO_025
"BT_TXD", // GPIO_026

View File

@ -0,0 +1,86 @@
From 239df148741e35d5b54749a624f96dfcacc7c57e Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Mon, 14 Oct 2024 15:37:57 +0100
Subject: [PATCH 1321/1350] dtoverlays: Fix up imx500 overlays to have unique
clock nodes
The overlay was creating DT nodes /clocks/clk-aicam and
/clocks/clk-aicam-gated for both cam0 and cam1, which resulted
in one failing.
The clock infrastructure creates the clock name from the node name
without any @N reg extension, so we can't just use that. The nodes
therefore have to be renamed.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
arch/arm/boot/dts/overlays/imx500-overlay.dts | 10 ++++++----
arch/arm/boot/dts/overlays/imx500-pi5-overlay.dts | 10 ++++++----
2 files changed, 12 insertions(+), 8 deletions(-)
--- a/arch/arm/boot/dts/overlays/imx500-overlay.dts
+++ b/arch/arm/boot/dts/overlays/imx500-overlay.dts
@@ -72,16 +72,16 @@
};
};
- clocks_frag: fragment@104 {
+ fragment@104 {
target-path = "/clocks";
__overlay__ {
- clk_aicam: clk-aicam {
+ clk_aicam: clk-aicam1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
- clk_aicam_gated: clk-aicam-gated {
+ clk_aicam_gated: clk-aicam-gated1 {
compatible = "gpio-gate-clock";
clocks = <&clk_aicam>;
#clock-cells = <0>;
@@ -98,7 +98,9 @@
<&csi_frag>, "target:0=",<&csi0>,
<&spi_bridge>, "power-supply:0=",<&cam0_reg>,
<&reg_frag>, "target:0=",<&cam0_reg>,
- <&cam_node>, "VANA-supply:0=",<&cam0_reg>;
+ <&cam_node>, "VANA-supply:0=",<&cam0_reg>,
+ <&clk_aicam>,"name=clk-aicam0",
+ <&clk_aicam_gated>,"name=clk-aicam-gated0";
bypass-cache = <&spi_bridge>,"bypass-cache?";
};
};
--- a/arch/arm/boot/dts/overlays/imx500-pi5-overlay.dts
+++ b/arch/arm/boot/dts/overlays/imx500-pi5-overlay.dts
@@ -75,16 +75,16 @@
};
};
- clocks_frag: fragment@104 {
+ fragment@104 {
target-path = "/clocks";
__overlay__ {
- clk_aicam: clk-aicam {
+ clk_aicam: clk-aicam1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
- clk_aicam_gated: clk-aicam-gated {
+ clk_aicam_gated: clk-aicam-gated1 {
compatible = "gpio-gate-clock";
clocks = <&clk_aicam>;
#clock-cells = <0>;
@@ -103,7 +103,9 @@
<&spi_frag_overlay>, "fast_xfer-gpios:16=35", // CD0_IO1_MICDAT0 (clock)
<&spi_bridge>, "power-supply:0=",<&cam0_reg>,
<&reg_frag>, "target:0=",<&cam0_reg>,
- <&cam_node>, "VANA-supply:0=",<&cam0_reg>;
+ <&cam_node>, "VANA-supply:0=",<&cam0_reg>,
+ <&clk_aicam>,"name=clk-aicam0",
+ <&clk_aicam_gated>,"name=clk-aicam-gated0";
bypass-cache = <&spi_bridge>,"bypass-cache?";
};
};

View File

@ -0,0 +1,177 @@
From 6f2d1b4c3132206de40247b604638a51277131fb Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Mon, 14 Oct 2024 18:53:43 +0100
Subject: [PATCH 1322/1350] dtoverlays: Add an overlay for Waveshare's 800x480
4.3" DSI screen
It tried to be a clone of the Pi 7" display, but isn't, and gives
corrupt images with the current timings.
Add a new overlay for it.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
arch/arm/boot/dts/overlays/Makefile | 1 +
arch/arm/boot/dts/overlays/README | 17 +++
.../vc4-kms-dsi-waveshare-800x480-overlay.dts | 119 ++++++++++++++++++
3 files changed, 137 insertions(+)
create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-dsi-waveshare-800x480-overlay.dts
--- a/arch/arm/boot/dts/overlays/Makefile
+++ b/arch/arm/boot/dts/overlays/Makefile
@@ -319,6 +319,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
vc4-kms-dsi-ili9881-7inch.dtbo \
vc4-kms-dsi-lt070me05000.dtbo \
vc4-kms-dsi-lt070me05000-v2.dtbo \
+ vc4-kms-dsi-waveshare-800x480.dtbo \
vc4-kms-dsi-waveshare-panel.dtbo \
vc4-kms-kippah-7inch.dtbo \
vc4-kms-v3d.dtbo \
--- a/arch/arm/boot/dts/overlays/README
+++ b/arch/arm/boot/dts/overlays/README
@@ -5248,6 +5248,23 @@ Load: dtoverlay=vc4-kms-dsi-lt070me050
Params: <None>
+Name: vc4-kms-dsi-waveshare-800x480
+Info: Enable the Waveshare 4.3" 800x480 DSI screen.
+ It tries to look like the Pi 7" display, but won't accept some of the
+ timings.
+ Includes the edt-ft5406 for the touchscreen element.
+ Requires vc4-kms-v3d to be loaded.
+Load: dtoverlay=vc4-kms-dsi-waveshare-800x480,<param>=<val>
+Params: sizex Touchscreen size x (default 800)
+ sizey Touchscreen size y (default 480)
+ invx Touchscreen inverted x axis
+ invy Touchscreen inverted y axis
+ swapxy Touchscreen swapped x y axis
+ disable_touch Disables the touch screen overlay driver
+ dsi0 Use DSI0 and i2c_csi_dsi0 (rather than
+ the default DSI1 and i2c_csi_dsi).
+
+
Name: vc4-kms-dsi-waveshare-panel
Info: Enable a Waveshare DSI touchscreen
Includes the Goodix driver for the touchscreen element.
--- /dev/null
+++ b/arch/arm/boot/dts/overlays/vc4-kms-dsi-waveshare-800x480-overlay.dts
@@ -0,0 +1,119 @@
+/*
+ * Device Tree overlay for Waveshare 4.3" 800x480 panel.
+ * It tries to look like a Pi 7" panel, but fails with some of the timing
+ * options.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "edt-ft5406.dtsi"
+
+/ {
+ /* No compatible as it will have come from edt-ft5406.dtsi */
+
+ dsi_frag: fragment@0 {
+ target = <&dsi1>;
+ __overlay__ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+ port {
+ dsi_out: endpoint {
+ remote-endpoint = <&panel_dsi_port>;
+ };
+ };
+
+ panel: panel-dsi-generic@0 {
+ // See panel-dsi.yaml binding
+ compatible = "waveshare,4-3-inch-dsi","panel-dsi";
+ reg = <0>;
+ power-supply = <&reg_display>;
+ backlight = <&reg_display>;
+ dsi-color-format = "RGB888";
+ mode = "MODE_VIDEO";
+ width-mm = <0>;
+ height-mm = <0>;
+
+ port {
+ panel_dsi_port: endpoint {
+ data-lanes = <1>;
+ remote-endpoint = <&dsi_out>;
+ };
+ };
+
+ timing: panel-timing {
+ clock-frequency = <27777000>;
+ hactive = <800>;
+ vactive = <480>;
+ hfront-porch = <59>;
+ hsync-len = <2>;
+ hback-porch = <45>;
+ vfront-porch = <7>;
+ vsync-len = <2>;
+ vback-porch = <22>;
+ };
+ };
+ };
+ };
+
+ fragment@1 {
+ target-path = "/";
+ __overlay__ {
+ reg_bridge: reg_bridge@1 {
+ reg = <1>;
+ compatible = "regulator-fixed";
+ regulator-name = "bridge_reg";
+ gpio = <&reg_display 0 0>;
+ vin-supply = <&reg_display>;
+ enable-active-high;
+ };
+ };
+ };
+
+ i2c_frag: fragment@2 {
+ target = <&i2c_csi_dsi>;
+ __overlay__ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ reg_display: reg_display@45 {
+ compatible = "raspberrypi,7inch-touchscreen-panel-regulator";
+ reg = <0x45>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+ };
+
+ fragment@3 {
+ target = <&i2c0if>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@4 {
+ target = <&i2c0mux>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+ fragment@5 {
+ target = <&ft5406>;
+ __overlay__ {
+ vcc-supply = <&reg_display>;
+ reset-gpio = <&reg_display 1 1>;
+ };
+ };
+
+ __overrides__ {
+ dsi0 = <&dsi_frag>, "target:0=",<&dsi0>,
+ <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
+ <&ts_i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
+ <&reg_bridge>, "reg:0=0",
+ <&reg_bridge>, "regulator-name=bridge_reg_0";
+ disable_touch = <&ft5406>, "status=disabled";
+ };
+};

View File

@ -0,0 +1,74 @@
From 18d185166ca00c9280505ad41fbe036efbb52e67 Mon Sep 17 00:00:00 2001
From: Dom Cobley <popcornmix@gmail.com>
Date: Mon, 14 Oct 2024 18:55:00 +0100
Subject: [PATCH 1323/1350] drm/vc4: Remove request for min clocks when hdmi
output is disabled
Currently, booting with no hdmi connected has:
pi@pi4:~ $ vcgencmd measure_clock hdmi pixel
frequency(9)=120010256
frequency(29)=74988280
After connecting hdmi we get:
pi@pi4:~ $ vcgencmd measure_clock hdmi pixel
frequency(9)=300005856
frequency(29)=149989744
and that persists after disconnecting hdmi
I can measure this on a power supply as 10mA@5.2V (52mW).
We should always remove clk_set_min_rate requests
when we no longer need them.
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 4 ++++
drivers/gpu/drm/vc4/vc4_hvs.c | 3 +++
drivers/gpu/drm/vc4/vc4_v3d.c | 2 ++
3 files changed, 9 insertions(+)
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -1224,6 +1224,8 @@ static void vc4_hdmi_encoder_post_crtc_p
if (vc4_hdmi->variant->phy_disable)
vc4_hdmi->variant->phy_disable(vc4_hdmi);
+ /* we no longer require a minimum clock rate */
+ clk_set_min_rate(vc4_hdmi->pixel_bvb_clock, 0);
clk_disable_unprepare(vc4_hdmi->pixel_bvb_clock);
clk_disable_unprepare(vc4_hdmi->pixel_clock);
@@ -3724,6 +3726,8 @@ static int vc4_hdmi_runtime_suspend(stru
struct vc4_hdmi *vc4_hdmi = dev_get_drvdata(dev);
clk_disable_unprepare(vc4_hdmi->audio_clock);
+ /* we no longer require a minimum clock rate */
+ clk_set_min_rate(vc4_hdmi->hsm_clock, 0);
clk_disable_unprepare(vc4_hdmi->hsm_clock);
return 0;
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
@@ -2308,7 +2308,10 @@ static void vc4_hvs_unbind(struct device
drm_mm_remove_node(node);
drm_mm_takedown(&vc4->hvs->lbm_mm);
+ /* we no longer require a minimum clock rate */
+ clk_set_min_rate(hvs->disp_clk, 0);
clk_disable_unprepare(hvs->disp_clk);
+ clk_set_min_rate(hvs->core_clk, 0);
clk_disable_unprepare(hvs->core_clk);
vc4->hvs = NULL;
--- a/drivers/gpu/drm/vc4/vc4_v3d.c
+++ b/drivers/gpu/drm/vc4/vc4_v3d.c
@@ -376,6 +376,8 @@ static int vc4_v3d_runtime_suspend(struc
vc4_irq_disable(&vc4->base);
+ /* we no longer require a minimum clock rate */
+ clk_set_min_rate(v3d->clk, 0);
clk_disable_unprepare(v3d->clk);
return 0;

View File

@ -0,0 +1,71 @@
From 36faab69e8eebfb7f587bddef96040c59d3daa7c Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.com>
Date: Wed, 16 Oct 2024 11:31:04 +0100
Subject: [PATCH 1324/1350] dts: bcm2712-rpi: Add aliases for the CSI/DSI I2Cs
Older Pis arrange that the camera I2C ports appear as /dev/i2c-10. Add
aliases so that on the Pi 5 family, i2c_csi_dsi0 becomes i2c-10 and
i2c_csi_dsi1 becomes i2c-11. Only the I2C buses that appear on the
40-pin header, i.e. I2C0 to I2C3, get a low bus number.
Also add hints for our udev rules about which symlinks to create for
backwards-compatibility with the previous bus numbers. Note that
lower numbers have priority, so i2c-0 on CM5 masks i2c-11, forcing
i2c-11 to be a symlink to i2c-0, not vice versa.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
---
arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts | 2 ++
arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5.dtsi | 2 ++
arch/arm64/boot/dts/broadcom/bcm2712-rpi.dtsi | 7 +++----
3 files changed, 7 insertions(+), 4 deletions(-)
--- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts
@@ -255,12 +255,14 @@ i2c_csi_dsi0: &i2c6 { // Note: This is f
pinctrl-0 = <&rp1_i2c6_38_39>;
pinctrl-names = "default";
clock-frequency = <100000>;
+ symlink = "i2c-6";
};
i2c_csi_dsi1: &i2c4 { // Note: This is for MIPI1 connector only
pinctrl-0 = <&rp1_i2c4_40_41>;
pinctrl-names = "default";
clock-frequency = <100000>;
+ symlink = "i2c-4";
};
i2c_csi_dsi: &i2c_csi_dsi1 { }; // An alias for compatibility
--- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5.dtsi
@@ -238,9 +238,11 @@ i2c_csi_dsi0: &i2c6 { // Note: This is f
pinctrl-0 = <&rp1_i2c6_38_39>;
pinctrl-names = "default";
clock-frequency = <100000>;
+ symlink = "i2c-6";
};
i2c_csi_dsi1: &i2c0 { // Note: This is for MIPI1 connector
+ symlink = "i2c-11";
};
i2c_csi_dsi: &i2c_csi_dsi1 { }; // An alias for compatibility
--- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi.dtsi
@@ -117,12 +117,11 @@
i2c = &i2c_arm;
i2c0 = &i2c0;
i2c1 = &i2c1;
- i2c10 = &i2c_rp1boot;
i2c2 = &i2c2;
i2c3 = &i2c3;
- i2c4 = &i2c4;
- i2c5 = &i2c5;
- i2c6 = &i2c6;
+ i2c10 = &i2c_csi_dsi0;
+ i2c11 = &i2c_csi_dsi1;
+ i2c12 = &i2c_rp1boot;
mailbox = &mailbox;
mmc0 = &sdio1;
serial0 = &uart0;

View File

@ -0,0 +1,51 @@
From e03a63b8d4a60ee49e3277ac7f7ea4c2998e7938 Mon Sep 17 00:00:00 2001
From: Kieran Bingham <kieran.bingham@ideasonboard.com>
Date: Thu, 10 Oct 2024 14:52:52 +0100
Subject: [PATCH 1325/1350] NotForUpstream: media: video-mux: Propagate
controls to source
The i.MX8MP makes calls on it's source device to determine
the link-frequency that should be configured on the CSI2 receiver.
When the source is behind a video mux, we need to pass this call through
to the connected device.
Map the control handler of the source device to the video-mux,
essentially proxying all controls on the mux to the device which has
it's link enabled.
Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
---
drivers/media/platform/video-mux.c | 7 +++++++
1 file changed, 7 insertions(+)
--- a/drivers/media/platform/video-mux.c
+++ b/drivers/media/platform/video-mux.c
@@ -69,6 +69,7 @@ static int video_mux_link_setup(struct m
const struct media_pad *remote, u32 flags)
{
struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
+ struct v4l2_subdev *source_sd;
struct video_mux *vmux = v4l2_subdev_to_video_mux(sd);
u16 source_pad = entity->num_pads - 1;
int ret = 0;
@@ -111,6 +112,10 @@ static int video_mux_link_setup(struct m
*source_mbusformat = *v4l2_subdev_get_pad_format(sd, sd_state,
vmux->active);
v4l2_subdev_unlock_state(sd_state);
+
+ source_sd = media_entity_to_v4l2_subdev(remote->entity);
+ vmux->subdev.ctrl_handler = source_sd->ctrl_handler;
+
} else {
if (vmux->active != local->index)
goto out;
@@ -118,6 +123,8 @@ static int video_mux_link_setup(struct m
dev_dbg(sd->dev, "going inactive\n");
mux_control_deselect(vmux->mux);
vmux->active = -1;
+
+ vmux->subdev.ctrl_handler = NULL;
}
out:

View File

@ -0,0 +1,59 @@
From cc0c868b51941f0ff2676970b70d388f1722e7fe Mon Sep 17 00:00:00 2001
From: Paul Elder <paul.elder@ideasonboard.com>
Date: Thu, 10 Oct 2024 14:52:53 +0100
Subject: [PATCH 1326/1350] media: platform: video-mux: Fix mutex locking
The current order of locking between the driver mutex and the v4l2
subdev state lock causes a circuluar locking dependency when trying to
set up a link. Fix this.
Signed-off-by: Paul Elder <paul.elder@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
---
drivers/media/platform/video-mux.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
--- a/drivers/media/platform/video-mux.c
+++ b/drivers/media/platform/video-mux.c
@@ -70,6 +70,7 @@ static int video_mux_link_setup(struct m
{
struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
struct v4l2_subdev *source_sd;
+ struct v4l2_subdev_state *sd_state;
struct video_mux *vmux = v4l2_subdev_to_video_mux(sd);
u16 source_pad = entity->num_pads - 1;
int ret = 0;
@@ -85,10 +86,10 @@ static int video_mux_link_setup(struct m
remote->entity->name, remote->index, local->entity->name,
local->index, flags & MEDIA_LNK_FL_ENABLED);
+ sd_state = v4l2_subdev_lock_and_get_active_state(sd);
mutex_lock(&vmux->lock);
if (flags & MEDIA_LNK_FL_ENABLED) {
- struct v4l2_subdev_state *sd_state;
struct v4l2_mbus_framefmt *source_mbusformat;
if (vmux->active == local->index)
@@ -106,12 +107,10 @@ static int video_mux_link_setup(struct m
vmux->active = local->index;
/* Propagate the active format to the source */
- sd_state = v4l2_subdev_lock_and_get_active_state(sd);
source_mbusformat = v4l2_subdev_get_pad_format(sd, sd_state,
source_pad);
*source_mbusformat = *v4l2_subdev_get_pad_format(sd, sd_state,
vmux->active);
- v4l2_subdev_unlock_state(sd_state);
source_sd = media_entity_to_v4l2_subdev(remote->entity);
vmux->subdev.ctrl_handler = source_sd->ctrl_handler;
@@ -129,6 +128,7 @@ static int video_mux_link_setup(struct m
out:
mutex_unlock(&vmux->lock);
+ v4l2_subdev_unlock_state(sd_state);
return ret;
}

Some files were not shown because too many files have changed in this diff Show More